Search results for: Low Density parity Check

Authors: Othman O. Khalifa, Sheroz khan, Mohamad Zaid, Muhamad Nawawi

Abstract:

This paper mainly about the study on one of the widely used error correcting codes that is Low parity check Codes (LDPC). In this paper, the Regular LDPC code has been discussed The LDPC codes explained in this paper is about the Regular Binary LDPC codes or the Gallager.

Keywords: LDPC, channel coding.

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Authors: Cinna Soltanpur, Mohammad Ghamari, Behzad Momahed Heravi, Fatemeh Zare

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Low-density parity-check (LDPC) codes have been shown to deliver capacity approaching performance; however, problematic graphical structures (e.g. trapping sets) in the Tanner graph of some LDPC codes can cause high error floors in bit-error-ratio (BER) performance under conventional sum-product algorithm (SPA). This paper presents a serial concatenation scheme to avoid the trapping sets and to lower the error floors of LDPC code. The outer code in the proposed concatenation is the LDPC, and the inner code is a high rate array code. This approach applies an interactive hybrid process between the BCJR decoding for the array code and the SPA for the LDPC code together with bit-pinning and bit-flipping techniques. Margulis code of size (2640, 1320) has been used for the simulation and it has been shown that the proposed concatenation and decoding scheme can considerably improve the error floor performance with minimal rate loss.

Keywords: Concatenated coding, low–density parity–check codes, array code, error floors.

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Authors: M.Sushanth Babu, P.Krishna, U.Venu, M.Ranjith

Abstract:

In this paper, we evaluate the choice of suitable quantization characteristics for both the decoder messages and the received samples in Low Density Parity Check (LDPC) coded systems using M-QAM (Quadrature Amplitude Modulation) schemes. The analysis involves the demapper block that provides initial likelihood values for the decoder, by relating its quantization strategy of the decoder. A mapping strategy refers to the grouping of bits within a codeword, where each m-bit group is used to select a 2m-ary signal in accordance with the signal labels. Further we evaluate the system with mapping strategies like Consecutive-Bit (CB) and Bit-Reliability (BR). A new demapper version, based on approximate expressions, is also presented to yield a low complexity hardware implementation.

Keywords: Low Density parity Check, Mapping, Demapping, Quantization, Quadrature Amplitude Modulation

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Authors: Insah Bhurtah, P. Clarel Catherine, K. M. Sunjiv Soyjaudah

Abstract:

The decoding of Low-Density Parity-Check (LDPC) codes is operated over a redundant structure known as the bipartite graph, meaning that the full set of bit nodes is not absolutely necessary for decoder convergence. In 2008, Soyjaudah and Catherine designed a recovery algorithm for LDPC codes based on this assumption and showed that the error-correcting performance of their codes outperformed conventional LDPC Codes. In this work, the use of the recovery algorithm is further explored to test the performance of LDPC codes while the number of iterations is progressively increased. For experiments conducted with small blocklengths of up to 800 bits and number of iterations of up to 2000, the results interestingly demonstrate that contrary to conventional wisdom, the error-correcting performance keeps increasing with increasing number of iterations.

Keywords: Error-correcting codes, information theory, low-density parity-check codes, sum-product algorithm.

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Authors: M. T. Anwar, P. K. Lala, P. Thenappan

Abstract:

This paper presents the decoder design for the single error correcting and double error detecting code proposed by the authors in an earlier paper. The speed of error detection and correction of a code is largely dependent upon the associated encoder and decoder circuits. The complexity and the speed of such circuits are determined by the number of 1?s in the parity check matrix (PCM). The number of 1?s in the parity check matrix for the code proposed by the authors are fewer than in any currently known single error correcting/double error detecting code. This results in simplified encoding and decoding circuitry for error detection and correction.

Keywords: Decoder, Hsiao code, Parity Check Matrix, Syndrome Pattern.

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Authors: K. Anitha Sheela, J. Tarun Kumar

Abstract:

HSDPA is a new feature which is introduced in Release-5 specifications of the 3GPP WCDMA/UTRA standard to realize higher speed data rate together with lower round-trip times. Moreover, the HSDPA concept offers outstanding improvement of packet throughput and also significantly reduces the packet call transfer delay as compared to Release -99 DSCH. Till now the HSDPA system uses turbo coding which is the best coding technique to achieve the Shannon limit. However, the main drawbacks of turbo coding are high decoding complexity and high latency which makes it unsuitable for some applications like satellite communications, since the transmission distance itself introduces latency due to limited speed of light. Hence in this paper it is proposed to use LDPC coding in place of Turbo coding for HSDPA system which decreases the latency and decoding complexity. But LDPC coding increases the Encoding complexity. Though the complexity of transmitter increases at NodeB, the End user is at an advantage in terms of receiver complexity and Bit- error rate. In this paper LDPC Encoder is implemented using “sparse parity check matrix" H to generate a codeword at Encoder and “Belief Propagation algorithm "for LDPC decoding .Simulation results shows that in LDPC coding the BER suddenly drops as the number of iterations increase with a small increase in Eb/No. Which is not possible in Turbo coding. Also same BER was achieved using less number of iterations and hence the latency and receiver complexity has decreased for LDPC coding. HSDPA increases the downlink data rate within a cell to a theoretical maximum of 14Mbps, with 2Mbps on the uplink. The changes that HSDPA enables includes better quality, more reliable and more robust data services. In other words, while realistic data rates are only a few Mbps, the actual quality and number of users achieved will improve significantly.

Keywords: AMC, HSDPA, LDPC, WCDMA, 3GPP.

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Authors: Thuraya M. Qaradaghi, Newroz N. Abdulrazaq

Abstract:

The McEliece cryptosystem is an asymmetric type of cryptography based on error correction code. The classical McEliece used irreducible binary Goppa code which considered unbreakable until now especially with parameter [1024, 524, and 101], but it is suffering from large public key matrix which leads to be difficult to be used practically. In this work Irreducible and Separable Goppa codes have been introduced. The Irreducible and Separable Goppa codes used are with flexible parameters and dynamic error vectors. A Comparison between Separable and Irreducible Goppa code in McEliece Cryptosystem has been done. For encryption stage, to get better result for comparison, two types of testing have been chosen; in the first one the random message is constant while the parameters of Goppa code have been changed. But for the second test, the parameters of Goppa code are constant (m=8 and t=10) while the random message have been changed. The results show that the time needed to calculate parity check matrix in separable are higher than the one for irreducible McEliece cryptosystem, which is considered expected results due to calculate extra parity check matrix in decryption process for g2(z) in separable type, and the time needed to execute error locator in decryption stage in separable type is better than the time needed to calculate it in irreducible type. The proposed implementation has been done by Visual studio C#.

Keywords: McEliece cryptosystem, Goppa code, separable, irreducible.

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Authors: Ł. Januszkiewicz, G. Bacci, H. Gierszal, M. Luise

Abstract:

In this paper channel estimation techniques are considered as the support methods for OFDM transmission systems based on Non Binary LDPC (Low Density Parity Check) codes. Standard frequency domain pilot aided LS (Least Squares) and LMMSE (Linear Minimum Mean Square Error) estimators are investigated. Furthermore, an iterative algorithm is proposed as a solution exploiting the NB-LDPC channel decoder to improve the performance of the LMMSE estimator. Simulation results of signals transmitted through fading mobile channels are presented to compare the performance of the proposed channel estimators.

Keywords: LDPC codes, LMMSE, OFDM, turbo channelestimation.

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Authors: Anurag Saxena, Alkesh Agrawal, Dinesh Kumar

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The next generation mobile communication systems i.e. fourth generation (4G) was developed to accommodate the quality of service and required data rate. This project focuses on multiple access technique proposed in 4G communication systems. It is attempted to demonstrate the IDMA (Interleave Division Multiple Access) technology. The basic principle of IDMA is that interleaver is different for each user whereas CDMA employs different signatures. IDMA inherits many advantages of CDMA such as robust against fading, easy cell planning; dynamic channel sharing and IDMA increase the spectral efficiency and reduce the receiver complexity. In this, performance of IDMA is analyzed using QC-LDPC coding scheme further it is compared with LDPC coding and at last BER is calculated and plotted in MATLAB.

Keywords: 4G, QC-LDPC, CDMA, IDMA.

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Authors: Ahmad Thanyan Al-Sultan

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The check-in area of airport terminal is one of the busiest sections at airports at certain periods. The passengers are subjected to queues and delays during the check-in process. These delays and queues are due to constraints in the capacity of service facilities. In this project, the airport terminal is decomposed into several check-in areas. The airport check-in scheduling problem requires both a deterministic (integer programming) and stochastic (simulation) approach. Integer programming formulations are provided to minimize the total number of counters in each check-in area under the realistic constraint that counters for one and the same flight should be adjacent and the desired number of counters remaining in each area should be fixed during check-in operations. By using simulation, the airport system can be modeled to study the effects of various parameters such as number of passengers on a flight and check-in counter opening and closing time.

Keywords: Airport terminal, Integer programming, Scheduling, Simulation.

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Authors: Rafsan Al Mamun, Md. Motaharul Islam, Rabana Tajrin, Nabiha Noor, Shafinaz Qader

Abstract:

In an attempt to enrich the lives of billions of people by providing proper information, security and a way of communicating with others, the need for efficient and improved satellites is constantly growing. Thus, there is an increasing demand for better error detection and correction (EDAC) schemes, which are capable of protecting the data onboard the satellites. The paper is aimed towards detecting and correcting such errors using a special algorithm called the Hamming Code, which uses the concept of parity and parity bits to prevent single-bit errors onboard a satellite in Low Earth Orbit. This paper focuses on the study of Low Earth Orbit satellites and the process of generating the Hamming Code matrix to be used for EDAC using computer programs. The most effective version of Hamming Code generated was the Hamming (16, 11, 4) version using MATLAB, and the paper compares this particular scheme with other EDAC mechanisms, including other versions of Hamming Codes and Cyclic Redundancy Check (CRC), and the limitations of this scheme. This particular version of the Hamming Code guarantees single-bit error corrections as well as double-bit error detections. Furthermore, this version of Hamming Code has proved to be fast with a checking time of 5.669 nanoseconds, that has a relatively higher code rate and lower bit overhead compared to the other versions and can detect a greater percentage of errors per length of code than other EDAC schemes with similar capabilities. In conclusion, with the proper implementation of the system, it is quite possible to ensure a relatively uncorrupted satellite storage system.

Keywords: Bit-flips, Hamming code, low earth orbit, parity bits, satellite, single error upset.

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Authors: Wen-Chi Liu

Abstract:

This study applies a simple and powerful nonlinear unit root test to test the validity of long-run purchasing power parity (PPP)  in a sample of 10 East-Asian countries (i.e., China, Hong Kong,  Indonesia, Japan, Korea, Malaysia, Philippines, Singapore, Taiwan  and Thailand) over the period of March 1985 to September 2008. The empirical results indicate that PPP holds true for half of these 10  East-Asian countries under study, and the adjustment toward PPP is found to be nonlinear and in an asymmetric way. 

 

Keywords: Purchasing Power Parity, East-Asian Countries, Nonlinear Unit Root Test, Asymmetry.

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Authors: Shinji Kajiwara

Abstract:

The spring-driven ball-type check valve is one of the most important components of hydraulic systems: it controls the position of the ball and prevents backward flow. To simplify the structure, the spring must be eliminated, and to accomplish this, the flow pattern and the behavior of the check ball in L-shaped pipe must be determined. In this paper, we present a full-scale model of a check ball made of acrylic resin, and we determine the relationship between the initial position of the ball, the position and diameter of the inflow port. The check flow rate increases in a standard center inflow model, and it is possible to greatly decrease the check-flow rate by shifting the inflow from the center.

Keywords: Hydraulics, Pipe Flow, Numerical Simulation, Flow Visualization, Check ball, L-shaped Pipe.

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Authors: Santanu Santra, Utpal Roy

Abstract:

Quantum-dot Cellular Automata (QCA) is one of the most substitute emerging nanotechnologies for electronic circuits, because of lower power consumption, higher speed and smaller size in comparison with CMOS technology. The basic devices, a Quantum-dot cell can be used to implement logic gates and wires. As it is the fundamental building block on nanotechnology circuits. By applying XOR gate the hardware requirements for a QCA circuit can be decrease and circuits can be simpler in terms of level, delay and cell count. This article present a modest approach for implementing novel optimized XOR gate, which can be applied to design many variants of complex QCA circuits. Proposed XOR gate is simple in structure and powerful in terms of implementing any digital circuits. In order to verify the functionality of the proposed design some complex implementation of parity generator and parity checker circuits are proposed and simulating by QCA Designer tool and compare with some most recent design. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, CMOS technology, Logic gates, QCA Designer, Quantum-dot Cellular Automata (QCA).

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Authors: Mojtaba Valinataj

Abstract:

Reversible logic as a new favorable design domain can be used for various fields especially creating quantum computers because of its speed and intangible power consumption. However, its susceptibility to a variety of environmental effects may lead to yield the incorrect results. In this paper, because of the importance of multiplication operation in various computing systems, some novel reversible logic array multipliers are proposed with error detection capability by incorporating the parity-preserving gates. The new designs are presented for two main parts of array multipliers, partial product generation and multi-operand addition, by exploiting the new arrangements of existing gates, which results in two signed parity-preserving array multipliers. The experimental results reveal that the best proposed 4×4 multiplier in this paper reaches 12%, 24%, and 26% enhancements in the number of constant inputs, number of required gates, and quantum cost, respectively, compared to previous design. Moreover, the best proposed design is generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: Array multipliers, Baugh-Wooley method, error detection, parity-preserving gates, quantum computers, reversible logic.

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Authors: Hsiu-Hua Cheng

Abstract:

Recently, the competition between websites becomes intense. How to make users “adopt” their websites is an issue of urgent importance for online communities companies. Social procedures (such as social influence) can possibly explain how and why users’ technologies usage behaviors affect other people to use the technologies. This study proposes two types of social influences on the initial usage of Facebook Check In-friends and group members. Besides, this study combines social influences theory and social network theory to explore the factors influencing initial usage of Facebook Check In. This study indicates that Facebook friends’ previous usage of Facebook Check In and Facebook group members’ previous usage of Facebook Check In will positively influence focal actors’ Facebook Check In adoption intention, and network centrality will moderate the relationships among Facebook friends’ previous usage of Facebook Check In, Facebook group members’ previous usage of Facebook Check In and focal actors’ Facebook Check In adoption intention. The article concludes with contributions to academic research and practice.

Keywords: Social Influence, Adoption Intention, Facebook Check In, Previous Usage behavior.

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Authors: L. Grinis, V. Haslavsky, U. Tzadka

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This paper describes an experimental, theoretical model and numerical study of concentrated vortex flow past a sphere in a hydraulic check valve. The phenomenon of the rotation of the ball around the axis of the device through which liquid flows has been found. That is, due to the rotation of the sphere in the check valve vibration is caused. We observe the rotation of the sphere around the longitudinal axis of the check valve. This rotation is induced by a vortex shedding from the sphere. We will discuss computational simulation and experimental investigations of this strong sphere rotation. The frequency of the sphere vibration and interaction with the check valve wall has been measured as a function of the wide range Reynolds Number. The validity of the computational simulation and of the assumptions on which it is based has been proved experimentally. This study demonstrates the possibility to control the vibrations in a hydraulic system and proves to be very effective suppression of the self-excited vibration.

Keywords: Check-valve, vibration, vortex shedding

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Authors: T. M. Mousa-Balabel

Abstract:

This study was carried out to investigate lamb mortalities relating to ewes' breed and some managemental factors on 250 pregnant ewes (190-Rahmani, 30-Ossimi and 30-Romanov) at Mehallet Mousa, Animal Production Research Station, Kafr El- Sheikh Province, Egypt. These animals divided into five groups according to the managemental factors used. The results revealed that the lamb mortality was higher in Ossimi breed and lower in Romanov one. In addition, the highest lamb mortality occurred among lambs for unsupplemented ewes, for those had body condition score two and for lambs which born outdoor. Moreover, the lamb survivability was increased by the parity of ewes. From this study it can be concluded that the lamb mortality depends on ewes' body condition score, parity, lambing system (indoor or outdoor), nutrition during pregnancy period and selected breed. In addition, the most important period for lamb survival is the first week of age.

Keywords: lamb mortality, sheep breeds, sheep management, sheep parity.

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Authors: Shan Ding, Lijia Zhang, Hongming Xu

Abstract:

this paper presents a novel scheme which is capable of reducing the error rate and improves the transmission performance in the asynchronous cooperative MIMO systems. A case study of image transmission is applied to prove the efficient of scheme. The linear dispersion structure is employed to accommodate the cooperative wireless communication network in the dynamic topology of structure, as well as to achieve higher throughput than conventional space–time codes based on orthogonal designs. The LDPC encoder without girth-4 and the STBC encoder with guard intervals are respectively introduced. The experiment results show that the combined coder of LDPC-STBC with guard intervals can be the good error correcting coders and BER performance in the asynchronous cooperative communication. In the case study of image transmission, the results show that in the transmission process, the image quality which is obtained by applied combined scheme is much better than it which is not applied the scheme in the asynchronous cooperative MIMO systems.

Keywords: Cooperative MIMO, image transmission, lineardispersion codes, Low-Density Parity-Check (LDPC)

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Authors: Ahmed Ebian, Mona Shokair, Kamal Awadalla

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Mobile WiMAX is a broadband wireless solution that enables convergence of mobile and fixed broadband networks through a common wide area broadband radio access technology and flexible network architecture. It adopts Orthogonal Frequency Division Multiple Access (OFDMA) for improved multi-path performance in Non-Line-Of-Sight (NLOS) environments. Scalable OFDMA (SOFDMA) is introduced in the IEEE 802e[1]. WIMAX system uses one of different types of channel coding but The mandatory channel coding scheme is based on binary nonrecursive Convolutional Coding (CC). There are other several optional channel coding schemes such as block turbo codes, convolutional turbo codes, and low density parity check (LDPC). In this paper a comparison between the performance of WIMAX using turbo code and using convolutional product code (CPC) [2] is made. Also a combination between them had been done. The CPC gives good results at different SNR values compared to both the turbo system, and the combination between them. For example, at BER equal to 10-2 for 128 subcarriers, the amount of improvement in SNR equals approximately 3 dB higher than turbo code and equals approximately 2dB higher than the combination respectively. Several results are obtained at different modulating schemes (16QAM and 64QAM) and different numbers of sub-carriers (128 and 512).

Keywords: Turbo Code, Convolutional Product Code (CPC), Convolutional Product Code (CPC).

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Authors: Sharfi Dirar, Shihab Elhaj, Ahmed El Fatih

Abstract:

Computational fluid dynamics were used to simulate and study the heated water boiler tube for both normal and rifled tube with a refinement of the mesh to check the convergence. The operation condition was taken from GARRI power station and used in a boundary condition accordingly. The result indicates the rifled tube has higher heat transfer efficiency than the normal tube.

Keywords: Boiler tube, Convergence Check, Normal Tube, Rifled Tube.

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Authors: Heesung Lee, Joonkyung Sung, Euntai Kim

Abstract:

This paper proposes a method which reduces power consumption in single-error correcting, double error-detecting checker circuits that perform memory error correction code. Power is minimized with little or no impact on area and delay, using the degrees of freedom in selecting the parity check matrix of the error correcting codes. The genetic algorithm is employed to solve the non linear power optimization problem. The method is applied to two commonly used SEC-DED codes: standard Hamming and odd column weight Hsiao codes. Experiments were performed to show the performance of the proposed method.

Keywords: Error correcting codes, genetic algorithm, non-linearpower optimization, Hamming code, Hsiao code.

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Authors: Tang Hong, Zhang Lufeng, Chen Hua, Zhang Jianbo

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Today many developers use the Java components collected from the Internet as external LIBs to design and develop their own software. However, some unknown security bugs may exist in these components, such as SQL injection bug may comes from the components which have no specific check for the input string by users. To check these bugs out is very difficult without source code. So a novel method to check the bugs in Java bytecode based on points-to dataflow analysis is in need, which is different to the common analysis techniques base on the vulnerability pattern check. It can be used as an assistant tool for security analysis of Java bytecode from unknown softwares which will be used as extern LIBs.

Keywords: Java bytecode, points-to dataflow, vulnerability analysis

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Authors: Serge B. Provost, Min Jiang

Abstract:

The density estimates considered in this paper comprise a base density and an adjustment component consisting of a linear combination of orthogonal polynomials. It is shown that, in the context of density approximation, the coefficients of the linear combination can be determined either from a moment-matching technique or a weighted least-squares approach. A kernel representation of the corresponding density estimates is obtained. Additionally, two refinements of the Kronmal-Tarter stopping criterion are proposed for determining the degree of the polynomial adjustment. By way of illustration, the density estimation methodology advocated herein is applied to two data sets.

Keywords: kernel density estimation, orthogonal polynomials, moment-based methodologies, density approximation.

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Authors: Min-Shiang Hwang, Cheng-Chi Lee, Shiang-Feng Tzeng

Abstract:

A new secure knapsack cryptosystem based on the Merkle-Hellman public key cryptosystem will be proposed in this paper. Although it is common sense that when the density is low, the knapsack cryptosystem turns vulnerable to the low-density attack. The density d of a secure knapsack cryptosystem must be larger than 0.9408 to avoid low-density attack. In this paper, we investigate a new Permutation Combination Algorithm. By exploiting this algorithm, we shall propose a novel knapsack public-key cryptosystem. Our proposed scheme can enjoy a high density to avoid the low-density attack. The density d can also exceed 0.9408 to avoid the low-density attack.

Keywords: Public key, Knapsack problem, Knapsack cryptosystem, low-density attack.

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Authors: Dongwon Lee, Eon Kyeong Joo

Abstract:

In this paper, the performance of three types of serial concatenated convolutional codes (SCCC) is compared and analyzed in additive white Gaussian noise (AWGN) channel. In Type I, only the parity bits of outer encoder are passed to inner encoder. In Type II and Type III, both the information bits and the parity bits of outer encoder are transferred to inner encoder. As results of simulation, Type I shows the best bit error rate (BER) performance at low signal-to-noise ratio (SNR). On the other hand, Type III shows the best BER performance at high SNR in AWGN channel. The simulation results are analyzed using the distance spectrum.

Keywords: Distance spectrum, MAP algorithm, SCCC.

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Authors: Chiang-Ho Cheng, An-Shik Yang, Chih-Jer Lin, Chun-Ying Lee

Abstract:

This paper aims to present the design, fabrication and test of a novel piezoelectric actuated, check-valves embedded micropump having the advantages of miniature size, light weight and low power consumption. This device is designed to pump gases and liquids with the capability of performing the self-priming and bubble-tolerant work mode by maximizing the stroke volume of the membrane as well as the compression ratio via minimization of the dead volume of the micropump chamber and channel. By experiment apparatus setup, we can get the real-time values of the flow rate of micropump, the displacement of the piezoelectric actuator and the deformation of the check valve, simultaneously. The micropump with check valve 0.4 mm in thickness obtained higher output performance under the sinusoidal waveform of 120 V_pp. The micropump achieved the maximum pumping rates of 42.2 ml/min and back pressure of 14.0 kPa at the corresponding frequency of 28 and 20 Hz. The presented micropump is able to pump gases with a pumping rate of 196 ml/min at operating frequencies of 280 Hz under the sinusoidal waveform of 120 V_pp.

Keywords: Actuator, Check-valve, Micropump, Piezoelectric.

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Authors: Vitalice K. Oduol, C. Ardil

Abstract:

The paper examines the performance of bit-interleaved parity (BIP) methods in error rate monitoring, and in declaration and clearing of alarms in those transport networks that employ automatic protection switching (APS). The BIP-based error rate monitoring is attractive for its simplicity and ease of implementation. The BIP-based results are compared with exact results and are found to declare the alarms too late, and to clear the alarms too early. It is concluded that the standards development and systems implementation should take into account the fact of early clearing and late declaration of alarms. The window parameters defining the detection and clearing thresholds should be set so as to build sufficient hysteresis into the system to ensure that BIP-based implementations yield acceptable performance results.

Keywords: Automatic protection switching, bit interleaved parity, excessive bit error rate

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Authors: Yasuo Obikane

Abstract:

This work is to study a roll of the fluctuating density gradient in the compressible flows for the computational fluid dynamics (CFD). A new anisotropy tensor with the fluctuating density gradient is introduced, and is used for an invariant modeling technique to model the turbulent density gradient correlation equation derived from the continuity equation. The modeling equation is decomposed into three groups: group proportional to the mean velocity, and that proportional to the mean strain rate, and that proportional to the mean density. The characteristics of the correlation in a wake are extracted from the results by the two dimensional direct simulation, and shows the strong correlation with the vorticity in the wake near the body. Thus, it can be concluded that the correlation of the density gradient is a significant parameter to describe the quick generation of the turbulent property in the compressible flows.

Keywords: Turbulence Modeling , Density Gradient Correlation, Compressible

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Authors: Karandeep Singh, Baibing Li

Abstract:

Traffic density, an indicator of traffic conditions, is one of the most critical characteristics to Intelligent Transport Systems (ITS). This paper investigates recursive traffic density estimation using the information provided from inductive loop detectors. On the basis of the phenomenological relationship between speed and density, the existing studies incorporate a state space model and update the density estimate using vehicular speed observations via the extended Kalman filter, where an approximation is made because of the linearization of the nonlinear observation equation. In practice, this may lead to substantial estimation errors. This paper incorporates a suitable transformation to deal with the nonlinear observation equation so that the approximation is avoided when using Kalman filter to estimate the traffic density. A numerical study is conducted. It is shown that the developed method outperforms the existing methods for traffic density estimation.

Keywords: Density estimation, Kalman filter, speed-densityrelationship, Traffic surveillance.

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