Search results for: very high speed integrated circuit hardware description language.
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 8892

Search results for: very high speed integrated circuit hardware description language.

8712 Design of High Gain, High Bandwidth Op-Amp for Reduction of Mismatch Currents in Charge Pump PLL in 180 nm CMOS Technology

Authors: R .H. Talwekar, S. S Limaye

Abstract:

The designing of charge pump with high gain Op- Amp is a challenging task for getting faithful response .Design of high performance phase locked loop require ,a design of high performance charge pump .We have designed a operational amplifier for reducing the error caused by high speed glitch in a transistor and mismatch currents . A separate Op-Amp has designed in 180 nm CMOS technology by CADENCE VIRTUOSO tool. This paper describes the design of high performance charge pump for GHz CMOS PLL targeting orthogonal frequency division multiplexing (OFDM) application. A high speed low power consumption Op-Amp with more than 500 MHz bandwidth has designed for increasing the speed of charge pump in Phase locked loop.

Keywords: Charge pump (CP) Orthogonal frequency divisionmultiplexing (OFDM), Phase locked loop (PLL), Phase frequencydetector (PFD), Voltage controlled oscillator (VCO),

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8711 Development of Machinable Ellipses by NURBS Curves

Authors: Yuan L. Lai, Jian H. Chen, Jui P. Hung

Abstract:

Owning to the high-speed feed rate and ultra spindle speed have been used in modern machine tools, the tool-path generation plays a key role in the successful application of a High-Speed Machining (HSM) system. Because of its importance in both high-speed machining and tool-path generation, approximating a contour by NURBS format is a potential function in CAD/CAM/CNC systems. It is much more convenient to represent an ellipse by parametric form than to connect points laboriously determined in a CNC system. A new approximating method based on optimum processes and NURBS curves of any degree to the ellipses is presented in this study. Such operations can be the foundation of tool-radius compensation interpolator of NURBS curves in CNC system. All operating processes for a CAD tool is presented and demonstrated by practical models.

Keywords: Ellipse, Approximation, NURBS, Optimum.

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8710 Thermal Analysis of the Current Path from Circuit Breakers Using Finite Element Method

Authors: Adrian T. Plesca

Abstract:

This paper describes a three-dimensional thermal model of the current path included in the low voltage power circuit breakers. The model can be used to analyse the thermal behaviour of the current path during both steady-state and transient conditions. The current path lengthwise temperature distribution and timecurrent characteristic of the terminal connections of the power circuit breaker have been obtained. The influence of the electric current and voltage drop on main electric contact of the circuit breaker has been investigated. To validate the three-dimensional thermal model, some experimental tests have been done. There is a good correlation between experimental and simulation results.

Keywords: Current path, power circuit breakers, temperature distribution, thermal analysis.

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8709 Formal Specification and Description Language and Message Sequence Chart to Model and Validate Session Initiation Protocol Services

Authors: Sa’ed Abed, Mohammad H. Al Shayeji, Ovais Ahmed, Sahel Alouneh

Abstract:

Session Initiation Protocol (SIP) is a signaling layer protocol for building, adjusting and ending sessions among participants including Internet conferences, telephone calls and multimedia distribution. SIP facilitates user movement by proxying and forwarding requests to the present location of the user. In this paper, we provide a formal Specification and Description Language (SDL) and Message Sequence Chart (MSC) to model and define the Internet Engineering Task Force (IETF) SIP protocol and its sample services resulted from informal SIP specification. We create an “Abstract User Interface” using case analysis so that can be applied to identify SIP services more explicitly. The issued sample SIP features are then used as case scenarios; they are revised in MSCs format and validated to their corresponding SDL models.

Keywords: Modeling, MSC, SDL, SIP, validating.

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8708 Approach for a Safety Element out of Context for an Actuator Circuit Control Module

Authors: H. Noun, C. Urban-Seelmann, M. Abdelfattah, G. Zeller, G. Rajesh, I. Mozgova, R. Lachmayer

Abstract:

Several modules in automotive are usually modified and adapted for various project-specific applications. Due to a standardized safety concept a high reusability is accessible. A safety element out of context (SEooC) according to ISO 26262 can be a suitable approach. Based on the same safety concept and analysis, common modules can reach high reusability. For developing according to a module out of context, an appropriate and detailed development approach is required. This paper shows how to deduce this development processes for platform modules. Therefore, the detailed approach of the SEooC is derived. The aim is to create a detailed workflow for all phases of the development and integration of any kind of system modules. As an application example, an automotive project for an actuator control module is considered.

Keywords: Functional Safety, Safety Element out of Context, System Engineering, Hardware Engineering.

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8707 Extension of a Smart Piezoelectric Ceramic Rod

Authors: Ali Reza Pouladkhan, Jalil Emadi, Hamed Habibolahiyan

Abstract:

This paper presents an exact solution and a finite element method (FEM) for a Piezoceramic Rod under static load. The cylindrical rod is made from polarized ceramics (piezoceramics) with axial poling. The lateral surface of the rod is traction-free and is unelectroded. The two end faces are under a uniform normal traction. Electrically, the two end faces are electroded with a circuit between the electrodes, which can be switched on or off. Two cases of open and shorted electrodes (short circuit and open circuit) will be considered. Finally, a finite element model will be used to compare the results with an exact solution. The study uses ABAQUS (v.6.7) software to derive the finite element model of the ceramic rod.

Keywords: Finite element method, Ceramic rod; Axial poling, Normal traction, Short circuit, Open circuit.

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8706 High-Production Laser and Plasma Welding Technologies for High-Speed Vessels Production

Authors: V. M. Levshakov, N. A. Steshenkova, N. A. Nosyrev

Abstract:

Application of hulls processing technologies, based on high-concentrated energy sources (laser and plasma technologies), allow improve shipbuilding production. It is typical for high-speed vessels construction using steel and aluminum alloys with high precision hulls required. Report describes high-performance technologies for plasma welding (using direct current of reversed polarity), laser, and hybrid laser-arc welding of hulls structures developed by JSC “SSTC”

Keywords: Flat sections, hybrid laser-arc welding, plasma welding, plasmatron.

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8705 An FPGA Implementation of Intelligent Visual Based Fall Detection

Authors: Peng Shen Ong, Yoong Choon Chang, Chee Pun Ooi, Ettikan K. Karuppiah, Shahirina Mohd Tahir

Abstract:

Falling has been one of the major concerns and threats to the independence of the elderly in their daily lives. With the worldwide significant growth of the aging population, it is essential to have a promising solution of fall detection which is able to operate at high accuracy in real-time and supports large scale implementation using multiple cameras. Field Programmable Gate Array (FPGA) is a highly promising tool to be used as a hardware accelerator in many emerging embedded vision based system. Thus, it is the main objective of this paper to present an FPGA-based solution of visual based fall detection to meet stringent real-time requirements with high accuracy. The hardware architecture of visual based fall detection which utilizes the pixel locality to reduce memory accesses is proposed. By exploiting the parallel and pipeline architecture of FPGA, our hardware implementation of visual based fall detection using FGPA is able to achieve a performance of 60fps for a series of video analytical functions at VGA resolutions (640x480). The results of this work show that FPGA has great potentials and impacts in enabling large scale vision system in the future healthcare industry due to its flexibility and scalability.

Keywords: Fall detection, FPGA, hardware implementation.

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8704 Hardware Stream Cipher Based On LFSR and Modular Division Circuit

Authors: Deepthi P.P., P.S. Sathidevi

Abstract:

Proposal for a secure stream cipher based on Linear Feedback Shift Registers (LFSR) is presented here. In this method, shift register structure used for polynomial modular division is combined with LFSR keystream generator to yield a new keystream generator with much higher periodicity. Security is brought into this structure by using the Boolean function to combine state bits of the LFSR keystream generator and taking the output through the Boolean function. This introduces non-linearity and security into the structure in a way similar to the Non-linear filter generator. The security and throughput of the suggested stream cipher is found to be much greater than the known LFSR based structures for the same key length.

Keywords: Linear Feedback Shift Register, Stream Cipher, Filter generator, Keystream generator, Modular division circuit

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8703 Design and Implementation of Quantum Cellular Automata Based Novel Adder Circuits

Authors: Santanu Santra, Utpal Roy

Abstract:

The most important mathematical operation for any computing system is addition. An efficient adder can be of greater assistance in designing of any arithmetic circuits. Quantum-dot Cellular Automata (QCA) is a promising nanotechnology to create electronic circuits for computing devices and suitable candidate for next generation of computing systems. The article presents a modest approach to implement a novel XOR gate. The gate is simple in structure and powerful in terms of implementing digital circuits. By applying the XOR gate, the hardware requirement for a QCA circuit can be decrease and circuits can be simpler in level, clock phase and cell count. In order to verify the functionality of the proposed device some implementation of Half Adder (HA) and Full Adder (FA) is checked by means of computer simulations using QCA-Designer tool. Simulation results and physical relations confirm its usefulness in implementing every digital circuit.

Keywords: Clock, Computing system, Majority gate, QCA, QCA Designer.

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8702 Design and Layout of Two Stage High Band Width Operational Amplifier

Authors: Yasir Mahmood Qureshi

Abstract:

This paper presents the design and layout of a two stage, high speed operational amplifiers using standard 0.35um CMOS technology. The design procedure involves designing the bias circuit, the differential input pair, and the gain stage using CAD tools. Both schematic and layout of the operational amplifier along with the comparison in the results of the two has been presented. The operational amplifier designed, has a gain of 93.51db at low frequencies. It has a gain bandwidth product of 55.07MHz, phase margin of 51.9º and a slew rate of 22v/us for a load of capacitor of 10pF.

Keywords: Gain bandwidth product, Operational Amplifier, phase margin, slew rate.

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8701 Adaptation of State/Transition-Based Methods for Embedded System Testing

Authors: Abdelaziz Guerrouat, Harald Richter

Abstract:

In this paper test generation methods and appropriate fault models for testing and analysis of embedded systems described as (extended) finite state machines ((E)FSMs) are presented. Compared to simple FSMs, EFSMs specify not only the control flow but also the data flow. Thus, we define a two-level fault model to cover both aspects. The goal of this paper is to reuse well-known FSM-based test generation methods for automation of embedded system testing. These methods have been widely used in testing and validation of protocols and communicating systems. In particular, (E)FSMs-based specification and testing is more advantageous because (E)FSMs support the formal semantic of already standardised formal description techniques (FDTs) despite of their popularity in the design of hardware and software systems.

Keywords: Formal methods, testing and validation, finite state machines, formal description techniques.

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8700 Coreless Printed Circuit Board (PCB) Stepdown Transformers for DC-DC Converter Applications

Authors: Radhika Ambatipudi, Hari Babu Kotte, Dr. Kent Bertilsson

Abstract:

In this paper, multilayered coreless printed circuit board (PCB) step-down power transformers for DC-DC converter applications have been designed, manufactured and evaluated. A set of two different circular spiral step-down transformers were fabricated in the four layered PCB. These transformers have been modelled with the assistance of high frequency equivalent circuit and characterized with both sinusoidal and square wave excitation. This paper provides the comparative results of these two different transformers in terms of their resistances, self, leakage, mutual inductances, coupling coefficient and also their energy efficiencies. The operating regions for optimal performance of these transformers for power transfer applications are determined. These transformers were tested for the output power levels of about 30 Watts within the input voltage range of 12-50 Vrms. The energy efficiency for these step down transformers is observed to be in the range of 90%-97% in MHz frequency region.

Keywords: Coreless Step down Transformer, DC-DC Converterapplications, High frequency transformer, MHz operating frequency, Multilayered PCB transformers, Power Transfer Applications.

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8699 Reducing the Short Circuit Levels in Kuwait Transmission Network (A Case Study)

Authors: Mahmoud Gilany, Wael Al-Hasawi

Abstract:

Preliminary studies on Kuwait high voltage transmission system show significant increase in the short circuit level at some of the grid substations and some generating stations. This increase results from the growth in the power transmission systems in size and complexity. New generating stations are expected to be added to the system within the next few years. This paper describes the study analysis performed to evaluate the available and potential solutions to control SC levels in Kuwait power system. It also presents a modified planning of the transmission network in order to fulfill this task.

Keywords: Short circuit current, network splitting, fault current limiter, power transmission planning.

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8698 Digital Automatic Gain Control Integrated on WLAN Platform

Authors: Emilija Miletic, Milos Krstic, Maxim Piz, Michael Methfessel

Abstract:

In this work we present a solution for DAGC (Digital Automatic Gain Control) in WLAN receivers compatible to IEEE 802.11a/g standard. Those standards define communication in 5/2.4 GHz band using Orthogonal Frequency Division Multiplexing OFDM modulation scheme. WLAN Transceiver that we have used enables gain control over Low Noise Amplifier (LNA) and a Variable Gain Amplifier (VGA). The control over those signals is performed in our digital baseband processor using dedicated hardware block DAGC. DAGC in this process is used to automatically control the VGA and LNA in order to achieve better signal-to-noise ratio, decrease FER (Frame Error Rate) and hold the average power of the baseband signal close to the desired set point. DAGC function in baseband processor is done in few steps: measuring power levels of baseband samples of an RF signal,accumulating the differences between the measured power level and actual gain setting, adjusting a gain factor of the accumulation, and applying the adjusted gain factor the baseband values. Based on the measurement results of RSSI signal dependence to input power we have concluded that this digital AGC can be implemented applying the simple linearization of the RSSI. This solution is very simple but also effective and reduces complexity and power consumption of the DAGC. This DAGC is implemented and tested both in FPGA and in ASIC as a part of our WLAN baseband processor. Finally, we have integrated this circuit in a compact WLAN PCMCIA board based on MAC and baseband ASIC chips designed from us.

Keywords: WLAN, AGC, RSSI, baseband processor

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8697 Explicit Delay and Power Estimation Method for CMOS Inverter Driving on-Chip RLC Interconnect Load

Authors: Susmita Sahoo, Madhumanti Datta, Rajib Kar

Abstract:

The resistive-inductive-capacitive behavior of long interconnects which are driven by CMOS gates are presented in this paper. The analysis is based on the ¤Ç-model of a RLC load and is developed for submicron devices. Accurate and analytical expressions for the output load voltage, the propagation delay and the short circuit power dissipation have been proposed after solving a system of differential equations which accurately describe the behavior of the circuit. The effect of coupling capacitance between input and output and the short circuit current on these performance parameters are also incorporated in the proposed model. The estimated proposed delay and short circuit power dissipation are in very good agreement with the SPICE simulation with average relative error less than 6%.

Keywords: Delay, Inverter, Short Circuit Power, ¤Ç-Model, RLCInterconnect, VLSI

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8696 Speed Characteristics of Mixed Traffic Flow on Urban Arterials

Authors: Ashish Dhamaniya, Satish Chandra

Abstract:

Speed and traffic volume data are collected on different sections of four lane and six lane roads in three metropolitan cities in India. Speed data are analyzed to fit the statistical distribution to individual vehicle speed data and all vehicles speed data. It is noted that speed data of individual vehicle generally follows a normal distribution but speed data of all vehicle combined at a section of urban road may or may not follow the normal distribution depending upon the composition of traffic stream. A new term Speed Spread Ratio (SSR) is introduced in this paper which is the ratio of difference in 85th and 50th percentile speed to the difference in 50th and 15th percentile speed. If SSR is unity then speed data are truly normally distributed. It is noted that on six lane urban roads, speed data follow a normal distribution only when SSR is in the range of 0.86 – 1.11. The range of SSR is validated on four lane roads also.

Keywords: Normal distribution, percentile speed, speed spread ratio, traffic volume.

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8695 X-Ray Intensity Measurement Using Frequency Output Sensor for Computed Tomography

Authors: R. M. Siddiqui, D. Z. Moghaddam, T. R. Turlapati, S. H. Khan, I. Ul Ahad

Abstract:

Quality of 2D and 3D cross-sectional images produce by Computed Tomography primarily depend upon the degree of precision of primary and secondary X-Ray intensity detection. Traditional method of primary intensity detection is apt to errors. Recently the X-Ray intensity measurement system along with smart X-Ray sensors is developed by our group which is able to detect primary X-Ray intensity unerringly. In this study a new smart X-Ray sensor is developed using Light-to-Frequency converter TSL230 from Texas Instruments which has numerous advantages in terms of noiseless data acquisition and transmission. TSL230 construction is based on a silicon photodiode which converts incoming X-Ray radiation into the proportional current signal. A current to frequency converter is attached to this photodiode on a single monolithic CMOS integrated circuit which provides proportional frequency count to incoming current signal in the form of the pulse train. The frequency count is delivered to the center of PICDEM FS USB board with PIC18F4550 microcontroller mounted on it. With highly compact electronic hardware, this Demo Board efficiently read the smart sensor output data. The frequency output approaches overcome nonlinear behavior of sensors with analog output thus un-attenuated X-Ray intensities could be measured precisely and better normalization could be acquired in order to attain high resolution.

Keywords: Computed tomography, detector technology, X-Ray intensity measurement

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8694 Theoretical Considerations of the Influence of Mechanical Uniaxial Stress on Pixel Readout Circuits

Authors: Georgios C. Dogiamis, Bedrich J. Hosticka, Anton Grabmaier

Abstract:

In this work the effects of uniaxial mechanical stress on a pixel readout circuit are theoretically analyzed. It is the effects of mechanical stress on the in-pixel transistors do not arise at the output, when a correlated double sampling circuit is used. However, mechanical stress effects on the photodiode will directly appear at the readout chain output. Therefore, compensation techniques are needed to overcome this situation. Moreover simulation technique of mechanical stress is proposed and diverse layout as well as design recommendations are put forward, in order to minimize stress related effects on the output of a circuit. he shown, that wever, Moreover, a out

Keywords: mechanical uniaxial stress, pixel readout circuit

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8693 Overview of Multi-Chip Alternatives for 2.5D and 3D Integrated Circuit Packagings

Authors: Ching-Feng Chen, Ching-Chih Tsai

Abstract:

With the size of the transistor gradually approaching the physical limit, it challenges the persistence of Moore’s Law due to such issues of the short channel effect and the development of the high numerical aperture (NA) lithography equipment. In the context of the ever-increasing technical requirements of portable devices and high-performance computing (HPC), relying on the law continuation to enhance the chip density will no longer support the prospects of the electronics industry. Weighing the chip’s power consumption-performance-area-cost-cycle time to market (PPACC) is an updated benchmark to drive the evolution of the advanced wafer nanometer (nm). The advent of two and half- and three-dimensional (2.5 and 3D)- Very-Large-Scale Integration (VLSI) packaging based on Through Silicon Via (TSV) technology has updated the traditional die assembly methods and provided the solution. This overview investigates the up-to-date and cutting-edge packaging technologies for 2.5D and 3D integrated circuits (IC) based on the updated transistor structure and technology nodes. We conclude that multi-chip solutions for 2.5D and 3D IC packaging can prolong Moore’s Law.

Keywords: Moore’s Law, High Numerical Aperture, Power Consumption-Performance-Area-Cost-Cycle Time to Market, PPACC, 2.5 and 3D-Very-Large-Scale Integration Packaging, Through Silicon Vi.

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8692 Desktop High-Speed Aerodynamics by Shallow Water Analogy in a Tin Box for Engineering Students

Authors: Etsuo Morishita

Abstract:

In this paper, we show shallow water in a tin box as an analogous simulation tool for high-speed aerodynamics education and research. It is customary that we use a water tank to create shallow water flow. While a flow in a water tank is not necessarily uniform and is sometimes wavy, we can visualize a clear supercritical flow even when we move a body manually in stationary water in a simple shallow tin box. We can visualize a blunt shock wave around a moving circular cylinder together with a shock pattern around a diamond airfoil. Another interesting analogous experiment is a hydrodynamic shock tube with water and tea. We observe the contact surface clearly due to color difference of the two liquids those are invisible in the real gas dynamics experiment. We first revisit the similarities between high-speed aerodynamics and shallow water hydraulics. Several educational and research experiments are then introduced for engineering students. Shallow water experiments in a tin box simulate properly the high-speed flows.

Keywords: Aerodynamics compressible flow, gas dynamics, hydraulics, shock wave.

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8691 Design and Study of a DC/DC Converter for High Power, 14.4 V and 300 A for Automotive Applications

Authors: Julio Cesar Lopes de Oliveira, Carlos Henrique Gonc¸alves Treviso

Abstract:

The shortage of the automotive market in relation to options for sources of high power car audio systems, led to development of this work. Thus, we developed a source with stabilized voltage with 4320 W effective power. Designed to the voltage of 14.4 V and a choice of two currents: 30 A load option in battery banks and 300 A at full load. This source can also be considered as a source of general use dedicated commercial with a simple control circuit in analog form based on discrete components. The assembly of power circuit uses a methodology for higher power than the initially stipulated.

Keywords: DC-DC power converters, converters, power convertion, pulse width modulation converters.

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8690 Enhance the Modeling of BLDC Motor Based on Fuzzy Logic

Authors: Murugan Marimuthu, Jeyabharath Rajaih

Abstract:

This paper describes a simple way to control the speed of PMBLDC motor using Fuzzy logic control method. In the conventional PI controller the performance of the motor system is simulated and the speed is regulated by using PI controller. These methods used to improve the performance of PMSM drives, but in some cases at different operating conditions when the dynamics of the system also vary over time and it can change the reference speed, parameter variations and the load disturbance. The simulation is powered with the MATLAB program to get a reliable and flexible simulation. In order to highlight the effectiveness of the speed control method the FLC method is used. The proposed method targeted in achieving the improved dynamic performance and avoids the variations of the motor drive. This drive has high accuracy, robust operation from near zero to high speed. The effectiveness and flexibility of the individual techniques of the speed control method will be thoroughly discussed for merits and demerits and finally verified through simulation and experimental results for comparative analysis.

Keywords: Hall position sensors, permanent magnet brushless DC motor, PI controller, Fuzzy Controller.

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8689 A Study on Unidirectional Analog Output Voltage Inverter for Capacitive Load

Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang

Abstract:

For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit.

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8688 Conceptional Design of a Hyperloop Capsule with Linear Induction Propulsion System

Authors: Ahmed E. Hodaib, Samar F. Abdel Fattah

Abstract:

High-speed transportation is a growing concern. To develop high-speed rails and to increase high-speed efficiencies, the idea of Hyperloop was introduced. The challenge is to overcome the difficulties of managing friction and air-resistance which become substantial when vehicles approach high speeds. In this paper, we are presenting the methodologies of the capsule design which got a design concept innovation award at SpaceX competition in January, 2016. MATLAB scripts are written for the levitation and propulsion calculations and iterations. Computational Fluid Dynamics (CFD) is used to simulate the air flow around the capsule considering the effect of the axial-flow air compressor and the levitation cushion on the air flow. The design procedures of a single-sided linear induction motor are analyzed in detail and its geometric and magnetic parameters are determined. A structural design is introduced and Finite Element Method (FEM) is used to analyze the stresses in different parts. The configuration and the arrangement of the components are illustrated. Moreover, comments on manufacturing are made.

Keywords: High-speed transportation, Hyperloop, railways transportation, single-sided linear induction motor.

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8687 HEXAFLY-INT Project: Design of a High Speed Flight Experiment

Authors: S. Di Benedetto, M. P. Di Donato, A. Rispoli, S. Cardone, J. Riehmer, J. Steelant, L. Vecchione

Abstract:

Thanks to a coordinated funding by the European Space Agency (ESA) and the European Commission (EC) within the 7th framework program, the High-Speed Experimental Fly Vehicles – International (HEXAFLY-INT) project is aimed at the flight validation of hypersonics technologies enabling future trans-atmospheric flights. The project, which is currently involving partners from Europe, Russian Federation and Australia operating under ESA/ESTEC coordination, will achieve the goal of designing, manufacturing, assembling and flight testing an unpowered high speed vehicle in a glider configuration by 2018. The main technical challenges of the project are specifically related to the design of the vehicle gliding configuration and to the complexity of integrating breakthrough technologies with standard aeronautical technologies, e.g. high temperature protection system and airframe cold structures. Also, the sonic boom impact, which is one of the environmental challenges of the high speed flight, will be assessed. This paper provides a comprehensive and detailed update on all the current projects activities carried out to date on both the vehicle and mission design.

Keywords: Design, flight testing, hypersonics, integration.

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8686 Adaptation Learning Speed Control for a High- Performance Induction Motor using Neural Networks

Authors: M. Zerikat, S. Chekroun

Abstract:

This paper proposes an effective adaptation learning algorithm based on artificial neural networks for speed control of an induction motor assumed to operate in a high-performance drives environment. The structure scheme consists of a neural network controller and an algorithm for changing the NN weights in order that the motor speed can accurately track of the reference command. This paper also makes uses a very realistic and practical scheme to estimate and adaptively learn the noise content in the speed load torque characteristic of the motor. The availability of the proposed controller is verified by through a laboratory implementation and under computation simulations with Matlab-software. The process is also tested for the tracking property using different types of reference signals. The performance and robustness of the proposed control scheme have evaluated under a variety of operating conditions of the induction motor drives. The obtained results demonstrate the effectiveness of the proposed control scheme system performances, both in steady state error in speed and dynamic conditions, was found to be excellent and those is not overshoot.

Keywords: Electric drive, Induction motor, speed control, Adaptive control, neural network, High Performance.

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8685 Analog Front End Low Noise Amplifier in 0.18-µm CMOS for Ultrasound Imaging Applications

Authors: Haridas Kuruveettil, Dongning Zhao, Cheong Jia Hao, Minkyu Je

Abstract:

We present the design of Analog front end (AFE) low noise pre-amplifier implemented in a high voltage 0.18-µm CMOS technology for  a three dimensional ultrasound  bio microscope (3D UBM) application. The fabricated chip has 4X16 pre-amplifiers implemented to interface   a 2-D array of    high frequency capacitive micro-machined ultrasound transducers (CMUT). Core AFE cell consists of a high-voltage pulser in the transmit path, and a low-noise transimpedance amplifier in the receive path. Proposed system offers a high image resolution by the use of high frequency CMUTs with associated high performance imaging electronics integrated together.  Performance requirements and the design methods of the high bandwidth transimpedance amplifier are described in the paper. A single cell of transimpedance (TIA) amplifier and the bias circuit occupies a silicon area of 250X380 µm2 and the full chip occupies a total silicon area of 10x6.8 mm².

Keywords: Ultrasound, analog front end, medical imaging, beam forming, biomicroscope, transimpedance gain.

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8684 Application of the Virtual Reality Modeling Language for Design of Automated Workplaces

Authors: Jozef Novak-Marcincin

Abstract:

Virtual Reality Modelling Language (VRML) is description language, which belongs to a field Window on World virtual reality system. The file, which is in VRML format, can be interpreted by VRML explorer in three-dimensional scene. VRML was created with aim to represent virtual reality on Internet easier. Development of 3D graphic is connected with Silicon Graphic Corporation. VRML 2.0 is the file format for describing interactive 3D scenes and objects. It can be used in collaboration with www, can be used for 3D complex representations creating of scenes, products or VR applications VRML 2.0 enables represent static and animated objects too. Interesting application of VRML is in area of manufacturing systems presentation.

Keywords: Virtual reality, virtual reality modelling language, design of workplaces, technological workplaces.

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8683 Investigation of Threshold Voltage Shift in Gamma Irradiated N-Channel and P-Channel MOS Transistors of CD4007

Authors: S. Boorboor, S. A. H. Feghhi, H. Jafari

Abstract:

The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from ID-VG characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.

Keywords: Threshold voltage shift, MOS transistor, linear extrapolation, gamma irradiation.

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