Search results for: open circuit fault diagnosis

Authors: Sabrina Azzi, Michal Iglewski, Véronique Nabelsi

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Diagnosis error problem is frequent and one of the most important safety problems today. One of the main objectives of our work is to propose an ontological representation that takes into account the diagnostic criteria in order to improve the diagnostic. We choose pneumonia disease since it is one of the frequent diseases affected by diagnosis errors and have harmful effects on patients. To achieve our aim, we use a semi-automated method to integrate diverse knowledge sources that include publically available pneumonia disease guidelines from international repositories, biomedical ontologies and electronic health records. We follow the principles of the Open Biomedical Ontologies (OBO) Foundry. The resulting ontology covers symptoms and signs, all the types of pneumonia, antecedents, pathogens, and diagnostic testing. The first evaluation results show that most of the terms are covered by the ontology. This work is still in progress and represents a first and major step toward a development of a diagnosis decision support system for pneumonia.

Keywords: Clinical decision support system, diagnostic errors, ontology, pneumonia.

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Authors: Wei Yi Lim, M. Annamalai Arasu, M. Kumarasamy Raja, Minkyu Je

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In this paper, the design of wide-swing constant transconductance (g_m) bias circuit that generates bias voltage for low-noise amplifier (LNA) circuit design by using an off-chip resistor is demonstrated. The overall transconductance (G_m) generated by the constant g_m bias circuit is important to maintain the overall gain and noise figure of the LNA circuit. Therefore, investigation is performed to study the variation in G_m with process, temperature and supply voltage (PVT).  Temperature and supply voltage are swept from -10 °C to 85 °C and 1.425 V to 1.575 V respectively, while the process conditions are also varied to the extreme and the g_m variation is eventually concluded at between -3 % to 7 %. With the slight variation in the g_m value, through simulation, at worst condition of state SS, we are able to attain a conversion gain (S₂₁) variation of -3.10 % and a noise figure (NF) variation of 18.71 %. The whole constant g_m circuit draws approximately 100 µA from a 1.5V supply and is designed based on 0.13 µm CMOS process. 

Keywords: Transconductance, LNA, temperature, process.

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Authors: Okan Özgönenel

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This paper presents the development of a wavelet based algorithm, for distinguishing between magnetizing inrush currents and power system fault currents, which is quite adequate, reliable, fast and computationally efficient tool. The proposed technique consists of a preprocessing unit based on discrete wavelet transform (DWT) in combination with an artificial neural network (ANN) for detecting and classifying fault currents. The DWT acts as an extractor of distinctive features in the input signals at the relay location. This information is then fed into an ANN for classifying fault and magnetizing inrush conditions. A 220/55/55 V, 50Hz laboratory transformer connected to a 380 V power system were simulated using ATP-EMTP. The DWT was implemented by using Matlab and Coiflet mother wavelet was used to analyze primary currents and generate training data. The simulated results presented clearly show that the proposed technique can accurately discriminate between magnetizing inrush and fault currents in transformer protection.

Keywords: Artificial neural network, discrete wavelet transform, fault detection, magnetizing inrush current.

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Authors: Raj Kumar Rajak, Bharat Mishra

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Bio-batteries represent an entirely new long-term, reasonable, reachable and ecofriendly approach to produce sustainable energy. In the present experimental work, we have studied the effect of generation of power by bio-battery using different electrode pairs. The tests show that it is possible to generate electricity using cow dung as an electrolyte. C-Mg electrode pair shows maximum voltage and SCC (Short Circuit Current) while C-Zn electrode pair shows less OCV (Open Circuit Voltage) and SCC. We have chosen C-Zn electrodes because Mg electrodes are not economical. By the studies of different electrodes and cow dung, it is found that C-Zn electrode battery is more suitable. This result shows that the bio-batteries have the potency to full fill the need of electricity demand for lower energy equipment.

Keywords: Bio-batteries, electricity, cow dung, electrodes, non-conventional.

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Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

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In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor.

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Authors: Ibrahim A. Khorwat, Nabil Naas

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In this paper, we present a simple circuit for Manchester decoding and without using any complicated or programmable devices. This circuit can decode 90kbps of transmitted encoded data; however, greater than this transmission rate can be decoded if high speed devices were used. We also present a new method for extracting the embedded clock from Manchester data in order to use it for serial-to-parallel conversion. All of our experimental measurements have been done using simulation.

Keywords: High threshold level, level segregation, lowthreshold level, smoothing circuit synchronization..

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Authors: Abolhassan Razminia, Mohammad-Ali Sadrnia

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Chua’s circuit is one of the most important electronic devices that are used for Chaos and Bifurcation studies. A central role of secure communication is devoted to it. Since the adaptive control is used vastly in the linear systems control, here we introduce a new trend of application of adaptive method in the chaos controlling field. In this paper, we try to derive a new adaptive control scheme for Chua’s circuit controlling because control of chaos is often very important in practical operations. The novelty of this approach is for sake of its robustness against the external perturbations which is simulated as an additive noise in all measured states and can be generalized to other chaotic systems. Our approach is based on Lyapunov analysis and the adaptation law is considered for the feedback gain. Because of this, we have named it NAFT (Nonlinear Adaptive Feedback Technique). At last, simulations show the capability of the presented technique for Chua’s circuit.

Keywords: Chaos, adaptive control, nonlinear control, Chua's circuit.

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Authors: Azza M. Anis, M. M. Abutaleb, Hani F. Ragai, M. I. Eladawy

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This paper presents the characterization and design of a capacitive pressure sensor with LC-based 0.35 µm CMOS readout circuit. SPICE is employed to evaluate the characteristics of the readout circuit and COMSOL multiphysics structural analysis is used to simulate the behavior of the pressure sensor. The readout circuit converts the capacitance variation of the pressure sensor into the frequency output. Simulation results show that the proposed pressure sensor has output frequency from 2.50 to 2.28 GHz in a pressure range from 0.1 to 2 MPa almost linearly. The sensitivity of the frequency shift with respect to the applied pressure load is 0.11 GHz/MPa.

Keywords: CMOS LC-based oscillator, micro pressure sensor, silicon carbide

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Authors: H. El-Kamchouchi, Heba Gaber, Fatma Ahmed, Dalia H. El-Kamchouchi

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Due to the rapid growth in modern communication systems, fault tolerance and data security are two important issues in a secure transaction. During the transmission of data between the sender and receiver, errors may occur frequently. Therefore, the sender must re-transmit the data to the receiver in order to correct these errors, which makes the system very feeble. To improve the scalability of the scheme, we present a secure proxy signature scheme with fault tolerance over an efficient and secure authenticated key agreement protocol based on RSA system. Authenticated key agreement protocols have an important role in building a secure communications network between the two parties.

Keywords: Proxy signature, fault tolerance, RSA, key agreement protocol.

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Authors: Mamidi Ramakrishna Rao

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Doubly-fed induction generator (DFIG) is currently the choice for many wind turbines. These generators, when connected to the grid through a converter, is subjected to varied power system conditions like voltage variation, frequency variation, short circuit fault conditions, etc. Further, many countries like Canada, Germany, UK, Scotland, etc. have distinct grid codes relating to wind turbines. Accordingly, following the network faults, wind turbines have to supply a definite reactive current. To satisfy the requirements including reactive current capability, an optimum electrical design becomes a mandate for DFIG to function. This paper intends to optimize the equivalent circuit parameters of an electrical design for satisfactory DFIG performance. Direct search method has been used for optimization of the parameters. The variables selected include electromagnetic core dimensions (diameters and stack length), slot dimensions, radial air gap between stator and rotor and winding copper cross section area. Optimization for 2 MW DFIG has been executed separately for three objective functions - maximum reactive power capability (Case I), maximum efficiency (Case II) and minimum weight (Case III). In the optimization analysis program, voltage variations (10%), power factor- leading and lagging (0.95), speeds for corresponding to slips (-0.3 to +0.3) have been considered. The optimum designs obtained for objective functions were compared. It can be concluded that direct search method of optimization helps in determining an optimum electrical design for each objective function like efficiency or reactive power capability or weight minimization.

Keywords: Direct search, DFIG, equivalent circuit parameters, optimization.

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Authors: Markus G. Ortner, Christian Magele, Klaus Krischan

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Knowledge about the magnetic quantities in a magnetic circuit is always of great interest. On the one hand, this information is needed for the simulation of a transformer. On the other hand, parameter studies are more reliable, if the magnetic quantities are derived from a well established model. One possibility to model the 3-phase transformer is by using a magnetic equivalent circuit (MEC). Though this is a well known system, it is often not an easy task to set up such a model for a large number of lumped elements which additionally includes the nonlinear characteristic of the magnetic material. Here we show the setup of a solver for a MEC and the results of the calculation in comparison to measurements taken. The equations of the MEC are based on a rearranged system of the nodal analysis. Thus it is possible to achieve a minimum number of equations, and a clear and simple structure. Hence, it is uncomplicated in its handling and it supports the iteration process. Additional helpful tasks are implemented within the solver to enhance the performance. The electric circuit is described by an electric equivalent circuit (EEC). Our results for the 3-phase transformer demonstrate the computational efficiency of the solver, and show the benefit of the application of a MEC.

Keywords: Inrush current, magnetic equivalent circuit, nonlinear behavior, transformer.

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Authors: G. Ramesh, S. Sundara Vadivelu

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For several high speed networks, providing resilience against failures is an essential requirement. The main feature for designing next generation optical networks is protecting and restoring high capacity WDM networks from the failures. Quick detection, identification and restoration make networks more strong and consistent even though the failures cannot be avoided. Hence, it is necessary to develop fast, efficient and dependable fault localization or detection mechanisms. In this paper we propose a new fault localization algorithm for WDM networks which can identify the location of a failure on a failed lightpath. Our algorithm detects the failed connection and then attempts to reroute data stream through an alternate path. In addition to this, we develop an algorithm to analyze the information of the alarms generated by the components of an optical network, in the presence of a fault. It uses the alarm correlation in order to reduce the list of suspected components shown to the network operators. By our simulation results, we show that our proposed algorithms achieve less blocking probability and delay while getting higher throughput.

Keywords: Alarm correlation, blocking probability, delay, fault localization, WDM networks.

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Authors: Qingjiang Li, Hui Xu, Haijun Liu, Xiaobo Tian

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To judge whether the memristor can be interpreted as the fourth fundamental circuit element, we propose a variable-relation criterion of fundamental circuit elements. According to the criterion, we investigate the nature of three fundamental circuit elements and the memristor. From the perspective of variables relation, the memristor builds a direct relation between the voltage across it and the current through it, instead of a direct relation between the magnetic flux and the charge. Thus, it is better to characterize the memristor and the resistor as two special cases of the same fundamental circuit element, which is the memristive system in Chua-s new framework. Finally, the definition of memristor is refined according to the difference between the magnetic flux and the flux linkage.

Keywords: Memristor, Fundamental, Variable-Relation Criterion, Memristive system

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Authors: Yin Yin Phyo, Tun Lin Naing

Abstract:

This paper investigated the simulation of two-phase interleaved boost converter (IBC) with free and open-source software Scilab/Xcos. By using interleaved method, it can reduce current stress on components, components size, input current ripple and output voltage ripple. The required mathematical model is obtained from the equivalent circuit of its different four modes of operation for simulation. The equivalent circuits are considered in continuous conduction mode (CCM). The average values of the system variables are derived from the state-space equation to find the equilibrium point. Scilab is now becoming more and more popular among students, engineers and scientists because it is open-source software and free of charge. It gives a great convenience because it has powerful computation and simulation function. The waveforms of output voltage, input current and inductors current are obtained by using Scilab/Xcos.

Keywords: Two-phase boost converter, continuous conduction mode, free and open-source, interleaved method, dynamic simulation.

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Authors: Md. Asif Jahangir Chowdhury, Md. Shahriar Rizwan, M. S. Islam

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In CMOS integrated circuit design there is a trade-off between static power consumption and technology scaling. Recently, the power density has increased due to combination of higher clock speeds, greater functional integration, and smaller process geometries. As a result static power consumption is becoming more dominant. This is a challenge for the circuit designers. However, the designers do have a few methods which they can use to reduce this static power consumption. But all of these methods have some drawbacks. In order to achieve lower static power consumption, one has to sacrifice design area and circuit performance. In this paper, we propose a new method to reduce static power in the CMOS VLSI circuit using Variable Body Biasing technique without being penalized in area requirement and circuit performance.

Keywords: variable body biasing, state saving technique, stack effect, dual V-th, static power reduction.

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Authors: J. Mohan, S. Maheshwari

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A new circuit topology realizing a first-order currentmode all-pass filter is proposed using two dual-output second generation current conveyor and two passive components. The circuit possesses low-input and high-output impedance, which makes it ideal for current-mode systems. The proposed circuit is verified through PSPICE simulation results.

Keywords: active filter, all-pass filter, current-mode, current conveyor.

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Authors: Chenguang Guo, Lei Chen, Yanlong Zhang

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This paper describes a novel optimized JTAG interface circuit between a JTAG controller and target IC. Being able to access JTAG using only one or two pins, this circuit does not change the original boundary scanning test frequency of target IC. Compared with the traditional JTAG interface which based on IEEE std. 1149.1, this reduced pin technology is more applicability in pin limited devices, and it is easier to control the scale of target IC for the designer.

Keywords: Boundary scan, JTAG interface, Test frequency, Reduced pin

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Authors: Raj Kumar Rajak, Bharat Mishra

Abstract:

Bio-batteries represent an entirely new long-term, reasonable, reachable, and eco-friendly approach to generation of sustainable energy. In the present experimental work, we have studied the effect of the generation of power by bio-battery using different electrode pairs. The tests show that it is possible to generate electricity using cow’s urine as an electrolyte. C-Mg electrode pair shows maximum Voltage and Short Circuit Current (SCC), while C-Zn electrode pair shows less Open Circuit Voltage (OCV) and SCC. By the studies of cow urine and different electrodes, it is found that C-Zn electrode battery is more economical. The cow urine battery with C-Zn electrode provides maximum power (707.4 mW) and durability (up to 145 h). This result shows that the bio-batteries have the potency to full fill the need of electricity demand for lower energy equipment.

Keywords: Bio-batteries, cow’s urine, electrodes, non-conventional.

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Authors: Meenakshi Bheevgade, Rajendra M. Patrikar

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In today-s new technology era, cluster has become a necessity for the modern computing and data applications since many applications take more time (even days or months) for computation. Although after parallelization, computation speeds up, still time required for much application can be more. Thus, reliability of the cluster becomes very important issue and implementation of fault tolerant mechanism becomes essential. The difficulty in designing a fault tolerant cluster system increases with the difficulties of various failures. The most imperative obsession is that the algorithm, which avoids a simple failure in a system, must tolerate the more severe failures. In this paper, we implemented the theory of watchdog timer in a parallel environment, to take care of failures. Implementation of simple algorithm in our project helps us to take care of different types of failures; consequently, we found that the reliability of this cluster improves.

Keywords: Cluster, Fault tolerant, Grid, Grid ComputingSystem, Meta-computing.

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Authors: Yin Myo Min Htwe, Shen WenBin

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The purpose of the present study is the calculation of Gutenber-Richter parameters (a, b) and analyze the mean annual rate of exceedance of earthquake magnitude (Om ) of southern segment of the Sagaing fault and its associate components. The study area is situated about 200 km radius centered at Yangon. Earthquake data file is using from 1975 to 2006 August 31. The bounded Gutenberg- Richter recurrence law for 0 M is 4.0 and max M is 7.5.

Keywords: Gutenberg-Richter recurrence law, meanannual rate of exceedance, Sagaing fault.

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Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage.

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Authors: Sheela Tiwari, R. Naresh, R. Jha

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The paper presents an investigation in to the effect of neural network predictive control of UPFC on the transient stability performance of a multimachine power system. The proposed controller consists of a neural network model of the test system. This model is used to predict the future control inputs using the damped Gauss-Newton method which employs ‘backtracking’ as the line search method for step selection. The benchmark 2 area, 4 machine system that mimics the behavior of large power systems is taken as the test system for the study and is subjected to three phase short circuit faults at different locations over a wide range of operating conditions. The simulation results clearly establish the robustness of the proposed controller to the fault location, an increase in the critical clearing time for the circuit breakers, and an improved damping of the power oscillations as compared to the conventional PI controller.

Keywords: Identification, Neural networks, Predictive control, Transient stability, UPFC.

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Authors: Aakash Subramanian, Vansh Pal Singh Makh, Abhijit Mitra

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A new digital transceiver circuit for asynchronous frame detection is proposed where both the transmitter and receiver contain all digital components, thereby avoiding possible use of conventional devices like monostable multivibrators with unstable external components such as resistances and capacitances. The proposed receiver circuit, in particular, uses a combinational logic block yielding an output which changes its state as soon as the start bit of a new frame is detected. This, in turn, helps in generating an efficient receiver sampling clock. A data latching circuit is also used in the receiver to latch the recovered data bits in any new frame. The proposed receiver structure is also extended from 4- bit information to any general n data bits within a frame with a common expression for the output of the combinational logic block. Performance of the proposed hardware design is evaluated in terms of time delay, reliability and robustness in comparison with the standard schemes using monostable multivibrators. It is observed from hardware implementation that the proposed circuit achieves almost 33 percent speed up over any conventional circuit.

Keywords: Asynchronous Communication, Digital Detector, Combinational logic output, Sampling clock generator, Hardwareimplementation.

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Authors: N. Zerzouri, H. Labar, S. Kechida

Abstract:

During recent years wind turbine technology has undergone rapid developments. Growth in size and the optimization of wind turbines has enabled wind energy to become increasingly competitive with conventional energy sources. As a result today-s wind turbines participate actively in the power production of several countries around the world. These developments raise a number of challenges to be dealt with now and in the future. The penetration of wind energy in the grid raises questions about the compatibility of the wind turbine power production with the grid. In particular, the contribution to grid stability, power quality and behavior during fault situations plays therefore as important a role as the reliability. In the present work, we addressed two fault situations that have shown their influence on the generator and the behavior of the wind over the defects which are briefly discussed based on simulation results.

Keywords: Doubly fed induction generator (DFIG), Wind energy, grid fault

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Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

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This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: Divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver.

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Authors: Chaiyut Sumpavakup, Thanatchai Kulworawanichpong

Abstract:

This paper presents the voltage regulation scheme of D-STATCOM under three-phase faults. It consists of the voltage detection and voltage regulation schemes in the 0dq reference. The proposed control strategy uses the proportional controller in which the proportional gain, kp, is appropriately adjusted by using genetic algorithms. To verify its use, a simplified 4-bus test system is situated by assuming a three-phase fault at bus 4. As a result, the DSTATCOM can resume the load voltage to the desired level within 1.8 ms. This confirms that the proposed voltage regulation scheme performs well under three-phase fault events.

Keywords: D-STATCOM, proportional controller, genetic algorithms.

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Authors: Jyh-Cherng Gu, Ming-Ta Yang, Chao-Fong Yan, Hsin-Yung Chung, Yung-Ruei Chang, Yih-Der Lee, Chen-Min Chan, Chia-Hao Hsu

Abstract:

There are a number of Distributed Generations (DGs) installed in microgrid, which may have diverse path and direction of power flow or fault current. The overcurrent protection scheme for the traditional radial type distribution system will no longer meet the needs of microgrid protection. Integrating the Intelligent Electronic Device (IED) and a Supervisory Control and Data Acquisition (SCADA) with IEC 61850 communication protocol, the paper proposes a Microgrid Protection Management System (MPMS) to protect power system from the fault. In the proposed method, the MPMS performs logic programming of each IED to coordinate their tripping sequence. The GOOSE message defined in IEC 61850 is used as the transmission information medium among IEDs. Moreover, to cope with the difference in fault current of microgrid between grid-connected mode and islanded mode, the proposed MPMS applies the group setting feature of IED to protect system and robust adaptability. Once the microgrid topology varies, the MPMS will recalculate the fault current and update the group setting of IED. Provided there is a fault, IEDs will isolate the fault at once. Finally, the Matlab/Simulink and Elipse Power Studio software are used to simulate and demonstrate the feasibility of the proposed method.

Keywords: IEC 61850, IED, Group Setting, Microgrid.

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Authors: C. Ardil

Abstract:

This paper presents the open science philosophy and paradigm of scientific research on how to transform classical research and innovation approaches. Open science is the practice of providing free and unrestricted online access to the products of scholarly research. Open science advocates for the immediate and unrestricted online access to published, peer-reviewed research in digital format. Open science research is made available for free in perpetuity and includes guidelines and/or licenses that communicate how researchers and readers can share and re-use the digital content. The emergence of open science has changed the scholarly research and publishing landscape, making research more broadly accessible to academic and non-academic audiences alike. Consequently, open science philosophy and its practice are discussed to cover all aspects of cyberscience in the context of research and innovation excellence for the benefit of global society.

Keywords: Open science, open data, open access, cyberscience , cybertechnology.

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Authors: Puteri Nemie Jahn Kassim, Khadijah Mohd Najid

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Medical negligence disputes in Malaysia are mainly resolved through litigation by using the tort system. The tort system, being adversarial in nature has subjected parties to litigation hazards such as delay, excessive costs and uncertainty of outcome. The dissatisfaction of the tort system in compensating medically injured victims has created various alternatives to litigation. Amongst them is the implementation of a no-fault compensation system which would allow compensation to be given without the need of proving fault on the medical personnel. Instead, the community now bears the burden of compensating and at the end, promotes collective responsibility. For Malaysia, introducing a no-fault system would provide a tempting solution and may ultimately, achieve justice for the medical injured victims. Nevertheless, such drastic change requires a great deal of consideration to determine the suitability of the system and whether or not it will eventually cater for the needs of the Malaysian population

Keywords: Medical Disputes, Litigation, Malaysia, No-Fault Compensation.

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Authors: M. Nassereddine, J. Rizk, A. Hellany, M. Nagrial

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The prologue of new High Voltage (HV) transmission mains into the community necessitates earthing design to ensure safety compliance of the system. Conductive structures such as steel or concrete poles are widely used in HV transmission mains. The earth potential rise (EPR) generated by a fault on these structures could result to an unsafe condition. This paper discusses information on the input impedance of the over head earth wire (OHEW) system for finite and infinite transmission mains. The definition of finite and infinite system is discussed, maximum EPR due to pole fault. The simplified equations for EPR assessments are introduced and discussed for the finite and infinite conditions. A case study is also shown.

Keywords: Coupling Factor, Earth Grid, EPR, Fault Current Distribution, High Voltage, Line Impedance, OHEW, Split Factor, Transmission Mains.

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