Search results for: Diode Clamped Multi-Level Inverter

Authors: M. S. Sivagamasundari, P. Melba Mary

Abstract:

Multilevel inverter is a promising inverter topology for high voltage and high power applications. This inverter synthesizes several different levels of DC voltages to produce a stepped AC output that approaches the pure sine waveform. The three different topologies, diode-clamped inverter, capacitor-clamped inverter and cascaded h-bridge multilevel inverter are widely used in these multilevel inverters. Among the three topologies, cascaded h-bridge multilevel inverter is more suitable for photovoltaic applications since each PV array can act as a separate dc source for each h-bridge module. This research especially focus on photovoltaic power source as input to the system and shows the potential of a Single Phase Cascaded H-bridge Eleven level inverter governed by the fuzzy logic controller to improve the power quality by reducing the total harmonic distortion at the output voltage. Hence the efficiency of the system will be improved. Simulation using MATLAB/SIMULINK has been done to verify the performance of cascaded h-bridge eleven level inverter using sinusoidal pulse width modulation technique. The simulated output shows very favorable result.

Keywords: Multilevel inverter, Cascaded H-Bridge multilevel inverter, Total Harmonic Distortion, Photovoltaic cell, Sinusoidal pulse width modulation.

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Authors: A. Elnady

Abstract:

This paper presents an improved Direct Power Control (DPC) scheme applied to the multilevel inverter that forms a Distributed Generation Unit (DGU). This paper demonstrates the performance of active and reactive power injected by the DGU to the smart grid. The DPC is traditionally operated by the hysteresis controller with the Space Vector Modulation (SVM) which is applied on the 2-level inverters or 3-level inverters. In this paper, the DPC is operated by the PI controller with the Phase-Disposition Pulse Width Modulation (PD-PWM) applied to the 5-level diode clamped inverter. The new combination of the DPC, PI controller, PD-PWM and multilevel inverter proves that its performance is much better than the conventional hysteresis-SVM based DPC. Simulations results have been presented to validate the performance of the suggested control scheme in the grid-connected mode.

Keywords: Direct power control, PI controller, PD-PWM, and power control.

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Authors: Satish Kumar Peddapelli

Abstract:

This paper presents advances in pulse width modulation techniques which refers to a method of carrying information on train of pulses and the information be encoded in the width of pulses. Pulse Width Modulation is used to control the inverter output voltage. This is done by exercising the control within the inverter itself by adjusting the ON and OFF periods of inverter. By fixing the DC input voltage we get AC output voltage. In variable speed AC motors the AC output voltage from a constant DC voltage is obtained by using inverter. Recent developments in power electronics and semiconductor technology have lead improvements in power electronic systems. Hence, different circuit configurations namely multilevel inverters have became popular and considerable interest by researcher are given on them. A fast space-vector pulse width modulation (SVPWM) method for five-level inverter is also discussed. In this method, the space vector diagram of the five-level inverter is decomposed into six space vector diagrams of three-level inverters. In turn, each of these six space vector diagrams of three-level inverter is decomposed into six space vector diagrams of two-level inverters. After decomposition, all the remaining necessary procedures for the three-level SVPWM are done like conventional two-level inverter. The proposed method reduces the algorithm complexity and the execution time. It can be applied to the multilevel inverters above the five-level also. The experimental setup for three-level diode-clamped inverter is developed using TMS320LF2407 DSP controller and the experimental results are analyzed.

Keywords: Five-level inverter, Space vector pulse wide modulation, diode clamped inverter.

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Authors: B. M. Manjunatha, D. V. Ashok Kumar, M. Vijay Kumar

Abstract:

This paper proposes five level diode clamped Z source Inverter. The existing PWM techniques used for ZSI are restricted for two level. The two level Z Source Inverter have high harmonic distortions which effects the performance of the grid connected PV system. To improve the performance of the system the number of voltage levels in the output waveform need to be increased. This paper presents comparative analysis of a five level diode clamped Z source Inverter with different carrier based Modified Pulse Width Modulation techniques. The parameters considered for comparison are output voltage, voltage gain, voltage stress across switch and total harmonic distortion when powered by same DC supply. Analytical results are verified using MATLAB.

Keywords: Diode Clamped, Pulse Width Modulation, total harmonic distortion, Z Source Inverter.

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Authors: M. Jagabar Sathik, K. Ramani

Abstract:

In this paper family of multilevel inverter topology with reduced number of power switches is presented. The proposed inverter can generate both even and odd level. The proposed topology is suitable for symmetric structure. The proposed symmetric inverter results in reduction of power switches, power diode and gate driver circuits and also it may further minimize the installation area and cost. To prove the superiority of proposed topology is compared with conventional topologies. The performance of this symmetric multilevel inverter has been tested by computer based simulation and prototype based experimental setup for nine-level inverter is developed and results are verified.

Keywords: Cascaded H- Bridge (CHB), Multilevel Inverter (MLI), Nearest Level Modulation (NLM), Total Harmonic Distortion (THD).

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Authors: S.Srinivas

Abstract:

Multi-level voltage source inverters offer several advantages such as; derivation of a refined output voltage with reduced total harmonic distortion (THD), reduction of voltage ratings of the power semiconductor switching devices and also the reduced electro-magnetic-interference problems etc. In this paper, new carrier-overlapped phase-disposition or sub-harmonic sinusoidal pulse width modulation (CO-PD-SPWM) and also the carrieroverlapped phase-disposition space vector modulation (CO-PDSVPWM) schemes for a six-level diode-clamped inverter topology are proposed. The principle of the proposed PWM schemes is similar to the conventional PD-PWM with a little deviation from it in the sense that the triangular carriers are all overlapped. The overlapping of the triangular carriers on one hand results in an increased number of switchings, on the other hand this facilitates an improved spectral performance of the output voltage. It is demonstrated through simulation studies that the six-level diode-clamped inverter with the use of CO-PD-SPWM and CO-PD-SVPWM proposed in this paper is capable of generating multiple levels in its output voltage. The advantages of the proposed PWM schemes can be derived to benefit, especially at lower modulation indices of the inverter and hence this aspect of the proposed PWM schemes can be well exploited in high power applications requiring low speeds of operation of the drive.

Keywords: Diode clamped inverter, Pulse width modulation, Six level inverter, carrier based PWM.

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Authors: Tapan Trivedi, Pramod Agarwal, Rajendrasinh Jadeja, Pragnesh Bhatt

Abstract:

Space Vector Pulse Width Modulation is popular for variable frequency drives. The method has several advantages over carried based PWM and is computation intensive. The implementation of SVPWM for multilevel inverter requires special attention and at the same time consumes considerable resources. Due to faster processing power and reduced over all computational burden, FPGAs are being investigated as an alternative for other controllers. In this paper, a space vector PWM algorithm is implemented using FPGA which requires less computational area and is modular in structure. The algorithm is verified experimentally for Neutral Point Clamped inverter using FPGA development board xc3s5000-4fg900.

Keywords: Modular structure, Multilevel inverter, Space Vector PWM, Switching States.

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Authors: P. Varalaxmi, A. Kirubakaran

Abstract:

This paper presents a thirteen-level asymmetrical cascaded H-bridge single phase inverter. In this configuration, the desired output voltage level is achieved by connecting the DC sources in different combinations by triggering the switches. The modes of operation are explained well for positive level generations. Moreover, a comparison is made with conventional topologies of diode clamped, flying capacitors and cascaded-H-bridge and some recently proposed topologies to show the significance of the proposed topology in terms of reduced part counts. The simulation work has been carried out in MATLAB/Simulink environment. The experimental work is also carried out for lower rating to verify the performance and feasibility of the proposed topology. Further the results are presented for different loading conditions.

Keywords: Multilevel inverter, pulse width modulation, total harmonic distortion, THD.

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Authors: L. Lakhdari, B. Bouchiba, M. Bechar

Abstract:

The multi-level inverters present an important novelty in the field of energy control with high voltage and power. The major advantage of all multi-level inverters is the improvement and spectral quality of its generated output signals. In recent years, various pulse width modulation techniques have been developed. From these technics we have: Sinusoidal Pulse Width Modulation (SPWM) and Space Vector Pulse Width Modulation (SVPWM). This work presents a detailed analysis of the comparative advantage of space vector pulse width modulation (SVPWM) and the standard SPWM technique for Three Level Diode Clamped Inverter fed Induction Motor. The comparison is based on the evaluation of harmonic distortion THD.

Keywords: Induction motor, multi-level inverters, NPC inverter, sinusoidal pulse width modulation, space vector pulse width modulation.

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Authors: K. Benamrane, T. Abdelkrim, T. Benslimane, Aeh. Benkhelifa, B. Bezza

Abstract:

This paper presents a comparison between two Pulse Width Modulation (PWM) algorithms applied to a three-level Neutral Point Clamped (NPC) Voltage Source Inverter (VSI). The first algorithm applied is the triangular-sinusoidal strategy; the second is the Space Vector Pulse Width Modulation (SVPWM) strategy. In the first part, we present a topology of three-level NCP VSI. After that, we develop the two PWM strategies to control this converter. At the end the experimental results are presented.

Keywords: Multilevel inverter, Space vector pulse width modulation (SVPWM), triangular-sinusoidal strategy.

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Authors: P. Kiruthika, K. Ramani

Abstract:

Multi-Level Inverter technology has been developed in the area of high-power medium-voltage energy scheme, because of their advantages such as devices of lower rating can be used thereby enabling the schemes to be used for high voltage applications. Reduced Total Harmonic Distortion (THD).Since the dv/dt is low; the Electromagnetic Interference from the scheme is low. To avoid the switching losses Lower switching frequencies can be used. In this paper present a survey of various topologies, control strategy and modulation techniques used by these inverters. Here the regenerative and superior topologies are also discussed.

Keywords: Cascaded H-bridge Multi-Level Inverter, Diode Clamped Multi-Level Inverter, Flying Capacitors Multi- Level Inverter, Multi-Level Inverter, Total Harmonic Distortion.

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Authors: Imane El Karaoui, Mohammed Maaroufi, Hamid Chaikhy

Abstract:

Doubly Fed Induction Generator (DFIG) is one of the most reliable wind generator. Major problem in wind power generation is to generate Sinusoidal signal with very low THD on variable speed caused by inverter two levels used. This paper presents a multi-level inverter whose objective is to reduce the THD and the dimensions of the output filter. This work proposes a three-level NPC-type inverter, the results simulation are presented demonstrating the efficiency of the proposed inverter.

Keywords: DFIG, multilevel inverter, NPC inverter , THD, Induction machine.

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Authors: A. K. Al-Othman, H. A. Al-Mekhaizim

Abstract:

Multilevel inverters supplied from equal and constant dc sources almost don-t exist in practical applications. The variation of the dc sources affects the values of the switching angles required for each specific harmonic profile, as well as increases the difficulty of the harmonic elimination-s equations. This paper presents an extremely fast optimal solution of harmonic elimination of multilevel inverters with non-equal dc sources using Tanaka's fuzzy linear regression formulation. A set of mathematical equations describing the general output waveform of the multilevel inverter with nonequal dc sources is formulated. Fuzzy linear regression is then employed to compute the optimal solution set of switching angles.

Keywords: Multilevel converters, harmonics, pulse widthmodulation (PWM), optimal control.

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Authors: Gaddafi S. Shehu, T. Yalcinoz, Abdullahi B. Kunya

Abstract:

Multilevel inverters such as flying capacitor, diodeclamped, and cascaded H-bridge inverters are very popular particularly in medium and high power applications. This paper focuses on a cascaded H-bridge module using a single direct current (DC) source in order to generate an 11-level output voltage. The noble approach reduces the number of switches and gate drivers, in comparison with a conventional method. The anticipated topology produces more accurate result with an isolation transformer at high switching frequency. Different modulation techniques can be used for the multilevel inverter, but this work features modulation techniques known as selective harmonic elimination (SHE).This modulation approach reduces the number of carriers with reduction in Switching Losses, Total Harmonic Distortion (THD), and thereby increasing Power Quality (PQ). Based on the simulation result obtained, it appears SHE has the ability to eliminate selected harmonics by chopping off the fundamental output component. The performance evaluation of the proposed cascaded multilevel inverter is performed using PSIM simulation package and THD of 0.94% is obtained.

Keywords: Cascaded H-bridge Multilevel Inverter, Power Quality, Selective Harmonic Elimination.

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Authors: S. Selvaperumal, M. S. Sivagamasundari

Abstract:

In this paper, selective harmonic elimination pulse width modulation technique is employed to eliminate lower order harmonics like third by determination of solving non-linear equations. The cascaded H-bridge five level inverter is driven by the Peripheral Interface Controlled (PIC) Microcontroller 16F877A. The performance of single phase cascaded H-bridge five level inverter with relevant to harmonics and a variety of switches with solar cell as its input source is simulated by employing MATLAB/Simulink. A hardware model is developed to verify the performance of the developed system.

Keywords: Multilevel inverter, cascaded H-Bridge multilevel inverter, total harmonic distortion, selective harmonic elimination pulse width modulation, MATLAB.

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Authors: Venkata Reddy Kota

Abstract:

These days, the industrial trend is moving away from heavy and bulky passive components to power converter systems that use more and more semiconductor elements. Also, it is difficult to connect the traditional converters to the high and medium voltage. For these reasons, a new family of multilevel inverters has appeared as a solution for working with higher voltage levels. Different modulation topologies like Sinusoidal Pulse Width Modulation (SPWM), Selective Harmonic Elimination Pulse Width Modulation (SHE-PWM) are available for multilevel inverters. In this work, different hybrid modulation techniques which are combination of fundamental frequency modulation and multilevel sinusoidal-modulation are compared. The main characteristic of these modulations are reduction of switching losses with good harmonic performance and balanced power loss dissipation among the device. The proposed hybrid modulation schemes are developed and simulated in Matlab/Simulink for cascaded H-bridge inverter. The results validate the applicability of the proposed schemes for cascaded multilevel inverter.

Keywords: Hybrid PWM techniques, Cascaded Multilevel Inverters, Switching loss minimization.

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Authors: M. Nayeemuddin, T. Bramhananda Reddy, M. Vijaya Kumar

Abstract:

Acoustic noise becoming ever more obnoxious radiated by voltage source inverter fed induction motor drive in modern and industrial applications. The drive utilized for industrial and modern applications should use “spread spectrum” innovation known as Random pulse width modulation (PWM) algorithms where acoustic noise emanates through the machine should be critically concerned. This paper illustrates three types of random PWM control algorithms with fixed switching frequency namely 1) Random modulating PWM 2) Random carrier PWM and 3) Random modulating-carrier PWM. The spectrum plots of the motor stator current demonstrate the strength and robustness of the proposed PWM algorithms. To affirm the proposed algorithms, experimental tests have been conducted using dSPACE rt1104 control board on a v/f control three phase induction motor drive fed by DC link cascaded multilevel inverter.

Keywords: Multilevel inverter, acoustic noise, CSVPWM, total harmonic distortion, random PWM algorithm.

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Authors: S. Venkateshwarlu, B. P. Muni, A. D. Rajkumar, J. Praveen

Abstract:

Custom power is a technology driven product and service solution which embraces a family devices such as Dynamic Voltage Restorer (DVR), Distributed Shunt Compensator (DSTATCOM), Solid State Breaker (SSB) etc which will provide power quality functions at distribution voltages. The rapid response of these devices enables them to operate in real time, providing continuous and dynamic control of the supply including voltage and reactive power regulation, harmonic reduction and elimination of voltage dips. This paper presents the benefits of multilevel inverters when they are used for DPC based custom power devices. Power flow control mechanism, salient features, advantages and disadvantages of direct power control (DPC) using lookup table, SVM, predictive voltage vector and hybrid DPC strategies are discussed in this paper. Simulation results of three level inverter based STATCOM, harmonic analysis of multi level inverters are presented at the end.

Keywords: DPC, DPC-SVM, Dynamic voltage restorer, DSTATCOM, Multilevel inverter, PWM Converter, PDPC, VF-DPC.

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Authors: R. Kamalakannan, N. Ravi Kumar

Abstract:

The global energy consumption is increasing persistently and need for distributed power generation through renewable energy is essential. To meet the power requirements for consumers without any voltage fluctuations and losses, modeling and design of multilevel inverter with Flexible AC Transmission System (FACTS) capability is presented. The presented inverter is provided with 13-level cascaded H-bridge topology of Insulated Gate Bipolar Transistor (IGBTs) connected along with inbuilt Distributed Static Synchronous Compensators (DSTATCOM). The DSTATCOM device provides control of power factor stability at local feeder lines and the inverter eliminates Total Harmonic Distortion (THD). The 13-level inverter utilizes 52 switches of each H-bridge is fed with single DC sources separately and the Pulse Width Modulation (PWM) technique is used for switching IGBTs. The control strategy implemented for inverter transmits active power to grid as well as it maintains power factor to be stable with achievement of steady state power transmission. Significant outcome of this project is improvement of output voltage quality with steady state power transmission with low THD. Simulation of inverter with DSTATCOM is performed using MATLAB/Simulink environment. The scaled prototype model of proposed inverter is built and its results were validated with simulated results.

Keywords: FACTS devices, distributed-Static synchronous compensators, DSTATCOM, total harmonics elimination, modular multilevel converter.

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Authors: Hanifah Jambari, Naziha A. Azli, M. Afendi M. Piah

Abstract:

This paper presents the generation of bipolar square wave pulses with characteristics that are suitable for liquid food sterilization using a Cascaded H-bridge Multilevel Inverter (CHMI). Bipolar square waves pulses have been reported as stable for a longer time during the sterilization process with minimum heat emission and increased efficiency. The CHMI allows the system to produce bipolar square wave pulses and yielding high output voltage without using a transformer while fulfilling the pulse requirements for effective liquid food sterilization. This in turn can reduce power consumption and cost of the overall liquid food sterilization system. The simulation results have shown that pulses with peak output voltage of 2.4 kV, pulse width of between 1 2s and 1 ms at frequencies of 50 Hz and 100 Hz can be generated by a 7-level CHMI. Results from the experimental set-up based on a 5-level CHMI has indicated the potential of the proposed circuit in producing bipolar square wave output pulses with peak values that depends on the DC source level supplied to the CHMI modules, pulse width of between 12.5 2s and 1 ms at frequencies of 50 Hz and 100 Hz.

Keywords: pulsed electric field, multilevel inverter, bipolarsquare wave, food sterilization

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Authors: A. Bennassar, A. Abbou, M. Akherraz, M. Barara

Abstract:

In this paper, we propose a sensorless backstepping control of induction motor (IM) associated with three levels neutral clamped (NPC) inverter. First, the backstepping approach is designed to steer the flux and speed variables to theirs references and to compensate the uncertainties. A Lyapunov theory is used and it demonstrates that the dynamic trajectories tracking are asymptotically stable. Second, we estimate the rotor flux and speed by using the adaptive Luenberger observer (ALO). Simulation results are provided to illustrate the performance of the proposed approach in high and low speeds and load torque disturbance.

Keywords: Sensorless backstepping, IM, Three levels NPC inverter, Lyapunov theory, ALO.

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Authors: Bachir Belmadani, Rachid Taleb, Zinelaabidine Boudjema, Adil Yahdou

Abstract:

Carrier-based methods have been used widely for switching of multilevel inverters due to their simplicity, flexibility and reduced computational requirements compared to space vector modulation (SVM). This paper focuses on Multicarrier Sinusoidal Pulse Width Modulation (MCSPWM) strategy for the three phase Five-Level Flying Capacitor Inverter (5LFCI). The inverter is simulated for Induction Motor (IM) load and Total Harmonic Distortion (THD) for output waveforms is observed for different controlling schemes.

Keywords: Flying capacitor inverter, multicarrier sinusoidal pulse width modulation, space vector modulation, total harmonic distortion, induction motor.

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Authors: N. Ould Cherchali, A. Tlemçani, M. S. Boucherit, A. Morsli

Abstract:

Nature-inspired metaheuristic algorithms, particularly those founded on swarm intelligence, have attracted much attention over the past decade. Firefly algorithm has appeared in approximately seven years ago, its literature has enlarged considerably with different applications. It is inspired by the behavior of fireflies. The aim of this paper is the application of firefly algorithm for solving a nonlinear algebraic system. This resolution is needed to study the Selective Harmonic Eliminated Pulse Width Modulation strategy (SHEPWM) to eliminate the low order harmonics; results have been applied on multilevel inverters. The final results from simulations indicate the elimination of the low order harmonics as desired. Finally, experimental results are presented to confirm the simulation results and validate the efficaciousness of the proposed approach.

Keywords: Firefly algorithm, metaheuristic algorithm, multilelvel inverter, SHEPWM.

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Authors: S. Chatterji, S. L. Shimi

Abstract:

As wind, solar and other clean and green energy sources gain popularity worldwide, engineers are seeking ways to make renewable energy systems more affordable and to integrate them with existing ac power grids. In the present paper an attempt has been made for integrating the PV arrays to the smart nano grid using an artificial intelligent (AI) based solar powered cascade multilevel inverter. The AI based controller switching scheme has been used for improving the power quality by reducing the Total Harmonic Distortion (THD) of the multi-level inverter output voltage.

Keywords: Artificial Intelligent (AI), Solar Powered Multi-level Inverter, Smart nano grid, Total Harmonic Distortion (THD).

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Authors: Rafia Akhter, Aminul Hoque

Abstract:

Solar Cells are destined to supply electric energy beginning from primary resources. It can charge a battery up to 12V dc. For residential use an inverter for 12V dc to 220Vac conversion is desired. For this a static DC-AC converter is necessarily inserted between the solar cells and the distribution network. This paper describes a new P.W.M. strategy for a voltage source inverter. This modulation strategy reduces the energy losses and harmonics in the P.W.M. voltage source inverter. This technique allows the P.W.M. voltage source inverter to become a new feasible solution for solar home application.

Keywords: Boost Inverter, inverter, duty cycle, PWM

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Authors: N. Janjamraj, A. Oonsivilai

Abstract:

This paper present the harmonic elimination of hybrid multilevel inverters (HMI) which could be increase the number of output voltage level. Total Harmonic Distortion (THD) is one of the most important requirements concerning performance indices. Because of many numbers output levels of HMI, it had numerous unknown variables of eliminate undesired individual harmonic and THD nonlinear equations set. Optimized harmonic stepped waveform (OHSW) is solving switching angles conventional method, but most complicated for solving as added level. The artificial intelligent techniques are deliberation to solve this problem. This paper presents the Particle Swarm Optimization (PSO) technique for solving switching angles to get minimum THD and eliminate undesired individual harmonics of 15-levels hybrid multilevel inverters. Consequently it had many variables and could eliminate numerous harmonics. Both advantages including high level of inverter and Particle Swarm Optimization (PSO) are used as powerful tools for harmonics elimination.

Keywords: Multilevel Inverters, Particle Swarms Optimization, Harmonic Elimination.

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Authors: Buket Turan Azizoğlu

Abstract:

In switch mode power inverters, small sized inverters can be obtained by increasing the switching frequency. Switching frequency increment causes high driver losses. Also, high dt di and dt dv produced by the switching action creates high Electromagnetic Interference (EMI) and Radio Frequency Interference (RFI). In this paper, a series half bridge series resonant inverter circuit is simulated and evaluated practically to demonstrate the turn-on and turn-off conditions during zero or close to zero voltage switching. Also, the reverse recovery current effects of the body diode of the MOSFETs were investigated by operating above and below resonant frequency.

Keywords: Driver losses, Half Bridge series resonant inverter, Zero Voltage Switching

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Authors: M.A.A. Younis, N. A. Rahim, S. Mekhilef

Abstract:

This paper presents the design and analysis of a parallel connected inverter configuration of. The configuration consists of parallel connected three-phase dc/ac inverter. Series resistors added to the inverter output to maintain same current in each inverter of the two parallel inverters, and to reduce the circulating current in the parallel inverters to the minimum. High frequency third harmonic injection PWM (THIPWM) employed to reduce the total harmonic distortion and to make maximum use of the voltage source. DSP was used to generate the THIPWM and the control algorithm for the converter. Selected experimental results have been shown to validate the proposed system.

Keywords: Three-phase inverter, Third harmonic injection PWM, inverters parallel connection.

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Authors: S.Aksoy, Y.Caglar

Abstract:

n-CdO/p-Si heterojunction diode was fabricated using sol-gel spin coating technique which is a low cost and easily scalable method for preparing of semiconductor films. The structural and morphological properties of CdO film were investigated. The X-ray diffraction (XRD) spectra indicated that the film was of polycrystalline nature. The scanning electron microscopy (SEM) images indicate that the surface morphology CdO film consists of the clusters formed with the coming together of the nanoparticles. The electrical characterization of Au/n-CdO/p–Si/Al heterojunction diode was investigated by current-voltage. The ideality factor of the diode was found to be 3.02 for room temperature. The reverse current of the diode strongly increased with illumination intensity of 100 mWcm-2 and the diode gave a maximum open circuit voltage Voc of 0.04 V and short-circuits current Isc of 9.92×10-9 A.

Keywords: CdO, heterojunction semiconductor devices, ideality factor, current-voltage characteristics

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Authors: A. Yazdanpanah Goharrizi

Abstract:

An improved topology of a voltage-fed quasi-resonant soft switching LCrCdc series-parallel half bridge inverter with a constant-frequency for electronic ballast applications is proposed in this paper. This new topology introduces a low-cost solution to reduce switching losses and circuit rating to achieve high-efficiency ballast. Switching losses effect on ballast efficiency is discussed through experimental point of view. In this discussion, an improved topology in which accomplishes soft switching operation over a wide power regulation range is proposed. The proposed structure uses reverse recovery diode to provide better operation for the ballast system. A symmetrical pulse wide modulation (PWM) control scheme is implemented to regulate a wide range of out-put power. Simulation results are kindly verified with the experimental measurements obtained by ballast-lamp laboratory prototype. Different load conditions are provided in order to clarify the performance of the proposed converter.

Keywords: Electronic ballast, Pulse wide modulation (PWM) Reverse recovery diode, Soft switching.

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