WASET
	%0 Journal Article
	%A S. Selvaperumal and  M. S. Sivagamasundari
	%D 2019
	%J International Journal of Electrical and Computer Engineering
	%B World Academy of Science, Engineering and Technology
	%I Open Science Index 146, 2019
	%T Cascaded H-Bridge Five Level Inverter Based Selective Harmonic Eliminated Pulse Width Modulation for Harmonic Elimination
	%U https://publications.waset.org/pdf/10010073
	%V 146
	%X In this paper, selective harmonic elimination pulse width modulation technique is employed to eliminate lower order harmonics like third by determination of solving non-linear equations. The cascaded H-bridge five level inverter is driven by the Peripheral Interface Controlled (PIC) Microcontroller 16F877A. The performance of single phase cascaded H-bridge five level inverter with relevant to harmonics and a variety of switches with solar cell as its input source is simulated by employing MATLAB/Simulink. A hardware model is developed to verify the performance of the developed system.

	%P 110 - 114