Search results for: analog output voltage

Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang

Abstract:

For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit

Procedia PDF Downloads 359

Authors: Milad Kaboli

Abstract:

A new CMOS low voltage current-mode four-quadrant analog multiplier based on the squarer circuit with voltage output is presented. The proposed circuit is composed of a pair of current subtractors, a pair differential-input V-I converters and a pair of voltage squarers. The circuit was simulated using HSPICE simulator in standard 0.18 μm CMOS level 49 MOSIS (BSIM3 V3.2 SPICE-based). Simulation results show the performance of the proposed circuit and experimental results are given to confirm the operation. This topology of multiplier results in a high-frequency capability with low power consumption. The multiplier operates for a power supply ±1.2V. The simulation results of analog multiplier demonstrate a THD of 0.65% in 10MHz, a −3dB bandwidth of 1.39GHz, and a maximum power consumption of 7.1mW.

Keywords: analog processing circuit, WTA, LTA, low voltage

Procedia PDF Downloads 445

Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang

Abstract:

Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: analog voltage inverter, capacitive load, gain control, dc-dc converter, piezoelectric, voltage waveform

Procedia PDF Downloads 620

Authors: Monika Rawat, Rahul Kumar

Abstract:

Input output Buffer Information Specification (IBIS) models are used for describing the analog behavior of the Input Output (I/O) buffers of a digital device. They are widely used to perform signal integrity analysis. Advantages of using IBIS models include simple structure, IP protection and fast simulation time with reasonable accuracy. As design complexity of driver and receiver increases, capturing exact behavior from transistor level model into IBIS model becomes an essential task to achieve better accuracy. In this paper, an improvement in existing methodology of generating IBIS model for complex I/O interfaces such as Inter-Integrated Circuit (I2C) and Low Voltage Differential Signaling (LVDS) is proposed. Furthermore, the accuracy and computational performance of standard method and proposed approach with respect to SPICE are presented. The investigations will be useful to further improve the accuracy of IBIS models and to enhance their wider acceptance.

Keywords: IBIS, signal integrity, open-drain buffer, low voltage differential signaling, behavior modelling, transient simulation

Procedia PDF Downloads 164

Authors: Kang Hyun Yi

Abstract:

This paper presents a new parallel output LLC DC/DC converter for electric vehicle. The electric vehicle has two batteries. One is a high voltage battery for the powertrain of the vehicle and the other is a low voltage battery for the vehicle electric system. The low voltage is charged from the high voltage battery and the high voltage input and the high current output DC/DC converter is needed. Therefore, the new LLC converter with the input voltage compensation is proposed for the high voltage input and the low voltage output DC/DC converter. The proposed circuit has two LLC converters with the series input voltage from the battery for the powertrain and the parallel output low battery voltage for the vehicle electric system because the battery voltage for the powertrain and the electric power for the vehicle become high. Also, the input series voltage compensation capacitor is used for balancing the input current in the two LLC converters. The proposed converter has an equal electric stress of the semiconductor parts and the reactive components, high efficiency and good heat dissipation.

Keywords: electric vehicle, LLC DC/DC converter, input voltage balancing, parallel output

Procedia PDF Downloads 1022

Authors: N. Ravikumar, S. Krishnan, B. Yokeshkumar

Abstract:

In present days, the power quality issues are increases due to non-linear loads like fridge, AC, washing machines, induction motor, etc. This power quality issues will affects the output voltages, output current, and output power of the total performance of the generator. This paper explains how to test the generator using the Fluke 435 II series power quality analyser. This Fluke 435 II series power quality analyser is used to measure the voltage, current, power, energy, total harmonic distortion (THD), current harmonics, voltage harmonics, power factor, and frequency. The Fluke 435 II series power quality analyser have several advantages. They are i) it will records output in analog and digital format. ii) the fluke analyzer will records at every 0.25 sec. iii) it will also measure all the electrical parameter at a time.

Keywords: THD, harmonics, power quality, TNEB, Fluke 435

Procedia PDF Downloads 155

Authors: Eyhab El-Kharashi, Maher El-Dessouki

Abstract:

The paper is dedicated to precise assessment of the induction motor output energy during the unbalanced operation. Since many years ago and until now the voltage complex unbalance factor (CVUF) is used only to assess the output energy of the induction motor while this output energy for asymmetry supply voltage does not depend on the value of unbalanced voltage only but also on the machine parameters. The paper illustrates the variation of the two unbalance factors, complex voltage unbalance factor (CVUF) and impedance unbalance factor (IUF), with positive sequence voltage component, reveals that degree and manner of unbalance in supply voltage. From this point of view the paper delineates the current unbalance factor (CUF) to exactly reflect the output energy during unbalanced operation. The paper proceeds to illustrate the importance of using this factor in the multi-machine system to precise prediction of the output energy during the unbalanced operation. The use of the proposed unbalance factor (CUF) avoids the accumulation of the error due to more than one machine in the system which is expected if only the complex voltage unbalance factor (CVUF) is used.

Keywords: induction motor, electromagnetic torque, voltage unbalance, energy conversion

Procedia PDF Downloads 530

Authors: Ahmad Zahran, Ahmed Herzallah, Ahmad Ahmad, Mahran Quraan

Abstract:

Generation of high DC voltages is necessary for testing the insulation material of high voltage AC transmission lines with long lengths. The harmonic and ripple contents of the output DC voltage supplied by high voltage DC circuits require the use of costly capacitors to smooth the output voltage after rectification. This paper proposes a new modular multiplier high voltage DC generator with embedded Cockcroft-Walton circuits that achieve a negligible harmonic and ripple contents of the output DC voltage without the need for costly filters to produce a nearly constant output voltage. In this new topology, Cockcroft-Walton modules are connected in series to produce a high DC output voltage. The modules are supplied by low input AC voltage sources that have the same magnitude and frequency and shifted from each other by a certain angle to eliminate the harmonics from the output voltage. The small ripple factor is provided by the smoothing column capacitors and the phase shifted input voltages of the cascaded modules. The constituent harmonics within each module are determined using Fourier analysis. The viability of the proposed DC generator for testing purposes and the effectiveness of the cascaded connection are confirmed by numerical simulations using MATLAB/Simulink.

Keywords: Cockcroft-Walton circuit, harmonics, ripple factor, HVDC generator

Procedia PDF Downloads 339

Authors: K. Shaji Mon, P. R. John Sreenidhi

Abstract:

In deep-submicrometer CMOS processes, time-domain resolution of a digital signal is becoming higher than voltage resolution of analog signals. This claim is nowadays pushing toward a new circuit design paradigm in which the traditional analog signal processing is expected to be progressively substituted by the processing of times in the digital domain. Within this novel paradigm, digitally controlled delay lines (DCDL) should play the role of digital-to-analog converters in traditional, analog-intensive, circuits. Digital delay locked loops are highly prevalent in integrated systems.The proposed paper addresses the glitches present in delay circuits along with area,power dissipation and signal integrity.The digitally controlled delay lines(DCDL) under study have been designed in a 90 nm CMOS technology 6 layer metal Copper Strained SiGe Low K Dielectric. Simulation and synthesis results show that the novel circuits exhibit no glitches for dual output coarse DCDL with less power dissipation and consumes less area compared to the glitch free NAND based DCDL.

Keywords: glitch free, NAND-based DCDL, CMOS, deep-submicrometer

Procedia PDF Downloads 223

Authors: Arabi Abderrazak, Bourouba Nacerdine, Ayad Mouloud, Belaout Abdeslam

Abstract:

In this paper, a new test technique of analog circuits using time mode simulation is proposed for the single catastrophic faults detection in analog circuits. This test process is performed to overcome the problem of catastrophic faults being escaped in a DC mode test applied to the inverter amplifier in previous research works. The circuit under test is a second-order low pass filter constructed around this type of amplifier but performing a function that differs from that of the previous test. The test approach performed in this work is based on two key- elements where the first one concerns the unique square pulse signal selected as an input vector test signal to stimulate the fault effect at the circuit output response. The second element is the filter response conversion to a square pulses sequence obtained from an analog comparator. This signal conversion is achieved through a fixed reference threshold voltage of this comparison circuit. The measurement of the three first response signal pulses durations is regarded as fault effect detection parameter on one hand, and as a fault signature helping to hence fully establish an analog circuit fault diagnosis on another hand. The results obtained so far are very promising since the approach has lifted up the fault coverage ratio in both modes to over 90% and has revealed the harmful side of faults that has been masked in a DC mode test.

Keywords: analog circuits, analog faults diagnosis, catastrophic faults, fault detection

Procedia PDF Downloads 416

Authors: Jose A. Pomilio, Olavo Bet, Mateus P. Vieira

Abstract:

The power converter that feeds high-frequency, high-voltage transformers must be carefully designed due to parasitic components, mainly the secondary winding capacitance and the leakage inductance, that introduces resonances in relatively low-frequency range, next to the switching frequency. This paper considers applications in which the load (resistive) has an unpredictable behavior, changing from open to short-circuit condition faster than the output voltage control loop could react. In this context, to avoid over voltage and over current situations, that could damage the converter, the transformer or the load, it is necessary to find an operation point that assure the desired output voltage in spite of the load condition. This can done adjusting the frequency response of the transformer adding an external inductance, together with selecting the switching frequency to get stable output voltage independently of the load.

Keywords: high-voltage transformer, resonant converter, soft-commutation, external inductance

Procedia PDF Downloads 450

Authors: Mohamed Shaban, Ali Alfallah

Abstract:

This paper describes an application for testing of a fault indicator but it could be used for other network protection testing. The application is created in the LabVIEW environment and consists of three parts. The first part of the application is determined for transient phenomenon generation and imitates voltage and current transient signal at ground fault originate. The second part allows to set sequences of trend for each current and voltage output signal, up to six trends for each phase. The last part of the application generates harmonic signal with continuously controllable amplitude of current or voltage output signal and phase shift of each signal can be changed there. Further any sub-harmonics and upper harmonics can be added to selected current output signal

Keywords: signal generator-fault indicator, harmonic signal generator, voltage output

Procedia PDF Downloads 472

Authors: Shao-Ku Kao

Abstract:

This paper presents an active rectifier with time-domain delay compensation to enhance the efficiency. A delay calibration circuit is designed to convert delay time to voltage and adaptive control on/off delay in variable input voltage. This circuit is designed in 0.18 mm CMOS process. The input voltage range is from 2 V to 3.6 V with the output voltage from 1.8 V to 3.4 V. The efficiency can maintain more than 85% when the load from 50 Ω ~ 1500 Ω for 3.6 V input voltage. The maximum efficiency is 92.4 % at output power to be 38.6 mW for 3.6 V input voltage.

Keywords: wireless power transfer, active diode, delay compensation, time to voltage converter, PCE

Procedia PDF Downloads 248

Authors: Dheeraj Sharma, Santosh Kumar Vishvakarma

Abstract:

We present a detailed analysis of analog and radiofrequency (RF) performance with different gate lengths for nanowire cylindrical gate (CylG) gate-all-around (GAA) MOSFET. CylG GAA MOSFET not only suppresses the short channel effects (SCEs), it is also a good candidate for analog/RF device due to its high transconductance (gm) and high cutoff frequency (fT ). The presented work would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequency covering the RF spectrum. For this purpose, the analog/RF figures of merit for CylG GAA MOSFET is analyzed in terms of gate to source capacitance (Cgs), gate to drain capacitance (Cgd), transconductance generation factor gm = Id (where Id represents drain current), intrinsic gain, output resistance, fT, maximum frequency of oscillation (fmax) and gain bandwidth (GBW) product.

Keywords: Gate-All-Around MOSFET, GAA, output resistance, transconductance generation factor, intrinsic gain, cutoff frequency, fT

Procedia PDF Downloads 366

Authors: Yasunori Kobori, Murong Li, Feng Zhao, Shu Wu, Nobukazu Takai, Haruo Kobayashi

Abstract:

This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors with capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the average of LED current of 350 mA.

Keywords: DC-DC buck converter, four-level output voltage, single inductor multi output (SIMO), switching converter

Procedia PDF Downloads 527

Authors: Maninder Kaur Gill, Alpana Agarwal

Abstract:

It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.

Keywords: Device Under Test (DUT), open loop voltage gain, operational amplifier, test circuit

Procedia PDF Downloads 405

Authors: Sanguk Nam, Van Ha Nguyen, Hanjung Song

Abstract:

For low-power applications such as adapters for portable devices and USB chargers, the primary side regulation (PSR) fly-back converter is widely used in lieu of the conventional fly-back converter using opto-coupler because of its simpler structure and lower cost. In the literature, there has been studies focusing on the design of PSR circuit; however, the conventional sensing method in PSR circuit using RC delay has a lower accuracy as compared to the conventional fly-back converter using opto-coupler. In this paper, we propose a novel PWM/PFM controller using new sensing technique for the PSR fly-back converter which can control an accurate output voltage. The conventional PSR circuit can sense the output voltage information from the auxiliary winding to regulate the duty cycle of the clock that control the output voltage. In the sensing signal waveform, there has two transient points at time the voltage equals to Vout+VD and Vout, respectively. In other to sense the output voltage, the PSR circuit must detect the time at which the current of the diode at the output equals to zero. In the conventional PSR flyback-converter, the sensing signal at this time has a non-sharp-negative slope that might cause a difficulty in detecting the output voltage information since a delay of sensing signal or switching clock may exist which brings out an unstable operation of PSR fly-back converter. In this paper instead of detecting output voltage at a non-sharp-negative slope, a sharp-positive slope is used to sense the proper information of the output voltage. The proposed PRS circuit consists of a saw-tooth generator, a summing circuit, a sample and hold circuit and a peak detector. Besides, there is also the start-up circuit which protects the chip from high surge current when the converter is turned on. Additionally, to reduce the standby power loss, a second mode which operates in a low frequency is designed beside the main mode at high frequency. In general, the operation of the proposed PSR circuit can be summarized as following: At the time the output information is sensed from the auxiliary winding, a saw-tooth signal from the saw-tooth generator is generated. Then, both of these signals are summed using a summing circuit. After this process, the slope of the peak of the sensing signal at the time diode current is zero becomes positive and sharp that make the peak easy to detect. The output of the summing circuit then is fed into a peak detector and the sample and hold circuit; hence, the output voltage can be properly sensed. By this way, we can sense more accurate output voltage information and extend margin even circuit is delayed or even there is the existence of noise by using only a simple circuit structure as compared with conventional circuits while the performance can be sufficiently enhanced. Circuit verification was carried out using 0.35μm 700V Magnachip process. The simulation result of sensing signal shows a maximum error of 5mV under various load and line conditions which means the operation of the converter is stable. As compared to the conventional circuit, we achieved very small error only used analog circuits compare with conventional circuits. In this paper, a PWM/PFM controller using a simple and effective sensing method for PSR fly-back converter has been presented in this paper. The circuit structure is simple as compared with the conventional designs. The gained results from simulation confirmed the idea of the design

Keywords: primary side regulation, PSR, sensing technique, peak detector, PWM/PFM control, fly-back converter

Procedia PDF Downloads 315

Authors: F. Rarbi, D. Dzahini, W. Uhring

Abstract:

In this paper, a dynamic and power efficient 8-bit and 100-MSPS Successive Approximation Register (SAR) Analog-to-Digital Converter (ADC) is presented. The circuit uses a non-differential capacitive Digital-to-Analog (DAC) architecture segmented by 2. The prototype is produced in a commercial 65-nm 1P7M CMOS technology with 1.2-V supply voltage. The size of the core ADC is 208.6 x 103.6 µm². The post-layout noise simulation results feature a SNR of 46.9 dB at Nyquist frequency, which means an effective number of bit (ENOB) of 7.5-b. The total power consumption of this SAR ADC is only 1.55 mW at 100-MSPS. It achieves then a figure of merit of 85.6 fJ/step.

Keywords: CMOS analog to digital converter, dynamic comparator, image sensor application, successive approximation register

Procedia PDF Downloads 391

Authors: Rahul Ganpat Mapari, D. G. Wakde

Abstract:

In this paper, a proposed approach to improve the power factor of single-phase rectifiers and to regulate the output voltage against the change in grid voltage and load is presented. This converter topology is evaluated on the basis of performance and its salient features like simplicity, low cost and high performance are discussed to analyze its applicability. The proposed control strategy is bridgeless, transformer-less and output current sensor-less and consists of only two Bi-directional IGBTs and two diodes. The voltage regulation is achieved by a simple voltage divider to communicate to a controller to control the duty cycles of PWM. A control technique and operational procedure are also developed, both theoretically and experimentally. The experimental results clearly verify the theoretical analysis from the prototype connected to grid unity.

Keywords: Active Rectifier (AC-DC), power factor, single phase, voltage regulation

Procedia PDF Downloads 552

Authors: Tomotaka Aoki, Isao Tomita

Abstract:

We examined the on-off ratio and frequency components of output signals from an electron-interference device made of GaAs/AlₓGa₁₋ₓAs by solving the time-dependent Schrödinger's equation on conducting electrons in the channel waveguide of the device. For electron-wave modulation, a periodic voltage of frequency f was applied to the channel. Furthermore, we examined the voltage-amplitude dependence of the signals in time and frequency domains and found that large applied voltage deformed the output-signal waveform and created additional side modes (frequencies) near the modulation frequency f and that there was a trade-off between on-off ratio and side-mode creation.

Keywords: electrical conduction, electron interference, frequency spectrum, on-off ratio

Procedia PDF Downloads 94

Authors: M. Kaouane, A. Boukhelifa, A. Cheriti

Abstract:

In this paper, a new Buck-Boost DC-DC converter is designed and simulated for photovoltaic energy system. The presented Buck-Boost converter has a double switch. Moreover, its output voltage is regulated to a constant value whatever its input is. In the presented work, the Buck-Boost transfers the produced energy from the photovoltaic generator to an R-L load. The converter is controlled by the pulse width modulation technique in a way to have a suitable output voltage, in the other hand, to carry the generator’s power, and put it close to the maximum possible power that can be generated by introducing the right duty cycle of the pulse width modulation signals that control the switches of the converter; each component and each parameter of the proposed circuit is well calculated using the equations that describe each operating mode of the converter. The proposed configuration of Buck-Boost converter has been simulated in Matlab/Simulink environment; the simulation results show that it is a good choice to take in order to maintain the output voltage constant while ensuring a good energy transfer.

Keywords: Buck-Boost converter, switch, photovoltaic, PWM, power, energy transfer

Procedia PDF Downloads 868

Authors: Y. Kobori, S. Tanaka, N. Tsukiji, N. Takai, H. Kobayashi

Abstract:

This paper proposes two kinds of new single-inductor dual-output (SIDO) DC-DC switching converters with ripple-based hysteretic control. First SIDO converters of type 1 utilize the triangular signal generated by the CR-circuit connected across the inductor. This triangular signal is used for generating the PWM signal instead of the saw-tooth signal used in the conventional converters. Second SIDO converters of type 2 utilize the triangular signal generated by the CR-circuit connected across the voltage error amplifier. This paper describes circuit topologies, Operation principles, simulation results and experimental results of the proposed SIDO converters. In simulation results of both type of SIDO converters, static output voltage ripples are less than 5mVpp and over/under shoots of the dynamic load regulations for the output current step are less than +/- 10mV. In experimental results of single output converter of type 2, static output voltage ripples are about 20mVpp. Output ripples of SIDO type 1 converter are about 80mVpp.

Keywords: DC-DC converter, switching converter, SIDO converter, hysteretic control, ripple-based control

Procedia PDF Downloads 548

Authors: Jin Sup Kim, Min Seo

Abstract:

An improved cross-shaped hall plate with high sensitivity is described in this paper. Among different geometries that have been simulated and measured using Helmholtz coil. The paper describes the physical hall plate design and implementation in a 0.18-µm CMOS technology. In this paper, the biasing is a constant voltage mode. In the voltage mode, magnetic field is converted into an output voltage. The output voltage is typically in the order of micro- to millivolt and therefore, it must be amplified before being transmitted to the outside world. The study, design and performance optimization of hall plate has been carried out with the COMSOL Multiphysics. It is used to estimate the voltage distribution in the hall plate with and without magnetic field and to optimize the geometry. The simulation uses the nominal bias current of 1mA. The applied magnetic field is in the range from 0 mT to 20 mT. Measured results of the one structure over the 10 available samples show for the best sensitivity of 2.5 %/T at 20mT.

Keywords: cross-shaped hall plate, sensitivity, CMOS technology, Helmholtz coil

Procedia PDF Downloads 169

Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, multi-inputs, voltage transition, node stabilization, biasing circuits

Procedia PDF Downloads 529

Authors: Kashif Habib, Zeeshan Ayyub

Abstract:

ZnO voltage dependent resistor was widely used as components of the electrical system for over-voltage protection. It has a wide application prospect in superconducting energy-removal, generator de-excitation, overvoltage protection of electrical & electronics equipment. At present, the research for the application of ZnO voltage dependent resistor stop, it uses just in the field of its nonlinear voltage current characteristic and overvoltage protection areas. There is no further study over the over-voltage breakdown characteristics, such as the combustion phenomena and the measure of the voltage/current when it breakdown, and the affect to its surrounding equipment. It is also a blind spot in its application. So, when we do the feature test of ZnO voltage dependent resistor, we need to design a reasonable test power supply, making the terminal voltage keep for sine wave, simulating the real use of PF voltage in power supply conditions. We put forward the solutions of using inverter to generate a controllable power. The paper mainly focuses on the breakdown characteristic test power supply of nonlinear ZnO voltage dependent resistor. According to the current mature switching power supply technology, we proposed power control system using the inverter as the core. The power mainly realize the sin-voltage output on the condition of three-phase PF-AC input, and 3 control modes (RMS, Peak, Average) of the current output. We choose TMS320F2812M as the control part of the hardware platform. It is used to convert the power from three-phase to a controlled single-phase sin-voltage through a rectifier, filter, and inverter. Design controller produce SPWM, to get the controlled voltage source via appropriate multi-loop control strategy, while execute data acquisition and display, system protection, start logic control, etc. The TMS320F2812M is able to complete the multi-loop control quickly and can be a good completion of the inverter output control.

Keywords: ZnO, multi-loop control, SPWM, non-linear load

Procedia PDF Downloads 289

Authors: Xinke Huang, Huan Wang, Lidong Guo, Changbin Ju, Runbiao Liu, Shanshan Meng, Yibo Wang, Honghua Xu

Abstract:

Large-scale photovoltaic (PV) generation system connected to HVDC grid has many advantages compared to its counterpart of AC grid. DC connection can solve many problems that AC connection faces, such as the grid-connection and power transmission, and DC connection is the tendency. DC/DC converter as the most important device in the system has become one of the hot spots recently. The paper proposes a centralized DC/DC converter which uses Boost Full Bridge Isolated DC/DC Converter(BFBIC) topology and combination through input parallel output series(IPOS) method to improve power capacity and output voltage to match with the HVDC grid voltage. Meanwhile, it adopts input current sharing control strategy to realize input current and output voltage balance. A ±30kV/1MW system is modeled in MATLAB/SIMULINK, and a downscaled ±10kV/200kW DC/DC converter platform is built to verify the proposed topology and control strategy.

Keywords: photovoltaic generation, cascaded dc/dc converter, galvanic isolation, high-voltage, direct current (HVDC)

Procedia PDF Downloads 412

Authors: Hafez Fouad

Abstract:

Telemedicine applications have very low voltage which required High Precision Rectifier Design with high Sensitivity to operate at minimum input Voltage. In this work, we targeted 0.2V input voltage using 65 nm CMOS rectifier for Energy Harvesting Telemedicine application. The proposed rectifier which designed at 2.4GHz using two-stage structure found to perform in a better case where minimum operation voltage is lower than previous published paper and the rectifier can work at a wide range of low input voltage amplitude. The Performance Summary of Full-wave fully gate cross-coupled rectifiers (FWFR) CMOS Rectifier at F = 2.4 GHz: The minimum and maximum output voltages generated using an input voltage amplitude of 2 V are 490.9 mV and 1.997 V, maximum VCE = 99.85 % and maximum PCE = 46.86 %. The Performance Summary of Differential drive CMOS rectifier with external bootstrapping circuit rectifier at F = 2.4 GHz: The minimum and maximum output voltages generated using an input voltage amplitude of 2V are 265.5 mV (0.265V) and 1.467 V respectively, maximum VCE = 93.9 % and maximum PCE= 15.8 %.

Keywords: energy harvesting, embedded system, IoT telemedicine system, threshold voltage minimization, differential drive cmos rectifier, full-wave fully gate cross-coupled rectifiers CMOS rectifier

Procedia PDF Downloads 122

Authors: Mohamad Baqer Heidari, Hefzollah.Mohammadian

Abstract:

This brief presents two original implementations of improved accuracy current-mode multiplier/divider circuits. Besides the advantage of their simplicity, these original multiplier/divider structures present the advantage of very small linearity errors that can be obtained as a result of the proposed design techniques (0.75% and 0.9%, respectively, for an extended range of the input currents). The original multiplier/divider circuits permit a facile reconfiguration, the presented structures representing the functional basis for implementing complex function synthesizer circuits. The proposed computational structures are designed for implementing in 0.18-µm CMOS technology, with a low-voltage operation (a supply voltage of 1.2 V). The circuits’ power consumptions are 60 and 75 µW, respectively, while their frequency bandwidths are 79.6 and 59.7 MHz, respectively.

Keywords: analog signal processing, current-mode operation, functional core, multiplier, reconfigurable circuits, industrial package systems

Procedia PDF Downloads 347

Authors: Abdar Ali, Rizwan Ullah, Zahid Ullah

Abstract:

This paper focuses on the study of DC-to-DC converters, which are suitable for low-voltage high-power applications. The output voltages generated by renewable energy sources such as photovoltaic arrays and fuel cell stacks are generally low and required to be increased to high voltage levels. Development of DC-to-DC converters, which provide high step-up voltage conversion ratios with high efficiencies and low voltage stresses is one of the main issues in the development of renewable energy systems. A procedure for three converters-conventional DC-to-DC converter, interleaved boost converter, and isolated flyback based converter, is illustrated for a given set of specifications. The selection among the converters for the given application is based on the voltage conversion ratio, efficiency, and voltage stresses.

Keywords: flyback converter, interleaved boost, photovoltaic array, fuel cell, switch stress, voltage conversion ratio, renewable energy

Procedia PDF Downloads 566

Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Salleh, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics

Procedia PDF Downloads 291