Search results for: input voltage balancing

Authors: Kang Hyun Yi

Abstract:

This paper presents a new parallel output LLC DC/DC converter for electric vehicle. The electric vehicle has two batteries. One is a high voltage battery for the powertrain of the vehicle and the other is a low voltage battery for the vehicle electric system. The low voltage is charged from the high voltage battery and the high voltage input and the high current output DC/DC converter is needed. Therefore, the new LLC converter with the input voltage compensation is proposed for the high voltage input and the low voltage output DC/DC converter. The proposed circuit has two LLC converters with the series input voltage from the battery for the powertrain and the parallel output low battery voltage for the vehicle electric system because the battery voltage for the powertrain and the electric power for the vehicle become high. Also, the input series voltage compensation capacitor is used for balancing the input current in the two LLC converters. The proposed converter has an equal electric stress of the semiconductor parts and the reactive components, high efficiency and good heat dissipation.

Keywords: electric vehicle, LLC DC/DC converter, input voltage balancing, parallel output

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Authors: Shao-Ku Kao

Abstract:

This paper presents an active rectifier with time-domain delay compensation to enhance the efficiency. A delay calibration circuit is designed to convert delay time to voltage and adaptive control on/off delay in variable input voltage. This circuit is designed in 0.18 mm CMOS process. The input voltage range is from 2 V to 3.6 V with the output voltage from 1.8 V to 3.4 V. The efficiency can maintain more than 85% when the load from 50 Ω ~ 1500 Ω for 3.6 V input voltage. The maximum efficiency is 92.4 % at output power to be 38.6 mW for 3.6 V input voltage.

Keywords: wireless power transfer, active diode, delay compensation, time to voltage converter, PCE

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, voltage transition, node stabilization, biasing circuits

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, multi-inputs, voltage transition, node stabilization, biasing circuits

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Authors: N. Fuad, M. N. Taib, R. Jailani, M. E. Marwan

Abstract:

In this paper, the comparison between k-Nearest Neighbor (kNN) algorithms for classifying the 3D EEG model in brain balancing is presented. The EEG signal recording was conducted on 51 healthy subjects. Development of 3D EEG models involves pre-processing of raw EEG signals and construction of spectrogram images. Then, maximum PSD values were extracted as features from the model. There are three indexes for the balanced brain; index 3, index 4 and index 5. There are significant different of the EEG signals due to the brain balancing index (BBI). Alpha-α (8–13 Hz) and beta-β (13–30 Hz) were used as input signals for the classification model. The k-NN classification result is 88.46% accuracy. These results proved that k-NN can be used in order to predict the brain balancing application.

Keywords: power spectral density, 3D EEG model, brain balancing, kNN

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Authors: Suk-Hyun Yu, Heeyong Kwon

Abstract:

Recently PM-10 has become a social and global issue. It is one of major air pollutants which affect human health. Therefore, it needs to be forecasted rapidly and precisely. However, PM-10 comes from various emission sources, and its level of concentration is largely dependent on meteorological and geographical factors of local and global region, so the forecasting of PM-10 concentration is very difficult. Neural network model can be used in the case. But, there are few cases of high concentration PM-10. It makes the learning of the neural network model difficult. In this paper, we suggest a simple input balancing method when the data distribution is uneven. It is based on the probability of appearance of the data. Experimental results show that the input balancing makes the neural networks’ learning easy and improves the forecasting rates.

Keywords: artificial intelligence, air quality prediction, neural networks, pattern recognition, PM-10

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Authors: Dana M. Ragab, Jasim A. Ghaeb

Abstract:

The three-phase power system suffers from different challenging problems, e.g. voltage unbalance conditions at the load side. The voltage unbalance usually degrades the power quality of the electric power system. Several techniques can be considered for load balancing including load reconfiguration, static synchronous compensator and static reactive power compensator. In this work an efficient neural network is designed to control the unbalanced condition in the Aqaba-Qatrana-South Amman (AQSA) electric power system. It is designed for highly enhanced response time of the reactive compensator for voltage balancing. The neural network is developed to determine the appropriate set of firing angles required for the thyristor-controlled reactor to balance the three load voltages accurately and quickly. The parameters of AQSA power system are considered in the laboratory model, and several test cases have been conducted to test and validate the proposed technique capabilities. The results have shown a high performance of the proposed Neural Network Control (NNC) technique for correcting the voltage unbalance conditions at three-phase load based on accuracy and response time.

Keywords: three-phase power system, reactive power control, voltage unbalance factor, neural network, power quality

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Authors: Hafez Fouad

Abstract:

Telemedicine applications have very low voltage which required High Precision Rectifier Design with high Sensitivity to operate at minimum input Voltage. In this work, we targeted 0.2V input voltage using 65 nm CMOS rectifier for Energy Harvesting Telemedicine application. The proposed rectifier which designed at 2.4GHz using two-stage structure found to perform in a better case where minimum operation voltage is lower than previous published paper and the rectifier can work at a wide range of low input voltage amplitude. The Performance Summary of Full-wave fully gate cross-coupled rectifiers (FWFR) CMOS Rectifier at F = 2.4 GHz: The minimum and maximum output voltages generated using an input voltage amplitude of 2 V are 490.9 mV and 1.997 V, maximum VCE = 99.85 % and maximum PCE = 46.86 %. The Performance Summary of Differential drive CMOS rectifier with external bootstrapping circuit rectifier at F = 2.4 GHz: The minimum and maximum output voltages generated using an input voltage amplitude of 2V are 265.5 mV (0.265V) and 1.467 V respectively, maximum VCE = 93.9 % and maximum PCE= 15.8 %.

Keywords: energy harvesting, embedded system, IoT telemedicine system, threshold voltage minimization, differential drive cmos rectifier, full-wave fully gate cross-coupled rectifiers CMOS rectifier

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Authors: Safia Bashir, Zulfiqar Memon

Abstract:

During the last decade, renewable energy sources in particular solar photovoltaic (PV) has gained increased attention. Therefore, various PV converters topologies have emerged. Among this topology, the modular multilevel converter (MMC) is considered as one of the most promising topologies for the grid-connected PV system due to its modularity and transformerless features. When it comes to the safe operation of MMC, the balancing of the Submodules Voltages (SMs) plays a critical role. This paper proposes a balancing approach based on space vector PWM (SVPWM). Unlike the existing techniques, this method generates the switching vectors for the MMC by using only one SVPWM for the upper arm. The lower arm switching vectors are obtained by finding the complement of the upper arm switching vectors. The use of one SVPWM not only simplifies the calculation but also helped in reducing the circulating current in the MMC. The proposed method is varied through simulation using Matlab/Simulink and compared with other available modulation methods. The results validate the ability of the suggested method in balancing the SMs capacitors voltages and reducing the circulating current which will help in reducing the power loss of the PV system.

Keywords: capacitor voltage balancing, circulating current, modular multilevel converter, PV system

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Authors: Edwina G. Rodrigues, S. J. Bindhu, A. V. Rajesh

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This paper proposes a switched capacitor based driver circuit for high power light emitting diodes with a front end rectifier. LEDs are low-voltage light sources, requiring a constant DC voltage or current to operate optimally. LEDs, therefore, require a device that can convert incoming AC power to the proper DC voltage, and regulate the current flowing through the LED during operation. Proposed topology has a front end converter. It is an AC-DC rectifier that works on bridgeless boost topology which shapes the input current waveform. The front end converter is followed by a DC-DC converter which provides a constant DC voltage across the LEDs. A 12V AC input is given to the input of frontend converter which rectifies and boost the voltage to 24v DC and gives it to the DC-DC converter. The DC-DC converter converts the 24V DC and regulates this constant DC voltage across the LEDs.

Keywords: bridgeless rectifier, power factor correction(PFC), SC converter, total harmonic distortion (THD)

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Authors: Xinke Huang, Huan Wang, Lidong Guo, Changbin Ju, Runbiao Liu, Guoen Cao, Yibo Wang, Honghua Xu

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Grid connected photovoltaic (PV) power system is to be developed in the direction of large-scale, clustering. Large-scale PV generation systems connected to HVDC grid have many advantages compared to its counterpart of AC grid, and DC connection is the tendency. DC/DC converter as the most important device in the system, has become one of the hot spots recently. The paper proposes a Quasi Z-Source(QZS) based Boost Full Bridge Isolated DC/DC Converter(BFBIC) topology as a basis power module and combination through input parallel output series(IPOS) method to improve power capacity and output voltage to match with the HVDC grid. The topology has both traditional voltage source and current source advantages, it permit the H-bridge short through and open circuit, which adopt utility duty cycle control and achieved input current and output voltage balancing through input current sharing control strategy. A ±10kV/200kW system model is built in MATLAB/SIMULINK to verify the proposed topology and control strategy.

Keywords: PV Generation System, Cascaded DC/DC converter, HVDC, Quasi Z Source Converter

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Authors: Jan Doutreloigne

Abstract:

This paper describes two methods for the reduction of the peak input current during the boosting of Dickson charge pumps. Both methods are implemented in the fully integrated Dickson charge pumps of a high-voltage display driver chip for smart-card applications. Experimental results reveal good correspondence with Spice simulations and show a reduction of the peak input current by a factor of 6 during boosting

Keywords: bi-stable display driver, Dickson charge pump, high-voltage generator, peak current reduction, sub-pump boosting, variable frequency boosting

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Authors: Ahmad Zahran, Ahmed Herzallah, Ahmad Ahmad, Mahran Quraan

Abstract:

Generation of high DC voltages is necessary for testing the insulation material of high voltage AC transmission lines with long lengths. The harmonic and ripple contents of the output DC voltage supplied by high voltage DC circuits require the use of costly capacitors to smooth the output voltage after rectification. This paper proposes a new modular multiplier high voltage DC generator with embedded Cockcroft-Walton circuits that achieve a negligible harmonic and ripple contents of the output DC voltage without the need for costly filters to produce a nearly constant output voltage. In this new topology, Cockcroft-Walton modules are connected in series to produce a high DC output voltage. The modules are supplied by low input AC voltage sources that have the same magnitude and frequency and shifted from each other by a certain angle to eliminate the harmonics from the output voltage. The small ripple factor is provided by the smoothing column capacitors and the phase shifted input voltages of the cascaded modules. The constituent harmonics within each module are determined using Fourier analysis. The viability of the proposed DC generator for testing purposes and the effectiveness of the cascaded connection are confirmed by numerical simulations using MATLAB/Simulink.

Keywords: Cockcroft-Walton circuit, harmonics, ripple factor, HVDC generator

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Authors: Kittipong Tripetch, Nobuhiko Nakano

Abstract:

Two types of floating active resistors based on a complementary regulated cascode topology with cross-coupled regulated transistors are presented in this paper. The first topology is a high swing complementary regulated cascode active resistor. The second topology is a complementary common gate with a regulated cross coupled transistor. The small-signal input resistances of the floating resistors are derived. Three graphs of the input current versus the input voltage for different aspect ratios are designed and plotted using the Cadence Spectre 0.18-µm Rohm Semiconductor process. The total harmonic distortion graphs are plotted for three different aspect ratios with different input-voltage amplitudes and different input frequencies. From the simulation results, it is observed that a resistance of approximately 8.52 MΩ can be obtained from supply voltage at  ±0.9 V.

Keywords: floating active resistor, complementary common gate, complementary regulated cascode, current mirror

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Authors: Arakelian Vigen, Geng Jing, Le Baron Jean-Paul

Abstract:

The paper deals with the design of parallel manipulators with balanced inertia forces and moments. The balancing of the resultant of the inertia forces of 3-RRR planar parallel manipulators is carried out through mass redistribution and centre of mass acceleration minimization. The proposed balancing technique is achieved in two steps: at first, optimal redistribution of the masses of input links is accomplished, which ensures the similarity of the end-effector trajectory and the manipulator’s common centre of mass trajectory, then, optimal trajectory planning of the end-effector by 'bang-bang' profile is reached. In such a way, the minimization of the magnitude of the acceleration of the centre of mass of the manipulator brings about a minimization of shaking force. To minimize the resultant of the inertia moments (shaking moment), the active balancing via inertia flywheel is applied. However, in this case, the active balancing is quite different from previous applications because it provides only a partial cancellation of the shaking moment due to the incomplete balancing of shaking force.

Keywords: dynamic balancing, inertia force minimization, inertia moment minimization, 3-RRR planar parallel manipulator

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Authors: Orose Rugchati, Sarawut Wattanawongpitak

Abstract:

This research studied the analysis of the thermal conductivity and heat transfer in porcine meat due to the electric current flowing between the electrode plates in parallel. Hot-boned pork sample was prepared in 2*1*1 cubic centimeter. The finite element method with ANSYS workbench program was applied to simulate this heat transfer problem. In the thermal simulation, the input thermoelectric energy was calculated from measured current that flowing through the pork and the input voltage from the dc voltage source. The comparison of heat transfer in pork according to two voltage sources: DC voltage 30 volts and dc pulsed voltage 60 volts (pulse width 50 milliseconds and 50 % duty cycle) were demonstrated. From the result, it shown that the thermal conductivity trends to be steady at temperature 40C and 60C around 1.39 W/mC and 2.65 W/mC for dc voltage source 30 volts and dc pulsed voltage 60 volts, respectively. For temperature increased to 50C at 5 minutes, the appearance color of porcine meat at the exposer point has become to fade. This technique could be used for predicting of thermal conductivity caused by some meat’s characteristics.

Keywords: thermal conductivity, porcine meat, electricity, finite element method

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Authors: D. J. Dahigaonkar, D. G. Wakde

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The performance analysis of low voltage low power CMOS OTA is presented in this paper. The differential input single output OTA is simulated in 180nm CMOS process technology. The simulation results indicate high bandwidth of the order of 7.04GHz with 0.766mW power consumption and transconductance of -71.20dB. The total harmonic distortion for 100mV input at a frequency of 1MHz is found to be 2.3603%. In addition to this, to establish comparative analysis of designed OTA and analyze effect of technology scaling, the differential input single output OTA is further simulated using 350nm CMOS process technology and the comparative analysis is presented in this paper.

Keywords: Operational Transconductance Amplifier, Total Harmonic Distortions, low voltage/low power, power dissipation

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Authors: Xinke Huang, Huan Wang, Lidong Guo, Changbin Ju, Runbiao Liu, Shanshan Meng, Yibo Wang, Honghua Xu

Abstract:

Large-scale photovoltaic (PV) generation system connected to HVDC grid has many advantages compared to its counterpart of AC grid. DC connection can solve many problems that AC connection faces, such as the grid-connection and power transmission, and DC connection is the tendency. DC/DC converter as the most important device in the system has become one of the hot spots recently. The paper proposes a centralized DC/DC converter which uses Boost Full Bridge Isolated DC/DC Converter(BFBIC) topology and combination through input parallel output series(IPOS) method to improve power capacity and output voltage to match with the HVDC grid voltage. Meanwhile, it adopts input current sharing control strategy to realize input current and output voltage balance. A ±30kV/1MW system is modeled in MATLAB/SIMULINK, and a downscaled ±10kV/200kW DC/DC converter platform is built to verify the proposed topology and control strategy.

Keywords: photovoltaic generation, cascaded dc/dc converter, galvanic isolation, high-voltage, direct current (HVDC)

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Authors: Vigen Arakelian

Abstract:

The balancing of mechanisms is a well-known problem in the field of mechanical engineering because the variable dynamic loads cause vibrations, as well as noise, wear and fatigue of the machines. A mechanical system with unbalance shaking force and shaking moment transmits substantial vibration to the frame. Therefore, the objective of the balancing is to cancel or reduce the variable dynamic reactions transmitted to the frame. The resolution of this problem consists in the balancing of the shaking force and shaking moment. It can be fully or partially, by internal mass redistribution via adding counterweights or by modification of the mechanism's architecture via adding auxiliary structures. The balancing problems are of continue interest to researchers. Several laboratories around the world are very active in this area and new results are published regularly. However, despite its ancient history, mechanism balancing theory continues to be developed and new approaches and solutions are constantly being reported. Various surveys have been published that disclose particularities of balancing methods. The author believes that this is an appropriate moment to present a state of the art of the shaking force balancing studies completed by new research results. This paper presents an overview of methods devoted to the shaking force balancing of mechanisms, as well as the historical aspects of the origins and the evolution of the balancing theory of mechanisms.

Keywords: inertial forces, shaking forces, balancing, dynamics, mechanism design

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Authors: Markus Meyer, Bastian Maucher, Rolf Witzmann

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The ever increasing amount of distributed generation in low voltage distribution grids (mainly PV and micro-CHP) can lead to reverse load flows from low to medium/high voltage levels at times of high feed-in. Reverse load flow leads to rising voltages that may even exceed the limits specified in the grid codes. Furthermore, the share of electrical loads connected to low voltage distribution grids via switched power supplies continuously increases. In combination with inverter-based feed-in, this results in high harmonic levels reducing overall power quality. Especially high levels of third-order harmonic currents can lead to neutral conductor overload, which is even more critical if lines with reduced neutral conductor section areas are used. This paper illustrates a possible concept for smart grids in order to increase the feed-in capacity, improve power quality and to ensure safe operation of low voltage distribution grids at all times. The key feature of the concept is a hierarchically structured control strategy that is run on a superordinated controller, which is connected to several distributed grid analyzers and inverters via broad band powerline (BPL). The strategy is devised to ensure both quick response time as well as the technically and economically reasonable use of the available inverters in the grid (PV-inverters, batteries, stepless line voltage regulators). These inverters are provided with standard features for voltage control, e.g. voltage dependent reactive power control. In addition they can receive reactive power set points transmitted by the superordinated controller. To further improve power quality, the inverters are capable of active harmonic filtering, as well as voltage balancing, whereas the latter is primarily done by the stepless line voltage regulators. By additionally connecting the superordinated controller to the control center of the grid operator, supervisory control and data acquisition capabilities for the low voltage distribution grid are enabled, which allows easy monitoring and manual input. Such a low voltage distribution grid can also be used as a virtual power plant.

Keywords: distributed generation, distribution grid, power quality, smart grid, virtual power plant, voltage control

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Authors: Muhammad Affan, Muhammad Ilyas Raza, Muhammad Harris Hashmi

Abstract:

This work is attributed to the battery management unit design of student Satellites under Pakistan National Student Satellite Program (PNSSP). The aim has been to design a customized, low-cost, efficient, reliable and less-complex battery management scheme for the Satellite. Nowadays, Lithium Ion (Li-ion) batteries have become the de-facto standard for remote applications, especially for satellites. Li-ion cells are selected for secondary storage. The design also addresses Li-ion safety requirements by monitoring, balancing and protecting cells for safe and prolonged operation. Accurate voltage measurement of individual cells was the main challenge because all the actions triggered were based on the digital voltage measurement. For this purpose, a resistive-divider network is used to maintain simplicity and cost-effectiveness. To cater the problem of insufficient i/o pins on microcontroller, fast multiplexers and de-multiplexers were used. The discrepancy inherited in the given design is the dissipation of heat due to the dissipative resistors. However, it is still considered to be the optimum adoption, considering the simple and cost-effective nature of the passive balancing technique. Furthermore, it is a completely unique solution, customized to meet specific requirements. However, there is still an option for a more advanced and expensive design.

Keywords: satellite, battery module, passive balancing, dissipative

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Authors: Sekkak Abdelmalek

Abstract:

The aim of this paper is to establish an energy balance of the drivetrain of a low power electric vehicle (around ten kilowatts). The study is based on two topologies of power electronics converter, the voltage source inverter and cascaded H-Bridge inverter. For each of these solutions, two voltage levels are studied for the drivetrain. At first a discussion of cascaded H-Bridge inverters will be performed on the potential benefits of this structure for its use to other functions such as macroscopic batteries management system. In a second step, the performances of the traction chain are compared according to the structure of the power converter and the voltage level of the traction chain.

Keywords: power electronics, static converters, cascaded H-Bridge, traction chain, efficiency, losses, batteries balancing

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Authors: Irina Astrova, Arne Koschel, Thole Schneider, Johannes Westhuis, Jürgen Westerkamp

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The main purpose of this paper was to find a simple solution for load balancing and fault tolerance in OSGi. The challenge was to implement a highly available web application such as a shopping cart system with load balancing and fault tolerance, without having to change the core of OSGi.

Keywords: fault tolerance, load balancing, OSGi, shopping cart system

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Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

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A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: high voltage, IGBT, solid state switch, bipolar transistor

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Authors: Tanmay Raj, Vedika Gupta

Abstract:

For its groundbreaking and substantial power, cloud computing is today’s most popular breakthrough. It is a sort of Internet-based computing that allows users to request and receive numerous services in a cost-effective manner. Virtualization, grid computing, and utility computing are the most widely employed emerging technologies in cloud computing, making it the most powerful. However, cloud computing still has a number of key challenges, such as security, load balancing, and non-critical failure adaption, to name a few. The massive growth of cloud computing will put an undue strain on servers. As a result, network performance will deteriorate. A good load balancing adjustment can make cloud computing more productive and in- crease client fulfillment execution. Load balancing is an important part of cloud computing because it prevents certain nodes from being overwhelmed while others are idle or have little work to perform. Response time, cost, throughput, performance, and resource usage are all parameters that may be improved using load balancing.

Keywords: cloud computing, load balancing, computing, SIP server clusters

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Authors: Pocholo Rodriguez, Anne Bernadine Ocampo, Ian Benedict Chan, Janric Micah Gray

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The state of an electric power system may be classified as either stable or unstable. The borderline of stability is at any condition for which a slight change in an unfavourable direction of any pertinent quantity will cause instability. Voltage instability in power distribution systems could lead to voltage collapse and thus power blackouts. The researchers will present an intelligent system using back propagation algorithm that can detect voltage instability and output voltage of a power distribution and classify it as stable or unstable. The researchers’ work is the use of parameters involved in voltage instability as input parameters to the neural network for training and testing purposes that can provide faster detection and monitoring of the power distribution system.

Keywords: back-propagation algorithm, load instability, neural network, power distribution system

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Authors: Deepika Sharma, Bal Krishan

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In this paper, the structure of N-channel VDMOS was designed and analyzed using Silvaco TCAD tools by varying N+ source doping concentration, P-Body doping concentration, gate oxide thickness and the diffuse time. VDMOS is considered to be ideal power switches due to its high input impedance and fast switching speed. The performance of the device was analyzed from the Ids vs Vgs curve. The electrical characteristics such as threshold voltage, gate oxide thickness and breakdown voltage for the proposed device structures were extarcted. Effect of epitaxial layer on various parameters is also observed.

Keywords: on-resistance, threshold voltage, epitaxial layer, breakdown voltage

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Authors: Monika Rawat, Rahul Kumar

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Input output Buffer Information Specification (IBIS) models are used for describing the analog behavior of the Input Output (I/O) buffers of a digital device. They are widely used to perform signal integrity analysis. Advantages of using IBIS models include simple structure, IP protection and fast simulation time with reasonable accuracy. As design complexity of driver and receiver increases, capturing exact behavior from transistor level model into IBIS model becomes an essential task to achieve better accuracy. In this paper, an improvement in existing methodology of generating IBIS model for complex I/O interfaces such as Inter-Integrated Circuit (I2C) and Low Voltage Differential Signaling (LVDS) is proposed. Furthermore, the accuracy and computational performance of standard method and proposed approach with respect to SPICE are presented. The investigations will be useful to further improve the accuracy of IBIS models and to enhance their wider acceptance.

Keywords: IBIS, signal integrity, open-drain buffer, low voltage differential signaling, behavior modelling, transient simulation

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Authors: P. Azimi, B. Behtoiy, A. A. Najafi, H. R. Charmchi

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According to the previous studies, one of the most famous techniques which affect the efficiency of a production line is the assembly line balancing (ALB) technique. This paper examines the balancing effect of a whole production line of a real auto glass manufacturer in three steps. In the first step, processing time of each activity in the workstations is generated according to a practical approach. In the second step, the whole production process is simulated and the bottleneck stations have been identified, and finally in the third step, several improvement scenarios are generated to optimize the system throughput, and the best one is proposed. The main contribution of the current research is the proposed framework which combines two famous approaches including Assembly Line Balancing and Optimization via Simulation technique (OvS). The results show that the proposed framework could be applied in practical environments, easily.

Keywords: assembly line balancing problem, optimization via simulation, production planning

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Authors: Bo Bae Song, Byung Seok Lee, Hyun young Kim, Chung Kwang Lee, Yong Seo Koo

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This paper proposed a silicon controller rectifier (SCR) based ESD protection device to protect low voltage ESD for integrated circuit. The proposed ESD protection device has low trigger voltage and high holding voltage compared with conventional SCR-based ESD protection devices. The proposed ESD protection circuit is verified and compared by TCAD simulation. This paper verified effective low voltage ESD characteristics with low trigger voltage of 5.79V and high holding voltage of 3.5V through optimization depending on design variables (D1, D2, D3, and D4).

Keywords: ESD, SCR, holding voltage, latch-up

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