Search results for: CMOS analog to digital converter

Authors: Marinka K. Baghdasaryan, Siranush M. Muradyan, Avgen A. Gasparyan

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Based on the experimental data, the impact of resistance and reactance of the winding, as well as the magnetic permeability of the magnetic circuit steel material on the value of the electromotive force of the induction converter is investigated. The obtained results allow to estimate the main technological spreads and determine the maximum level of the electromotive force change. By the method of experiment planning, the expression of a polynomial for the electromotive force which can be used to estimate the adequacy of mathematical models to be used at the investigation and design of induction converters is obtained.

Keywords: induction converter, electromotive force, expectation, technological spread, deviation, planning an experiment, polynomial, confidence level

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Authors: Ow Tze Weng, Suhaila Isaak, Yusmeeraz Yusof

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The trend of health care screening devices in the world is increasingly towards the favor of portability and wearability, especially in the most common electrocardiogram (ECG) monitoring system. This is because these wearable screening devices are not restricting the patient’s freedom and daily activities. While the demand of low power and low cost biomedical system on chip (SoC) is increasing in exponential way, the front end ECG sensors are still suffering from flicker noise for low frequency cardiac signal acquisition, 50 Hz power line electromagnetic interference, and the large unstable input offsets due to the electrode-skin interface is not attached properly. In this paper, a high performance CMOS amplifier for ECG sensors that suitable for low power wearable cardiac screening is proposed. The amplifier adopts the highly stable folded cascode topology and later being implemented into RC feedback circuit for low frequency DC offset cancellation. By using 0.13 µm CMOS technology from Silterra, the simulation results show that this front end circuit can achieve a very low input referred noise of 1 pV/√Hz and high common mode rejection ratio (CMRR) of 174.05 dB. It also gives voltage gain of 75.45 dB with good power supply rejection ratio (PSSR) of 92.12 dB. The total power consumption is only 3 µW and thus suitable to be implemented with further signal processing and classification back end for low power biomedical SoC.

Keywords: CMOS, ECG, amplifier, low power

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Authors: Abdelhalim Kessal

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This paper treats a design of combined control of a single phase power factor correction (PFC). The strategy of the proposed control is based on two parts, the first, for the outer loop (DC output regulated voltage), and the second govern the input current of the converter in order to achieve a sinusoidal form in phase with the grid voltage. Two kinds of regulators are used, Fuzzy controller for the outer loop and predictive controller for the inner loop. The controllers are verified and discussed through simulation under MATLAB/Simulink platform. Also an experimental confirmation is applied. Results present a high dynamic performance under various parameters changes.

Keywords: boost converter, harmonic distortion, Fuzzy, predictive, unity power factor

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Authors: A. Sreedevi, G. Anantaramu

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The present space research organizations are striving towards the development of lighter, smaller, more efficient, low cost, and highly reliable power supply. Switch mode power supplies (SMPS) overcome the demerits of linear power supplies such as low efficiency, difficulties in thermal management, and in boosting the output voltage. Space applications require a constant DC voltage to supply its load. As the load varies, the battery terminal voltage tends to vary accordingly. To avoid this variation in the load terminal voltage, a DC-DC regulator is required. The conventional regulator for space applications is isolated boost topology. The proposed topology uses an interleaved push-pull converter with a current doubler secondary to reduce the EMI issues and increase efficiency. The proposed topology uses a floating technique where the converter derives power from the battery and generates only the voltage that is required to fill the gap between the bus and the battery voltage. The direct voltage sense and current loop provide tight regulation of output and better stability. Converter is designed with 50 kHz switching frequency using UC 1825 PWM controller employing both voltage and peak current mode control. Experimental tests have been carried out on the converter under different input and load conditions to validate the design. The experimental results showed that the efficiency was greater than 91%. Stability analysis is done using venable stability analyzer.

Keywords: push pull converter, current doubler, converter, PWM control

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Authors: Patikineti Sreenivasulu, K. srinivasa Rao, A. Vinaya Babu

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The demand for portability, performance and high functional integration density of digital devices leads to the scaling of complementary metal oxide semiconductor (CMOS) devices inevitable. The increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. MTCMOS technology provides low leakage and high performance operation by utilizing high speed, low Vt (LVT) transistors for logic cells and low leakage, high Vt (HVT) devices as sleep transistors. Sleep transistors disconnect logic cells from the supply and/or ground to reduce the leakage in the sleep mode. In this technology, energy consumption while doing the mode transition and minimum time required to turn ON the circuit upon receiving the wake up signal are issues to be considered because these can adversely impact the performance of VLSI circuit. In this paper we are introducing an enhancing method of MTCMOS technology to optimize the power in MTCMOS sequential circuits.

Keywords: power consumption, ultra-low power, leakage, sub threshold, MTCMOS

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Authors: Yang Geng, Anqi Zhao

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The misreading theory of Harold Bloom provides a new diachronic perspective as an approach to the consistency between rhetoric of digital technology, dynamic movement of digital images and uncertain meaning of text. Reinterpreting the diachroneity of 'intertextuality' in the context of misreading theory extended the range of the 'intermediality' of transmedia to the intense tension between digital images and symbolic images throughout history of images. With the analogy between six categories of revisionary ratios and six steps of digital transformation, digital rhetoric might be illustrated as a linear process reflecting dynamic, intensive relations between digital moving images and original static images. Finally, it was concluded that two-way framework of the rhetoric of transformation of digital images and reversed served as a renarrative structure to revive static images by reconnecting them with digital moving images.

Keywords: rhetoric, digital art, intermediality, misreading theory

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Authors: Michael Fundator

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Groundbreaking application of biomathematical and biochemical research in neural networks processes to formation of non-canonical bases, islands, and analog bases in DNA and mRNA at or near the transcription that contradicts the long anticipated statistical assumptions for the distribution of bases and analog bases compounds is implemented through statistical and stochastic methods apparatus with addition of quantum principles, where the usual transience of Poisson spike train becomes very instrumental tool for finding even almost periodical type of solutions to Fokker-Plank stochastic differential equation. Present article develops new multidimensional methods of finding solutions to stochastic differential equations based on more rigorous approach to mathematical apparatus through Kolmogorov-Chentsov continuity theorem that allows the stochastic processes with jumps under certain conditions to have γ-Holder continuous modification that is used as basis for finding analogous parallels in dynamics of neutral networks and formation of analog bases and transcription in DNA.

Keywords: Fokker-Plank stochastic differential equation, Kolmogorov-Chentsov continuity theorem, neural networks, translation and transcription

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Authors: Yo-Sheng Lin, Run-Chi Liu, Chien-Chu Ji, Chih-Chung Chen, Chien-Chin Wang

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A W-band double-balanced mixer for direct up-conversion using standard 90 nm CMOS technology is reported. The mixer comprises an enhanced double-balanced Gilbert cell with PMOS negative resistance compensation for conversion gain (CG) enhancement and current injection for power consumption reduction and linearity improvement, a Marchand balun for converting the single LO input signal to differential signal, another Marchand balun for converting the differential RF output signal to single signal, and an output buffer amplifier for loading effect suppression, power consumption reduction and CG enhancement. The mixer consumes low power of 6.9 mW and achieves LO-port input reflection coefficient of -17.8~ -38.7 dB and RF-port input reflection coefficient of -16.8~ -27.9 dB for frequencies of 90~100 GHz. The mixer achieves maximum CG of 3.6 dB at 95 GHz, and CG of 2.1±1.5 dB for frequencies of 91.9~99.4 GHz. That is, the corresponding 3 dB CG bandwidth is 7.5 GHz. In addition, the mixer achieves LO-RF isolation of 36.8 dB at 94 GHz. To the authors’ knowledge, the CG, LO-RF isolation and power dissipation results are the best data ever reported for a 94 GHz CMOS/BiCMOS up-conversion mixer.

Keywords: CMOS, W-band, up-conversion mixer, conversion gain, negative resistance compensation, output buffer amplifier

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Authors: Nissar Mohammad Karim, Norhayati Soin

Abstract:

To ensure fast switching in high-K incorporated Complementary Metal Oxide Semiconductor (CMOS) transistors, the results on the basis of d (NBTI) by incorporating SiO2 dielectric with aged samples of CuO sol-gels have been reported. Precursor ageing has been carried out for 4 days. The minimum obtained refractive index is 1.0099 which was found after 3 hours of adhesive UV curing. Obtaining a low refractive index exhibits a low dielectric constant and hence a faster system.

Keywords: refractive index, Sol-Gel, precursor aging, aging

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Authors: A. Assif

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This paper presents the modeling of a prototype distribution static compensator (D-STATCOM) for voltage sag and swell mitigation in an unbalanced distribution system. Here the concept that an inverter can be used as generalized impedance converter to realize either inductive or capacitive reactance has been used to mitigate power quality issues of distribution networks. The D-STATCOM is here supposed to replace the widely used StaticVar Compensator (SVC). The scheme is based on the Voltage Source Converter (VSC) principle. In this model PWM based control scheme has been implemented to control the electronic valves of VSC. Phase shift control Algorithm method is used for converter control. The D-STATCOM injects a current into the system to mitigate the voltage sags. In this paper the modeling of D¬STATCOM has been designed using MATLAB SIMULINIC. Accordingly, simulations are first carried out to illustrate the use of D-STATCOM in mitigating voltage sag in a distribution system. Simulation results prove that the D-STATCOM is capable of mitigating voltage sag as well as improving power quality of a system.

Keywords: D-STATCOM, voltage sag, voltage source converter (VSC), phase shift control

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Authors: Tian-Wei Huang, Wei-Ting Bai, Yu-Tung Cheng, Jeng-Han Tsai

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In this paper, a 1-stage 6-section conventional distributed amplifier (CDA) structure distributed power amplifier (DPA) fabricated in a 28-nm HPC+ 1P9M CMOS process is proposed. The transistor size selection is introduced to achieve broadband power matching and thus remains a high flatness output power and power added efficiency (PAE) within the bandwidth. With the inductive peaking technique, the high-frequency pole appears and the high-frequency gain is increased; the gain flatness becomes better as well. The inductive elements used to form an artificial transmission line are built up with a floating ground coplanar waveguide plane (CPWFG) rather than a microstrip line, coplanar waveguide (CPW), or spiral inductor to get better performance. The DPA achieves 12.6 dB peak gain at 52.5 GHz with 2.9 to 64.9 GHz 3-dB bandwidth. The Psat is 11.4 dBm with PAEMAX of 10.6 % at 25 GHz. The output 1-dB compression point power is 9.8 dBm.

Keywords: distributed power amplifier (DPA), gain bandwidth (GBW), floating ground CPW, inductive peaking, 28-nm, CMOS, 5G.

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Authors: J. S. Kim

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This paper presents a 0.13-µm Complementary Metal-Oxide Semiconductor (CMOS) vector modulator for beamforming system. The vector modulator features a 360° phase and gain range of -10 dB to 10 dB with a root mean square phase and amplitude error of only 2.2° and 0.45 dB, respectively. These features make it a suitable for wireless backhaul system in the 5 GHz industrial, scientific, and medical (ISM) bands. It draws a current of 20.4 mA from a 1.2 V supply. The total chip size is 1.87x1.34 mm².

Keywords: CMOS, vector modulator, beamforming, 802.11ac

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Authors: Josef Slapal

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Digital images are approximations of real ones and, therefore, to be able to study them, we need the digital plane Z2 to be equipped with a convenient structure that behaves analogously to the Euclidean topology on the real plane. In particular, it is required that such a structure allows for a digital analogue of the Jordan curve theorem. We introduce certain adjacency graphs on the digital plane and prove digital Jordan curves for them thus showing that the graphs provide convenient structures on Z2 for the study and processing of digital images. Further convenient structures including the wellknown Khalimsky and Marcus-Wyse adjacency graphs may be obtained as quotients of the graphs introduced. Since digital Jordan curves represent borders of objects in digital images, the adjacency graphs discussed may be used as background structures on the digital plane for solving the problems of digital image processing that are closely related to borders like border detection, contour filling, pattern recognition, thinning, etc.

Keywords: digital plane, adjacency graph, Jordan curve, quotient adjacency

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Authors: Joanna Konstantinou

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Due to the pandemic, we have recently witnessed an explosion of HR Tech offering a variety of solutions for digital transformation, as well as a large number of HR practices implemented by professionals both in data science and occupational psychology. The aim of this study is to explore the impact of these practices and their effectiveness and to develop an understanding of digital leadership. The study will be based on semi-structured interviews using qualitative research methods and tools.

Keywords: HR practices, digital trasformation, pandemic, digital leadership

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Authors: A. Djahbar, M. Aillerie, E. Bounadja

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In this paper we treat a new structure of a high-power actuator which is used to either industry or electric traction. Indeed, the actuator is constituted by two induction motors, the first is a six-phase motor connected in series with another three-phase motor via the stators. The whole is supplied by a single static converter. Our contribution in this paper is the optimization of the system supply source. This is feeding the multimotor group by a direct converter frequency without using the DC-link capacitor. The modelling of the components of multimotor system is presented first. Only the first component of stator currents is used to produce the torque/flux of the first machine in the group. The second component of stator currents is considered as additional degrees of freedom and which can be used for power conversion for the other connected motors. The decoupling of each motor from the group is obtained using the direct vector control scheme. Simulation results demonstrate the effectiveness of the proposed structure.

Keywords: induction machine, motor drives, scalar modulation technique, three-to-six phase matrix converter

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Authors: Danuvasin Charoen

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This study investigates the development of the digital economy policy in Thailand. The researcher describes the importance of digital technologies for competitiveness development of the country. In addition, the researcher analyzes the components and roadmap of the digital economy policy in Thailand. Main problems and challenges of the policy were identified. The data were gathered and analyzed from secondary sources. The finding can be used to guide the implementation of the digital economy in Thailand and other developing economies.

Keywords: digital economy, ICT in developing countries, Thailand, ICT development

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Authors: Nissar Mohammad Karim, Norhayati Soin

Abstract:

To ensure fast switching in high-K incorporated Complementary Metal Oxide Semiconductor (CMOS) transistors, the results on the basis of d (NBTI) by incorporating SiO2 dielectric with aged samples of CuO sol-gels have been reported. Precursor ageing has been carried out for 4 days. The minimum obtained refractive index is 1.0099 which was found after 3 hours of adhesive UV curing. Obtaining a low refractive index exhibits a low dielectric constant and hence a faster system.

Keywords: refractive index, sol-gel, precursor ageing, metallurgical and materials engineering

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Authors: Ammar Nimer Natsheh

Abstract:

Chaos control is used to design a controller that is able to eliminate the chaotic behaviour of nonlinear dynamic systems that experience such phenomena. The paper describes the control of the bifurcation behaviour of a parallel-connected DC-DC buck-boost converter used to provide an interface between energy storage batteries and photovoltaic (PV) arrays as renewable energy sources. The paper presents a delayed feedback control scheme in a module converter comprises two identical buck-boost circuits and operates in the continuous-current conduction mode (CCM). MATLAB/SIMULINK simulation results show the effectiveness and robustness of the scheme.

Keywords: chaos, bifurcation, DC-DC Buck-Boost Converter, Delayed Feedback Control

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Authors: M. Aeysha Parvin, J. Asha, J. Jenifer

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This letter presents a novel frequency-shift keying(FSK) receiver using PLL-based FSK demodulator, thereby achieving high sensitivity and low power consumption. The proposed receiver comprises a power amplifier, mixer, 3-stage ring oscillator, PLL based demodulator. Moreover, the proposed receiver is fabricated using 0.12µm CMOS process and consumes 0.7Mw. Measurement results demonstrate that the proposed receiver has a sensitivity of -93dbm with 1Mbps data rate in receiving a 2.4 GHz FSK signal.

Keywords: CMOS FSK receiver, phase locked loop (PLL), 3-stage ring oscillator, FSK signal

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Authors: H. Abderrezek, M. N. Harmas

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DC-DC converters are widely used as reliable power source for many industrial and military applications, computers and electronic devices. Several control methods were developed for DC-DC converters control mostly with asymptotic convergence. Synergetic control (SC) is a proven robust control approach and will be used here in a so-called terminal scheme to achieve finite time convergence. Lyapunov synthesis is adopted to assure controlled system stability. Furthermore particle swarm optimization (PSO) algorithm, based on an integral time absolute of error (ITAE) criterion will be used to optimize controller parameters. Simulation of terminal synergetic control of a DC-DC converter is carried out for different operating conditions and results are compared to classic synergetic control performance, that which demonstrate the effectiveness and feasibility of the proposed control method.

Keywords: DC-DC converter, PSO, finite time, terminal, synergetic control

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Authors: Auwal Mustapha Imam

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The aim of the energy management system is to monitor and control utilization, access, optimize and manage energy availability. This can be realized through real-time analyses and energy sources and loads data control in a predictive way. Smart-home monitoring and control provide convenience and cost savings by controlling appliances, lights, thermostats and other loads. There may be different categories of loads in the various homes, and the homeowner may wish to control access to solar-generated energy to protect the storage from draining completely. Controlling the power system operation by managing the converter output power and controlling how it feeds the appliances will satisfy the residential load demand. The Internet of Things (IoT) provides an attractive technological platform to connect the two and make home automation and domestic energy utilization easier and more attractive. This paper presents the use of IoT-based control topology to monitor and control power distribution and consumption by DC loads connected to single-input multiple outputs (SIMO) DC-DC converter, thereby reducing leakages, enhancing performance and reducing human efforts. A SIMO converter was first developed and integrated with the IoT/Raspberry Pi control topology, which enables the user to monitor and control power scheduling and load forecasting via an Android app.

Keywords: flyback, converter, DC-DC, photovoltaic, SIMO

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Authors: Shao-Ku Kao

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This paper presents an active rectifier with time-domain delay compensation to enhance the efficiency. A delay calibration circuit is designed to convert delay time to voltage and adaptive control on/off delay in variable input voltage. This circuit is designed in 0.18 mm CMOS process. The input voltage range is from 2 V to 3.6 V with the output voltage from 1.8 V to 3.4 V. The efficiency can maintain more than 85% when the load from 50 Ω ~ 1500 Ω for 3.6 V input voltage. The maximum efficiency is 92.4 % at output power to be 38.6 mW for 3.6 V input voltage.

Keywords: wireless power transfer, active diode, delay compensation, time to voltage converter, PCE

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Authors: Chechen Liao, Yi-Jen Huang, Yu-Ting Lu

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This study explores and complements digital aspects. In this study, we construct a research model based on the theory of reasoned action and extend it with the advantages and disadvantages of intangibility (convenience, perceived risk), some characteristics of digital products (price, variety, trialability), and factors related to entertainment (perceived playfulness) to predict what consumers really consider when they buy digital music. Eight hypotheses were tested and supported. Finally, we prove that the theory of reasoned action is still valid in the field of digital products.

Keywords: digital music, digital product, theory of reasoned action

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Authors: Yasunori Kobori, Li Quan, Shu Wu, Nizam Mohyar, Zachary Nosker, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

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This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors which capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the typical current of 350 mA. We are now making the proposed circuit on a universal board in order to measure the experimental characteristics.

Keywords: LED driver, electrolytic, capacitor-less, AC-DC converter, buck-boost converter, current ripple canceller

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Authors: Kittipong Tripetch, Nobuhiko Nakano

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This paper proposes one stage and two stage CMOS Complementary Regulated Cascode Distributed Amplifier (CRCDA) design based on Inductive and Transformer coupling techniques. Usually, Distributed amplifier is based on inductor coupling between gate and gate of MOSFET and between drain and drain of MOSFET. But this paper propose some new idea, by coupling with differential primary windings of transformer between gate and gate of MOSFET first stage and second stage of regulated cascade amplifier and by coupling with differential secondary windings transformer of MOSFET between drain and drain of MOSFET first stage and second stage of regulated cascade amplifier. This paper also proposes polynomial modeling of Silicon Transformer passive equivalent circuit from Nanyang Technological University which is used to extract frequency response of transformer. Cadence simulation results are used to verify validity of transformer polynomial modeling which can be used to design distributed amplifier without Cadence. 4 parameters of scattering matrix of 2 port of the propose circuit is derived as a function of 4 parameters of impedance matrix.

Keywords: CMOS regulated cascode distributed amplifier, silicon transformer modeling with polynomial, low power consumption, distribute amplification technique

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Authors: Bin Li

Abstract:

In the era of the digital economy, digital transformation has gradually become a strategic choice for enterprise development, but there is a relative lack of systematic research from the perspective of enterprise growth. Based on the sample of Chinese A-share listed companies from 2011 to 2021, this paper constructs A digital transformation index system and an enterprise growth composite index to empirically test the impact of enterprise digital transformation on enterprise growth and its mechanism. The results show that digital transformation can significantly promote corporate growth. The mechanism analysis finds that reducing operating costs, optimizing human capital structure, promoting R&D output and improving digital innovation capability play an important intermediary role in the process of digital transformation promoting corporate growth. At the same time, the level of external digital infrastructure and the strength of organizational resilience play a positive moderating role in the process of corporate digital transformation promoting corporate growth. In addition, while further analyzing the heterogeneity of enterprises, this paper further deepens the analysis of the driving factors and digital technology support of digital transformation, as well as the three dimensions of enterprise growth, thus deepening the research depth of enterprise digital transformation.

Keywords: digital transformation, enterprise growth, digital technology, digital infrastructure, organization resilience, digital innovation

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Authors: H. Alheeh, M. Alameri, A. Al Tarabsheh

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There has been a growing interest in CMOS-based sensors technology in cameras as they afford low-power, small-size, and cost-effective imaging systems. This article describes the CMOS image sensor pixel categories and presents the design and the simulation of the 3-Transistor (3T) Active Pixel Sensor (APS) in MATLAB/Simulink tool. The analysis investigates the conversion of the light into an electrical signal for a single pixel sensing circuit, which consists of a photodiode and three NMOS transistors. The paper also proposes three modes for the pixel operation; reset, integration, and readout modes. The simulations of the electrical signals for each of the studied modes of operation show how the output electrical signals are correlated to the input light intensities. The charging/discharging speed for the photodiodes is also investigated. The output voltage for different light intensities, including in dark case, is calculated and showed its inverse proportionality with the light intensity.

Keywords: APS, CMOS image sensor, light intensities photodiode, simulation

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Authors: Xinke Huang, Huan Wang, Lidong Guo, Changbin Ju, Runbiao Liu, Guoen Cao, Yibo Wang, Honghua Xu

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Grid connected photovoltaic (PV) power system is to be developed in the direction of large-scale, clustering. Large-scale PV generation systems connected to HVDC grid have many advantages compared to its counterpart of AC grid, and DC connection is the tendency. DC/DC converter as the most important device in the system, has become one of the hot spots recently. The paper proposes a Quasi Z-Source(QZS) based Boost Full Bridge Isolated DC/DC Converter(BFBIC) topology as a basis power module and combination through input parallel output series(IPOS) method to improve power capacity and output voltage to match with the HVDC grid. The topology has both traditional voltage source and current source advantages, it permit the H-bridge short through and open circuit, which adopt utility duty cycle control and achieved input current and output voltage balancing through input current sharing control strategy. A ±10kV/200kW system model is built in MATLAB/SIMULINK to verify the proposed topology and control strategy.

Keywords: PV Generation System, Cascaded DC/DC converter, HVDC, Quasi Z Source Converter

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Authors: Hamdi Belgacem, Fradi Aymen

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In this paper we present a low power, low cost differential logic unit (LU). The proposed LU receives dual-rail inputs and generates dual-rail outputs. The proposed circuit can be used in Arithmetic and Logic Units (ALU) of processor. It can be also dedicated for self-checking applications based on dual duplication code. Four logic functions as well as their inverses are implemented within a single Logic Unit. The hardware overhead for the implementation of the proposed LU is lower than the hardware overhead required for standard LU implemented with standard CMOS logic style. This new implementation is attractive as fewer transistors are required to implement important logic functions. The proposed differential logic unit can perform 8 Boolean logical operations by using only 16 transistors. Spice simulations using a 32 nm technology was utilized to evaluate the performance of the proposed circuit and to prove its acceptable electrical behaviour.

Keywords: differential logic unit, double pass transistor logic, low power CMOS design, low cost CMOS design

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Authors: Monika Rawat, Rahul Kumar

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Input output Buffer Information Specification (IBIS) models are used for describing the analog behavior of the Input Output (I/O) buffers of a digital device. They are widely used to perform signal integrity analysis. Advantages of using IBIS models include simple structure, IP protection and fast simulation time with reasonable accuracy. As design complexity of driver and receiver increases, capturing exact behavior from transistor level model into IBIS model becomes an essential task to achieve better accuracy. In this paper, an improvement in existing methodology of generating IBIS model for complex I/O interfaces such as Inter-Integrated Circuit (I2C) and Low Voltage Differential Signaling (LVDS) is proposed. Furthermore, the accuracy and computational performance of standard method and proposed approach with respect to SPICE are presented. The investigations will be useful to further improve the accuracy of IBIS models and to enhance their wider acceptance.

Keywords: IBIS, signal integrity, open-drain buffer, low voltage differential signaling, behavior modelling, transient simulation

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