Search results for: electrical circuits
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2281

Search results for: electrical circuits

2251 Deep Reinforcement Learning Model Using Parameterised Quantum Circuits

Authors: Lokes Parvatha Kumaran S., Sakthi Jay Mahenthar C., Sathyaprakash P., Jayakumar V., Shobanadevi A.

Abstract:

With the evolution of technology, the need to solve complex computational problems like machine learning and deep learning has shot up. But even the most powerful classical supercomputers find it difficult to execute these tasks. With the recent development of quantum computing, researchers and tech-giants strive for new quantum circuits for machine learning tasks, as present works on Quantum Machine Learning (QML) ensure less memory consumption and reduced model parameters. But it is strenuous to simulate classical deep learning models on existing quantum computing platforms due to the inflexibility of deep quantum circuits. As a consequence, it is essential to design viable quantum algorithms for QML for noisy intermediate-scale quantum (NISQ) devices. The proposed work aims to explore Variational Quantum Circuits (VQC) for Deep Reinforcement Learning by remodeling the experience replay and target network into a representation of VQC. In addition, to reduce the number of model parameters, quantum information encoding schemes are used to achieve better results than the classical neural networks. VQCs are employed to approximate the deep Q-value function for decision-making and policy-selection reinforcement learning with experience replay and the target network.

Keywords: quantum computing, quantum machine learning, variational quantum circuit, deep reinforcement learning, quantum information encoding scheme

Procedia PDF Downloads 132
2250 Pushing the Boundary of Parallel Tractability for Ontology Materialization via Boolean Circuits

Authors: Zhangquan Zhou, Guilin Qi

Abstract:

Materialization is an important reasoning service for applications built on the Web Ontology Language (OWL). To make materialization efficient in practice, current research focuses on deciding tractability of an ontology language and designing parallel reasoning algorithms. However, some well-known large-scale ontologies, such as YAGO, have been shown to have good performance for parallel reasoning, but they are expressed in ontology languages that are not parallelly tractable, i.e., the reasoning is inherently sequential in the worst case. This motivates us to study the problem of parallel tractability of ontology materialization from a theoretical perspective. That is we aim to identify the ontologies for which materialization is parallelly tractable, i.e., in the NC complexity. Since the NC complexity is defined based on Boolean circuit that is widely used to investigate parallel computing problems, we first transform the problem of materialization to evaluation of Boolean circuits, and then study the problem of parallel tractability based on circuits. In this work, we focus on datalog rewritable ontology languages. We use Boolean circuits to identify two classes of datalog rewritable ontologies (called parallelly tractable classes) such that materialization over them is parallelly tractable. We further investigate the parallel tractability of materialization of a datalog rewritable OWL fragment DHL (Description Horn Logic). Based on the above results, we analyze real-world datasets and show that many ontologies expressed in DHL belong to the parallelly tractable classes.

Keywords: ontology materialization, parallel reasoning, datalog, Boolean circuit

Procedia PDF Downloads 269
2249 Analysis of Lightweight Register Hardware Threat

Authors: Yang Luo, Beibei Wang

Abstract:

In this paper, we present a design methodology of lightweight register transfer level (RTL) hardware threat implemented based on a MAX II FPGA platform. The dynamic power consumed by the toggling of the various bit of registers as well as the dynamic power consumed per unit of logic circuits were analyzed. The hardware threat was designed taking advantage of the differences in dynamic power consumed per unit of logic circuits to hide the transfer information. The experiment result shows that the register hardware threat was successfully implemented by using different dynamic power consumed per unit of logic circuits to hide the key information of DES encryption module. It needs more than 100000 sample curves to reduce the background noise by comparing the sample space when it completely meets the time alignment requirement. In additional, an external trigger signal is playing a very important role to detect the hardware threat in this experiment.

Keywords: side-channel analysis, hardware Trojan, register transfer level, dynamic power

Procedia PDF Downloads 277
2248 High-Speed Electrical Drives and Applications: A Review

Authors: Vaishnavi Patil, K. M. Kurundkar

Abstract:

Electrical Drives play a vital role in industry development and applications. Drives have an inevitable part in the needs of various fields such as industry, commercial, and domestic applications. The development of material technology, Power Electronics devices, and accompanying applications led to the focus of industry and researchers on high-speed electrical drives. Numerous articles charted the applications of electrical machines and various converters for high-speed applications. The choice depends on the application under study. This paper goals to highlight high-speed applications, main challenges, and some applications of electrical drives in the field.

Keywords: high-speed, electrical machines, drives, applications

Procedia PDF Downloads 66
2247 Arc Flash Analysis: Technique to Mitigate Fire Incidents in Substations

Authors: M. H. Saeed, M. Rasool, M. A. Jawed

Abstract:

Arc Flash Analysis has been a subject of great interest since the electrical fire incidents have been reduced to a great extent after the implementation of arc flash study at different sites. An Arc flash in substations is caused by short circuits over the air or other melted conductors and small shrapnel. Arc flash incidents result in the majority of deaths in substations worldwide. Engro Fertilizers Limited (EFERT) site having a mix of vintage non-internal arc rated and modern arc rated switchgears, carried out an arc flash study of the whole site in accordance with NFPA70E standard. The results not only included optimizing site protection coordination settings but also included marking of Shock and Arc flash protection boundaries in all switchgear rooms. Work permit procedures upgradation is also done in accordance with this study to ensure proper arc rated PPEs and arc flash boundaries protocols are fully observed and followed. With the new safety, protocols working on electrical equipment will be much safer than ever before.

Keywords: Arc flash, non-internal arc rated, protection coordination, shock boundary

Procedia PDF Downloads 176
2246 Experimental Partial Discharge Localization for Internal Short Circuits of Transformers Windings

Authors: Jalal M. Abdallah

Abstract:

This paper presents experimental studies carried out on a three phase transformer to investigate and develop the transformer models, which help in testing procedures, describing and evaluating the transformer dielectric conditions process and methods such as: the partial discharge (PD) localization in windings. The measurements are based on the transfer function methods in transformer windings by frequency response analysis (FRA). Numbers of tests conditions were applied to obtain the sensitivity frequency responses of a transformer for different type of faults simulated in a particular phase. The frequency responses were analyzed for the sensitivity of different test conditions to detect and identify the starting of small faults, which are sources of PD. In more detail, the aim is to explain applicability and sensitivity of advanced PD measurements for small short circuits and its localization. The experimental results presented in the paper will help in understanding the sensitivity of FRA measurements in detecting various types of internal winding short circuits in the transformer.

Keywords: frequency response analysis (FRA), measurements, transfer function, transformer

Procedia PDF Downloads 279
2245 A Machine Learning Approach for Detecting and Locating Hardware Trojans

Authors: Kaiwen Zheng, Wanting Zhou, Nan Tang, Lei Li, Yuanhang He

Abstract:

The integrated circuit industry has become a cornerstone of the information society, finding widespread application in areas such as industry, communication, medicine, and aerospace. However, with the increasing complexity of integrated circuits, Hardware Trojans (HTs) implanted by attackers have become a significant threat to their security. In this paper, we proposed a hardware trojan detection method for large-scale circuits. As HTs introduce physical characteristic changes such as structure, area, and power consumption as additional redundant circuits, we proposed a machine-learning-based hardware trojan detection method based on the physical characteristics of gate-level netlists. This method transforms the hardware trojan detection problem into a machine-learning binary classification problem based on physical characteristics, greatly improving detection speed. To address the problem of imbalanced data, where the number of pure circuit samples is far less than that of HTs circuit samples, we used the SMOTETomek algorithm to expand the dataset and further improve the performance of the classifier. We used three machine learning algorithms, K-Nearest Neighbors, Random Forest, and Support Vector Machine, to train and validate benchmark circuits on Trust-Hub, and all achieved good results. In our case studies based on AES encryption circuits provided by trust-hub, the test results showed the effectiveness of the proposed method. To further validate the method’s effectiveness for detecting variant HTs, we designed variant HTs using open-source HTs. The proposed method can guarantee robust detection accuracy in the millisecond level detection time for IC, and FPGA design flows and has good detection performance for library variant HTs.

Keywords: hardware trojans, physical properties, machine learning, hardware security

Procedia PDF Downloads 144
2244 Time Parameter Based for the Detection of Catastrophic Faults in Analog Circuits

Authors: Arabi Abderrazak, Bourouba Nacerdine, Ayad Mouloud, Belaout Abdeslam

Abstract:

In this paper, a new test technique of analog circuits using time mode simulation is proposed for the single catastrophic faults detection in analog circuits. This test process is performed to overcome the problem of catastrophic faults being escaped in a DC mode test applied to the inverter amplifier in previous research works. The circuit under test is a second-order low pass filter constructed around this type of amplifier but performing a function that differs from that of the previous test. The test approach performed in this work is based on two key- elements where the first one concerns the unique square pulse signal selected as an input vector test signal to stimulate the fault effect at the circuit output response. The second element is the filter response conversion to a square pulses sequence obtained from an analog comparator. This signal conversion is achieved through a fixed reference threshold voltage of this comparison circuit. The measurement of the three first response signal pulses durations is regarded as fault effect detection parameter on one hand, and as a fault signature helping to hence fully establish an analog circuit fault diagnosis on another hand. The results obtained so far are very promising since the approach has lifted up the fault coverage ratio in both modes to over 90% and has revealed the harmful side of faults that has been masked in a DC mode test.

Keywords: analog circuits, analog faults diagnosis, catastrophic faults, fault detection

Procedia PDF Downloads 440
2243 Influence of Temperature on Properties of MOSFETs

Authors: Azizi Cherifa, O. Benzaoui

Abstract:

The thermal aspects in the design of power circuits often deserve as much attention as pure electric components aspects as the operating temperature has a direct influence on their static and dynamic characteristics. MOSFET is fundamental in the circuits, it is the most widely used device in the current production of semiconductor components using their honorable performance. The aim of this contribution is devoted to the effect of the temperature on the properties of MOSFETs. The study enables us to calculate the drain current as function of bias in both linear and saturated modes. The effect of temperature is evaluated using a numerical simulation, using the laws of mobility and saturation velocity of carriers as a function of temperature.

Keywords: temperature, MOSFET, mobility, transistor

Procedia PDF Downloads 344
2242 High Frequency Memristor-Based BFSK and 8QAM Demodulators

Authors: Nahla Elazab, Mohamed Aboudina, Ghada Ibrahim, Hossam Fahmy, Ahmed Khalil

Abstract:

This paper presents the developed memristor based demodulators for eight circular Quadrature Amplitude Modulation (QAM) and Binary Frequency Shift Keying (BFSK) operating at relatively high frequency. In our implementations, the experimental-based ‘nonlinear’ dopant drift model is adopted along with the proposed circuits providing incorporation of all known non-idealities of practically realized memristor and gaining high operation frequency. The suggested designs leverage the distinctive characteristics of the memristor device, definitely, its changeable average memristance versus the frequency, phase and amplitude of the periodic excitation input. The proposed demodulators feature small integration area, low power consumption, and easy implementation. Moreover, the proposed QAM demodulator precludes the requirement for the carrier recovery circuits. In doing so, the designs were validated by transient simulations using the nonlinear dopant drift memristor model. The simulations results show high agreement with the theory presented.

Keywords: BFSK, demodulator, high frequency memristor applications, memristor based analog circuits, nonlinear dopant drift model, QAM

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2241 Electrical Degradation of GaN-based p-channel HFETs Under Dynamic Electrical Stress

Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

Abstract:

The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

Procedia PDF Downloads 89
2240 Design and Simulation of Coupled-Line Coupler with Different Values of Coupling Efficiency

Authors: Suleiman Babani, Jazuli Sanusi Kazaure

Abstract:

In this paper, two coupled-line couplers are designed and simulated using stripline technology. The coupled-line couplers (A and B) are designed with different values of coupling coefficient 6dB and 10dB respectively. Both of circuits have a coupled output port, a through output port and an isolated output port. Moreover, both circuits are tuned to function around 2.45 GHz. The design results are presented by simulation results obtained using ADS 2012.08 (Advanced Design System) software.

Keywords: ADS, coupled-line coupler, directional coupler, stripline

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2239 Single Atom Manipulation with 4 Scanning Tunneling Microscope Technique

Authors: Jianshu Yang, Delphine Sordes, Marek Kolmer, Christian Joachim

Abstract:

Nanoelectronics, for example the calculating circuits integrating at molecule scale logic gates, atomic scale circuits, has been constructed and investigated recently. A major challenge is their functional properties characterization because of the connecting problem from atomic scale to micrometer scale. New experimental instruments and new processes have been proposed therefore. To satisfy a precisely measurement at atomic scale and then connecting micrometer scale electrical integration controller, the technique improvement is kept on going. Our new machine, a low temperature high vacuum four scanning tunneling microscope, as a customer required instrument constructed by Omicron GmbH, is expected to be scaling down to atomic scale characterization. Here, we will present our first testified results about the performance of this new instrument. The sample we selected is Au(111) surface. The measurements have been taken at 4.2 K. The atomic resolution surface structure was observed with each of four scanners with noise level better than 3 pm. With a tip-sample distance calibration by I-z spectra, the sample conductance has been derived from its atomic locally I-V spectra. Furthermore, the surface conductance measurement has been performed using two methods, (1) by landing two STM tips on the surface with sample floating; and (2) by sample floating and one of the landed tips turned to be grounding. In addition, single atom manipulation has been achieved with a modified tip design, which is comparable to a conventional LT-STM.

Keywords: low temperature ultra-high vacuum four scanning tunneling microscope, nanoelectronics, point contact, single atom manipulation, tunneling resistance

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2238 Prediction of Index-Mechanical Properties of Pyroclastic Rock Utilizing Electrical Resistivity Method

Authors: İsmail İnce

Abstract:

The aim of this study is to determine index and mechanical properties of pyroclastic rock in a practical way by means of electrical resistivity method. For this purpose, electrical resistivity, uniaxial compressive strength, point load strength, P-wave velocity, density and porosity values of 10 different pyroclastic rocks were measured in the laboratory. A simple regression analysis was made among the index-mechanical properties of the samples compatible with electrical resistivity values. A strong exponentially relation was found between index-mechanical properties and electrical resistivity values. The electrical resistivity method can be used to assess the engineering properties of the rock from which it is difficult to obtain regular shaped samples as a non-destructive method.

Keywords: electrical resistivity, index-mechanical properties, pyroclastic rocks, regression analysis

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2237 Optimizing Power in Sequential Circuits by Reducing Leakage Current Using Enhanced Multi Threshold CMOS

Authors: Patikineti Sreenivasulu, K. srinivasa Rao, A. Vinaya Babu

Abstract:

The demand for portability, performance and high functional integration density of digital devices leads to the scaling of complementary metal oxide semiconductor (CMOS) devices inevitable. The increase in power consumption, coupled with the increasing demand for portable/hand-held electronics, has made power consumption a dominant concern in the design of VLSI circuits today. MTCMOS technology provides low leakage and high performance operation by utilizing high speed, low Vt (LVT) transistors for logic cells and low leakage, high Vt (HVT) devices as sleep transistors. Sleep transistors disconnect logic cells from the supply and/or ground to reduce the leakage in the sleep mode. In this technology, energy consumption while doing the mode transition and minimum time required to turn ON the circuit upon receiving the wake up signal are issues to be considered because these can adversely impact the performance of VLSI circuit. In this paper we are introducing an enhancing method of MTCMOS technology to optimize the power in MTCMOS sequential circuits.

Keywords: power consumption, ultra-low power, leakage, sub threshold, MTCMOS

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2236 Effect of Al Contents on Magnetic Domains of {100} Grains in Electrical Steels

Authors: Hyunseo Choi, Jaewan Hong, Seil Lee, Yang Mo Koo

Abstract:

Non-oriented (NO) electrical steel is one of the most important soft magnetic materials for rotating machines. Si has usually been added to electrical steels to reduce eddy current loss by increasing the electrical resistivity. Si content more than 3.5 wt% causes cracks during cold rolling due to increase of brittleness. Al also increases the electrical resistivity of the materials as much as Si. In addition, cold workability of Fe-Al is better than Fe-Si, so that Al can be added up to 6.0 wt%. However, the effect of Al contents on magnetic properties of electrical steels has not been studied in detail. Magnetic domains of {100} grains in electrical steels, ranging from 1.85 to 6.54 wt% Al, were observed by magneto-optic Kerr microscopy. Furthermore, the correlation of magnetic domains with magnetic properties was investigated. As Al contents increased, the magnetic domain size of {100} grains decreased due to lowered domain wall energy. Reorganization of magnetic domain structure became more complex as domain size decreased. Therefore, the addition of Al to electrical steel caused hysteresis loss to increase. Anomalous loss decreased and saturated after 4.68% Al.

Keywords: electrical steel, magnetic domain structure, Al addition, core loss, rearrangement of domains

Procedia PDF Downloads 241
2235 Electrical Design Review Based on BIM-MEP Model

Authors: Michael Liu, Sen-Chou Tsai, Yu-Tang Huang, Tai-Chun Lin, Guan-Chyun Hsieh

Abstract:

This study proposes an electrical review method for mechanical, electrical, and plumbing (MEP) using building information modeling (BIM). The purpose is to reliably simplify the review work, directly evaluate the layout of electrical equipment and wiring, and calculate short-circuit current and line voltage drop based on BIM-MEP models. The study was done by MIEtech Company in collaboration with Taiwan Power Company (TPC), which is basically the unit responsible for reviewing the design of electrical appliances. This study aims to simplify the review process, reduce manual review errors, and improve the timeliness and reliability of reviews. In addition, the review system provides insight into the process and correctness of the precise integration of wiring, plumbing, and electrical equipment into the building structure, improving the safety and reliability of building electricity. In addition, it can also assist electrical engineers to use BIM to enhance the accuracy and self-detection capabilities of circuit design and improve the timeliness of the design process.

Keywords: mechanical, electrical and plumbing, building information modeling, electrical review method

Procedia PDF Downloads 7
2234 Feasibility Study of Wireless Communication for the Control and Monitoring of Rotating Electrical Machine

Authors: S. Ben Brahim, T. H. Vuong, J. David, R. Bouallegue, M. Pietrzak-David

Abstract:

Electrical machine monitoring is important to protect motor from unexpected problems. Today, using wireless communication for electrical machines is interesting for both real time monitoring and diagnostic purposes. In this paper, we propose a system based on wireless communication IEEE 802.11 to control electrical machine. IEEE 802.11 standard is recommended for this type of applications because it provides a faster connection, better range from the base station, and better security. Therefore, our contribution is to study a new technique to control and monitor the rotating electrical machines (motors, generators) using wireless communication. The reliability of radio channel inside rotating electrical machine is also discussed. Then, the communication protocol, software and hardware design used for the proposed system are presented in detail and the experimental results of our system are illustrated.

Keywords: control, DFIM machine, electromagnetic field, EMC, IEEE 802.11, monitoring, rotating electrical machines, wireless communication

Procedia PDF Downloads 693
2233 Advancements in Smart Home Systems: A Comprehensive Exploration in Electronic Engineering

Authors: Chukwuka E. V., Rowling J. K., Rushdie Salman

Abstract:

The field of electronic engineering encompasses the study and application of electrical systems, circuits, and devices. Engineers in this discipline design, analyze and optimize electronic components to develop innovative solutions for various industries. This abstract provides a brief overview of the diverse areas within electronic engineering, including analog and digital electronics, signal processing, communication systems, and embedded systems. It highlights the importance of staying abreast of advancements in technology and fostering interdisciplinary collaboration to address contemporary challenges in this rapidly evolving field.

Keywords: smart home engineering, energy efficiency, user-centric design, security frameworks

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2232 A Development of Portable Intrinsically Safe Explosion-Proof Type of Dual Gas Detector

Authors: Sangguk Ahn, Youngyu Kim, Jaheon Gu, Gyoutae Park

Abstract:

In this paper, we developed a dual gas leak instrument to detect Hydrocarbon (HC) and Monoxide (CO) gases. To two kinds of gases, it is necessary to design compact structure for sensors. And then it is important to draw sensing circuits such as measuring, amplifying and filtering. After that, it should be well programmed with robust, systematic and module coding methods. In center of them, improvement of accuracy and initial response time are a matter of vital importance. To manufacture distinguished gas leak detector, we applied intrinsically safe explosion-proof structure to lithium ion battery, main circuits, a pump with motor, color LCD interfaces and sensing circuits. On software, to enhance measuring accuracy we used numerical analysis such as Lagrange and Neville interpolation. Performance test result is conducted by using standard Methane with seven different concentrations with three other products. We want raise risk prevention and efficiency of gas safe management through distributing to the field of gas safety. Acknowledgment: This study was supported by Small and Medium Business Administration under the research theme of ‘Commercialized Development of a portable intrinsically safe explosion-proof type dual gas leak detector’, (task number S2456036).

Keywords: gas leak, dual gas detector, intrinsically safe, explosion proof

Procedia PDF Downloads 227
2231 Design and Study of a Low Power High Speed Full Adder Using GDI Multiplexer

Authors: Biswarup Mukherjee, Aniruddha Ghosal

Abstract:

In this paper, we propose a new technique for implementing a low power full adder using a set of GDI multiplexers. Full adder circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). Thus it is desirable to have low power operation for the sub components. The explored method of implementation achieves a low power design for the full adder. Simulated results using state-of-art Tanner tool indicates the superior performance of the proposed technique over conventional CMOS full adder. Detailed comparison of simulated results for the conventional and present method of implementation is presented.

Keywords: low power full adder, 2-T GDI MUX, ASIC (application specific integrated circuit), 12-T FA, CMOS (complementary metal oxide semiconductor)

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2230 Design Dual Band Band-Pass Filter by Using Stepped Impedance

Authors: Fawzia Al-Sakeer, Hassan Aldeeb

Abstract:

Development in the communications field is proceeding at an amazing speed, which has led researchers to improve and develop electronic circuits by increasing their efficiency and reducing their size to reduce the weight of electronic devices. One of the most important of these circuits is the band-pass filter, which is what made us carry out this research, which aims to use an alternate technology to design a dual band-pass filter by using a stepped impedance microstrip transmission line. We designed a filter that works at two center frequency bands by designing with the ADS program, and the results were excellent, as we obtained the two design frequencies, which are 1 and 3GHz, and the values of insertion loss S11, which was more than 21dB with a small area.

Keywords: band pass filter, dual band band-pass filter, ADS, microstrip filter, stepped impedance

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2229 Multiple Fault Diagnosis in Digital Circuits using Critical Path Tracing and Enhanced Deduction Algorithm

Authors: Mohamed Mahmoud

Abstract:

This paper has developed an effect-cause analysis technique for fault diagnosis in digital circuits. The main algorithm of our technique is based on the Enhanced Deduction Algorithm, which processes the real response of the CUT to the applied test T to deduce the values of the internal lines. An experimental version of the algorithm has been implemented in C++. The code takes about 7592 lines. The internal values are determined based on the logic values under the permanent stuck-fault model. Using a backtracking strategy guarantees that the actual values are covered by at least one solution, or no solution is found.

Keywords: enhanced deduction algorithm, backtracking strategy, automatic test equipment, verfication

Procedia PDF Downloads 118
2228 Application of Electrochemical Impedance Spectroscopy to Monitor the Steel/Soil Interface During Cathodic Protection of Steel in Simulated Soil Solution

Authors: Mandlenkosi George Robert Mahlobo, Tumelo Seadira, Major Melusi Mabuza, Peter Apata Olubambi

Abstract:

Cathodic protection (CP) has been widely considered a suitable technique for mitigating corrosion of buried metal structures. Plenty of efforts have been made in developing techniques, in particular non-destructive techniques, for monitoring and quantifying the effectiveness of CP to ensure the sustainability and performance of buried steel structures. The aim of this study was to investigate the evolution of the electrochemical processes at the steel/soil interface during the application of CP on steel in simulated soil. Carbon steel was subjected to electrochemical tests with NS4 solution used as simulated soil conditions for 4 days before applying CP for a further 11 days. A previously modified non-destructive voltammetry technique was applied before and after the application of CP to measure the corrosion rate. Electrochemical impedance spectroscopy (EIS), in combination with mathematical modeling through equivalent electric circuits, was applied to determine the electrochemical behavior at the steel/soil interface. The measured corrosion rate was found to have decreased from 410 µm/yr to 8 µm/yr between days 5 and 14 because of the applied CP. Equivalent electrical circuits were successfully constructed and used to adequately model the EIS results. The modeling of the obtained EIS results revealed the formation of corrosion products via a mixed activation-diffusion mechanism during the first 4 days, while the activation mechanism prevailed in the presence of CP, resulting in a protective film. The x-ray diffraction analysis confirmed the presence of corrosion products and the predominant protective film corresponding to the calcareous deposit.

Keywords: carbon steel, cathodic protection, NS4 solution, voltammetry, EIS

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2227 The Analysis of Own Signals of PM Electrical Machines – Example of Eccentricity

Authors: Marcin Baranski

Abstract:

This article presents a vibration diagnostic method designed for permanent magnets (PM) traction motors. Those machines are commonly used in traction drives of electrical vehicles. Specific structural properties of machines excited by permanent magnets are used in this method - electromotive force (EMF) generated due to vibrations. This work presents: field-circuit model, results of static tests, results of calculations and simulations.

Keywords: electrical vehicle, permanent magnet, traction drive, vibrations, electrical machine, eccentricity

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2226 Effect of Hot Rolling Conditions on Magnetic Properties of Fe-3%Si Non-Grain Oriented Electrical Steels

Authors: Emre Alan, Yusuf Yamanturk, Gokay Bas

Abstract:

Non-grain oriented electrical steels are high silicon containing steels in which the direction of magnetism is intended the same in any direction of the material. Major applications of non-grain-oriented electrical steels are electrical motors, generators, etc. where low magnetic losses are required. Selection of proper hot rolling process parameters is an important factor in order to produce a material that has desired magnetic properties. In this study, the effect of finishing and coiling temperatures on magnetic properties of Fe-3%Si non-grain oriented electrical steels will be investigated. Additionally, the effect of slab reheating temperature at same entry finishing temperature will be investigated by means of reduction in roughing mill pass number from 1-5 to 1-3.

Keywords: electrical steels, hot rolling, magnetic properties, roughing mill

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2225 Low Power Glitch Free Dual Output Coarse Digitally Controlled Delay Lines

Authors: K. Shaji Mon, P. R. John Sreenidhi

Abstract:

In deep-submicrometer CMOS processes, time-domain resolution of a digital signal is becoming higher than voltage resolution of analog signals. This claim is nowadays pushing toward a new circuit design paradigm in which the traditional analog signal processing is expected to be progressively substituted by the processing of times in the digital domain. Within this novel paradigm, digitally controlled delay lines (DCDL) should play the role of digital-to-analog converters in traditional, analog-intensive, circuits. Digital delay locked loops are highly prevalent in integrated systems.The proposed paper addresses the glitches present in delay circuits along with area,power dissipation and signal integrity.The digitally controlled delay lines(DCDL) under study have been designed in a 90 nm CMOS technology 6 layer metal Copper Strained SiGe Low K Dielectric. Simulation and synthesis results show that the novel circuits exhibit no glitches for dual output coarse DCDL with less power dissipation and consumes less area compared to the glitch free NAND based DCDL.

Keywords: glitch free, NAND-based DCDL, CMOS, deep-submicrometer

Procedia PDF Downloads 244
2224 A Study of Environmental Test Sequences for Electrical Units

Authors: Jung Ho Yang, Yong Soo Kim

Abstract:

Electrical units are operated by electrical and electronic components. An environmental test sequence is useful for testing electrical units to reduce reliability issues. This study introduces test sequence guidelines based on relevant principles and considerations for electronic testing according to international standard IEC-60068-1 and the United States military standard MIL-STD-810G. Then, test sequences were proposed based on the descriptions for each test. Finally, General Motors (GM) specification GMW3172 was interpreted and compared to IEC-60068-1 and MIL-STD-810G.

Keywords: reliability, environmental test sequence, electrical units, IEC 60068-1, MIL-STD-810G

Procedia PDF Downloads 503
2223 Synchrony between Genetic Repressilators in Sister Cells in Different Temperatures

Authors: Jerome G. Chandraseelan, Samuel M. D. Oliveira, Antti Häkkinen, Sofia Startceva, Andre S. Ribeiro

Abstract:

We used live E. coli containing synthetic genetic oscillators to study how the degree of synchrony between the genetic circuits of sister cells changes with temperature. We found that both the mean and the variability of the degree of synchrony between the fluorescence signals from sister cells are affected by temperature. Also, while most pairs of sister cells were found to be highly synchronous in each condition, the number of asynchronous pairs increased with increasing temperature, which was found to be due to disruptions in the oscillations. Finally we provide evidence that these disruptions tend to affect multiple generations as opposed to individual cells. These findings provide insight in how to design more robust synthetic circuits and in how cell division can affect their dynamics.

Keywords: repressilator, robustness, synchrony, synthetic biology

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2222 Robotics and Embedded Systems Applied to the Buried Pipeline Inspection

Authors: Robson C. Santos, Julio C. P. Ribeiro, Iorran M. de Castro, Luan C. F. Rodrigues, Sandro R. L. Silva, Diego M. Quesada

Abstract:

The work aims to develop a robot in the form of autonomous vehicle to detect, inspection and mapping of underground pipelines through the ATmega328 Arduino platform. Hardware prototyping very similar to C / C ++ language that facilitates its use in robotics open source, resembles PLC used in large industrial processes. The robot will traverse the surface independently of direct human action, in order to automate the process of detecting buried pipes, guided by electromagnetic induction. The induction comes from coils that sends the signal to the Arduino microcontroller contained in that will make the difference in intensity and the treatment of the information, then this determines actions to electrical components such as relays and motors, allowing the prototype to move on the surface and getting the necessary information. The robot was developed by electrical and electronic assemblies that allowed test your application. The assembly is made up of metal detector coils, circuit boards and microprocessor, which interconnected circuits previously developed can determine, process control and mechanical actions for a robot (autonomous car) that will make the detection and mapping of buried pipelines plates.

Keywords: robotic, metal detector, embedded system, pipeline inspection

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