Search results for: Process and virtual memory.

Authors: Sofien Chtourou, Mohamed Chtourou, Omar Hammami

Abstract:

Embedded systems need to respect stringent real time constraints. Various hardware components included in such systems such as cache memories exhibit variability and therefore affect execution time. Indeed, a cache memory access from an embedded microprocessor might result in a cache hit where the data is available or a cache miss and the data need to be fetched with an additional delay from an external memory. It is therefore highly desirable to predict future memory accesses during execution in order to appropriately prefetch data without incurring delays. In this paper, we evaluate the potential of several artificial neural networks for the prediction of instruction memory addresses. Neural network have the potential to tackle the nonlinear behavior observed in memory accesses during program execution and their demonstrated numerous hardware implementation emphasize this choice over traditional forecasting techniques for their inclusion in embedded systems. However, embedded applications execute millions of instructions and therefore millions of addresses to be predicted. This very challenging problem of neural network based prediction of large time series is approached in this paper by evaluating various neural network architectures based on the recurrent neural network paradigm with pre-processing based on the Self Organizing Map (SOM) classification technique.

Keywords: Address, data set, memory, prediction, recurrentneural network.

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Authors: Eleni Ioanna Levantinou

Abstract:

Gestures play a major role in comprehension and memory recall due to the fact that aid the efficient channel of the meaning and support listeners’ comprehension and memory. In the present study, the assistance of two kinds of gestures (iconic and beat gestures) is tested in regards to memory and recall. The hypothesis investigated here is whether or not iconic and beat gestures provide assistance in memory and recall in Greek and in Greek speakers’ second language. Two groups of participants were formed, one comprising Greeks that reside in Athens and one with Greeks that reside in Copenhagen. Three kinds of stimuli were used: A video with words accompanied with iconic gestures, a video with words accompanied with beat gestures and a video with words alone. The languages used are Greek and English. The words in the English videos were spoken by a native English speaker and by a Greek speaker talking English. The reason for this is that when it comes to beat gestures that serve a meta-cognitive function and are generated according to the intonation of a language, prosody plays a major role. Thus, participants that have different influences in prosody may generate different results from rhythmic gestures. Memory recall was assessed by asking the participants to try to remember as many words as they could after viewing each video. Results show that iconic gestures provide significant assistance in memory and recall in Greek and in English whether they are produced by a native or a second language speaker. In the case of beat gestures though, the findings indicate that beat gestures may not play such a significant role in Greek language. As far as intonation is concerned, a significant difference was not found in the case of beat gestures produced by a native English speaker and by a Greek speaker talking English.

Keywords: First language, gestures, memory, second language acquisition.

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Authors: Dalvinder Singh Dhaliwal, Parvinder S. Sandhu, S. N. Panda

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This paper is on the general discussion of memory consistency model like Strict Consistency, Sequential Consistency, Processor Consistency, Weak Consistency etc. Then the techniques for implementing distributed shared memory Systems and Synchronization Primitives in Software Distributed Shared Memory Systems are discussed. The analysis involves the performance measurement of the protocol concerned that is Multiple Writer Protocol. Each protocol has pros and cons. So, the problems that are associated with each protocol is discussed and other related things are explored.

Keywords: Distributed System, Single owner protocol, Multiple owner protocol

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Authors: L. K. Singh, Riktesh Srivastava

Abstract:

How to effectively allocate system resource to process the Client request by Gateway servers is a challenging problem. In this paper, we propose an improved scheme for autonomous performance of Gateway servers under highly dynamic traffic loads. We devise a methodology to calculate Queue Length and Waiting Time utilizing Gateway Server information to reduce response time variance in presence of bursty traffic. The most widespread contemplation is performance, because Gateway Servers must offer cost-effective and high-availability services in the elongated period, thus they have to be scaled to meet the expected load. Performance measurements can be the base for performance modeling and prediction. With the help of performance models, the performance metrics (like buffer estimation, waiting time) can be determined at the development process. This paper describes the possible queue models those can be applied in the estimation of queue length to estimate the final value of the memory size. Both simulation and experimental studies using synthesized workloads and analysis of real-world Gateway Servers demonstrate the effectiveness of the proposed system.

Keywords: M/M/1, M/G/1, G/M/1, G/G/1, Gateway Servers, Buffer Estimation, Waiting Time, Queuing Process.

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Authors: Nicoletta Adamo-Villani

Abstract:

The object of this research is the design and evaluation of an immersive Virtual Learning Environment (VLE) for deaf children. Recently we have developed a prototype immersive VR game to teach sign language mathematics to deaf students age K- 4 [1] [2]. In this paper we describe a significant extension of the prototype application. The extension includes: (1) user-centered design and implementation of two additional interactive environments (a clock store and a bakery), and (2) user-centered evaluation including development of user tasks, expert panel-based evaluation, and formative evaluation. This paper is one of the few to focus on the importance of user-centered, iterative design in VR application development, and to describe a structured evaluation method.

Keywords: 3D Animation, Virtual Reality, Virtual Learning Environments, User-Centered Design, User-centered Evaluation.

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Authors: Daniel Amariei, Calin O. Miclosina, Ion Vela, Marius Tufoi, Cornel Mituletu

Abstract:

Even it has been recognized that Shape Memory Alloys (SMA) have a significant potential for deployment actuators, the number of applications of SMA-based actuators to the present day is still quite small, due to the need of deep understanding of the thermo-mechanical behavior of SMA, causing an important need for a mathematical model able to describe all thermo-mechanical properties of SMA by relatively simple final set of constitutive equations. SMAs offer attractive potentials such as: reversible strains of several percent, generation of high recovery stresses and high power / weight ratios. The paper tries to provide an overview of the shape memory functions and a presentation of the designed and developed temperature control system used for a gripper actuated by two pairs of differential SMA active springs. An experimental setup was established, using electrical energy for actuator-s springs heating process. As for holding the temperature of the SMA springs at certain level for a long time was developed a control system in order to avoid the active elements overheating.

Keywords: active element, actuator, model, Nitinol, prehension

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Authors: Olaf Hallan Graven, Dag Andreas Hals Samuelsen

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An implementation of a design for a game based virtual learning environment is described. The game is developed for a course in analogue electronics, and the topic is the design of a power supply. This task can be solved in a number of different ways, with certain constraints, giving the students a certain amount of freedom, although the game is designed not to facilitate trial-and error approach. The use of storytelling and a virtual gaming environment provides the student with the learning material in a MMORPG environment. The game is tested on a group of second year electrical engineering students with good results.

Keywords: analogue electronics, e-learning, computer games for learning, virtual reality

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Authors: G. Kishor Babu, B. Madhu Kiran

Abstract:

This paper presented an intend scheme of Modular-Multilevel-Converter (MMC) levels for move towering the practical conciliation flanked by the precision and divisional competence. The whole process is standard by a Thevenin-equivalent 133-level MMC model. Firstly the computation scheme of the fundamental limit imitation time step is offered to faithfully represent each voltage level of waveforms. Secondly the earlier industrial Improved Analytic Hierarchy Process (IAHP) is adopted to integrate the relative errors of all the input electrical factors interested in one complete virtual fault on each converter level. Thirdly the stable AC and DC ephemeral condition in virtual faults effects of all the forms stabilize and curve integral stand on the standard form. Finally the optimal MMC level will be obtained by the drown curves and it will give individual weights allowing for the precision and efficiency. And the competence and potency of the scheme are validated by model on MATLAB Simulink.

Keywords: Modular multilevel converter, improved analytic hierarchy process, ac and dc transient, high voltage direct current, voltage sourced converter.

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Authors: Bhavana Prakash Shrivastava, Kavita Khare

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This paper presents a synthesis and simulation of proposed enhanced buffer. The design provides advantages of both buffer and bufferless network for that two cross bar switches are used. The concept of virtual channel (VC) is eliminated from the previous design by using an efficient flow-control scheme that uses the storage already present in pipelined channels in place of explicit input VCBs. This can be addressed by providing enhanced buffers on the bufferless link and creating two virtual networks. With this approach, VCBs act as distributed FIFO buffers. Without VCBs or VCs, deadlock prevention is achieved by duplicating physical channels. An enhanced buffer provides a function of hand shaking by providing a ready valid handshake signal and two bit storage. Through this design the power is reduced to 15.65% and delay is reduced to 97.88% with respect to virtual channel router.

Keywords: Enhanced buffer, Gate delay, NOC, VCs, VCB.

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Authors: Mohamed Mediouni

Abstract:

Evaluating the performance of a simulator in the CAVE has to be confirmed by encouraging people to live the experience of virtual reality. In this paper, a detailed procedure of recording video is presented. Limitations of the experimental device are firstly exposed. Then, solutions for improving this idea are finally described.

Keywords: Virtual reality, CAVE, stereoscopic, camera.

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Authors: Steve Hung-Lung Tu, Chu-Tse Lee

Abstract:

A new power regulator controller with multiple-access PID compensator is proposed, which can achieve a minimum memory requirement for fully table look-up. The proposed regulator controller employs hysteresis comparators, an error process unit (EPU) for voltage regulation, a multiple-access PID compensator and a lowpower- consumption digital PWM (DPWM). Based on the multipleaccess mechanism, the proposed controller can alleviate the penalty of large amount of memory employed for fully table look-up based PID compensator in the applications of power regulation. The proposed controller has been validated with simulation results.

Keywords: Multiple access, PID compensator, PWM, Buck conversion.

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Authors: Samuel Kaspi, Sitalakshmi Venkatraman

Abstract:

In-memory database systems are becoming popular due to the availability and affordability of sufficiently large RAM and processors in modern high-end servers with the capacity to manage large in-memory database transactions. While fast and reliable inmemory systems are still being developed to overcome cache misses, CPU/IO bottlenecks and distributed transaction costs, disk-based data stores still serve as the primary persistence. In addition, with the recent growth in multi-tenancy cloud applications and associated security concerns, many organisations consider the trade-offs and continue to require fast and reliable transaction processing of diskbased database systems as an available choice. For these organizations, the only way of increasing throughput is by improving the performance of disk-based concurrency control. This warrants a hybrid database system with the ability to selectively apply an enhanced disk-based data management within the context of inmemory systems that would help improve overall throughput. The general view is that in-memory systems substantially outperform disk-based systems. We question this assumption and examine how a modified variation of access invariance that we call enhanced memory access, (EMA) can be used to allow very high levels of concurrency in the pre-fetching of data in disk-based systems. We demonstrate how this prefetching in disk-based systems can yield close to in-memory performance, which paves the way for improved hybrid database systems. This paper proposes a novel EMA technique and presents a comparative study between disk-based EMA systems and in-memory systems running on hardware configurations of equivalent power in terms of the number of processors and their speeds. The results of the experiments conducted clearly substantiate that when used in conjunction with all concurrency control mechanisms, EMA can increase the throughput of disk-based systems to levels quite close to those achieved by in-memory system. The promising results of this work show that enhanced disk-based systems facilitate in improving hybrid data management within the broader context of in-memory systems.

Keywords: Concurrency control, disk-based databases, inmemory systems, enhanced memory access (EMA).

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Authors: Philippe Fauquet-Alekhine

Abstract:

For professions of high risk industries, simulation training has always been thought in terms of high degree of fidelity regarding the real operational situation. Due to the recent progress, this way of training is changing, modifying the human-computer and software interactions: the interactions between trainees during simulation training session tend to become virtual, transforming the social-based embodiness (the way subjects integrate social skills for interpersonal relationship with co-workers). On the basis of the analysis of eight different profession trainings, a categorization of interactions has help to produce an analytical tool, the social interactions table. This tool may be very valuable to point out the changes of social interactions when the training sessions are skipping from a high fidelity simulator to a virtual simulator. In this case, it helps the designers of professional training to analyze and to assess the consequences of the potential lack the social-based embodiness.

Keywords: Interface, interaction, simulator, virtual training.

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Authors: Zach-Amaury Boufoy-Bastick, Lenandlar Singh

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Computer-mediated communication technologies which provide for virtual communities have typically evolved in a cross-dichotomous manner, such that technical constructs of the technology have evolved independently from the social environment of the community. The present paper analyses some limitations of current implementations of computer-mediated communication technology that are implied by such a dichotomy, and discusses their inhibiting effects on possible developments of virtual communities. A Socio-Technical Indicator Model is introduced that utilizes integrated feedback to describe, simulate and operationalise increasing representativeness within a variety of structurally and parametrically diverse systems. In illustration, applications of the model are briefly described for financial markets and for eco-systems. A detailed application is then provided to resolve the aforementioned technical limitations of moderation on the evolution of virtual communities. The application parameterises virtual communities to function as self-transforming social-technical systems which are sensitive to emergent and shifting community values as products of on-going communications within the collective.

Keywords: Virtual community, e-democracy, feedback systems, moderation.

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Authors: Bala Dhandayuthapani Veerasamy

Abstract:

Parallel programming models exist as an abstraction of hardware and memory architectures. There are several parallel programming models in commonly use; they are shared memory model, thread model, message passing model, data parallel model, hybrid model, Flynn-s models, embarrassingly parallel computations model, pipelined computations model. These models are not specific to a particular type of machine or memory architecture. This paper expresses the model program for concurrent approach to data parallel model through java programming.

Keywords: Concurrent, Data Parallel, JDK, Parallel, Thread

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Authors: Ching-Sheng Wang, Yu-Hung Su, Ching-Yang Hong

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This paper takes the actual scene of Aletheia University campus – the Class 2 national monument, the first educational institute in northern Taiwan as an example, to present a 3D virtual navigation system which supports user positioning and pre-download mechanism. The proposed system was designed based on the principle of Voronoi Diagra) to divide the virtual scenes and its multimedia information, which combining outdoor GPS positioning and the indoor RFID location detecting function. When users carry mobile equipments such as notebook computer, UMPC, EeePC...etc., walking around the actual scenes of indoor and outdoor areas of campus, this system can automatically detect the moving path of users and pre-download the needed data so that users will have a smooth and seamless navigation without waiting.

Keywords: GPS, Positioning, RFID, Virtual Navigation, Voronoi Diagram.

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Authors: T. Ahmed, Z. Butt, M. Ali, S. Attiq, M. Ali

Abstract:

A series of Ti based shape memory alloys with composition of Ti50Ni49Cr1, Ti50Ni47Cr3 and Ti50Ni45Cr5 were developed by vacuum arc-melting under a purified argon atmosphere. The histometric and corrosion evaluation of Ti-Ni-Cr shape memory alloys have been considered in this research work. The alloys were developed by vacuum arc melting and implanted subcutaneously in rabbits for 4, 8 and 12 weeks. Metallic implants were embedded in order to determine the outcome of implantation on histometric and corrosion evaluation of Ti-Ni-Cr metallic strips. Encapsulating membrane formation around the alloys was minimal in the case of all materials. After histomorphometric analyses it was possible to demonstrate that there were no statistically significant differences between the materials. Corrosion rate was also determined in this study which is within acceptable range. The results showed the Ti- Ni-Cr alloy was neither cytotoxic, nor have any systemic reaction on living system in any of the test performed. Implantation shows good compatibility and a potential of being used directly in vivo system.

Keywords: Shape memory alloy, Ti-Ni-Fe, histomorphometric, corrosion.

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Authors: A. Bocevska, G. Todorov, T. Neshkov

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New developed approach for Functional Cost Analysis (FCA) based on virtual prototyping (VP) models in CAD/CAE environment, applicable and necessary in developing new products is presented. It is instrument for improving the value of the product while maintaining costs and/or reducing the costs of the product without reducing value. Five broad classes of VP methods are identified. Efficient use of prototypes in FCA is a vital activity that can make the difference between successful and unsuccessful entry of new products into the competitive word market. Successful realization of this approach is illustrated for a specific example using press joint power tool.

Keywords: CAD/CAE environment, Functional Cost Analysis (FCA), Virtual prototyping (VP) models.

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Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

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Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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Authors: Konstantinos E. Evangelidis, Evangelos Kehris, Theodore H. Kaskalis

Abstract:

We propose that Virtual Learning Environments (VLEs) should be designed by taking into account the characteristics, the special needs and the specific operating rules of the academic institutions in which they are employed. In this context, we describe a VLE module that extends the support of the organization and delivery of course material by including administration activities related to the various stages of teaching. These include the co-ordination, collaboration and monitoring of the course material development process and institution-specific course material delivery modes. Our specialized module, which enhances VLE capabilities by Helping Educators and Learners through a Laboratory Assistance System, is willing to assist the Greek tertiary technological sector, which includes Technological Educational Institutes (T.E.I.).

Keywords: Virtual learning environments, Teachingcoordination, Laboratorial education, Technological institutes.

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Authors: Yu Ren Lin, Yi Feng Su

Abstract:

Using vision based solution in intelligent vehicle application often needs large memory to handle video stream and image process which increase complexity of hardware and software. In this paper, we present a FPGA implement of a vision based lane departure warning system. By taking frame of videos, the line gradient of line is estimated and the lane marks are found. By analysis the position of lane mark, departure of vehicle will be detected in time. This idea has been implemented in Xilinx Spartan6 FPGA. The lane departure warning system used 39% logic resources and no memory of the device. The average availability is 92.5%. The frame rate is more than 30 frames per second (fps).

Keywords: Lane departure warning system, image, FPGA.

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Authors: W. Srisang, K. Jaroensutasinee, M. Jaroensutasinee

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This study examined a habitat-suitability assessment method namely the Ecological Niche Factor Analysis (ENFA). A virtual species was created and then dispatched in a geographic information system model of a real landscape in three historic scenarios: (1) spreading, (2) equilibrium, and (3) overabundance. In each scenario, the virtual species was sampled and these simulated data sets were used as inputs for the ENFA to reconstruct the habitat suitability model. The 'equilibrium' scenario gives the highest quantity and quality among three scenarios. ENFA was sensitive to the distribution scenarios but not sensitive to sample sizes. The use of a virtual species proved to be a very efficient method, allowing one to fully control the quality of the input data as well as to accurately evaluate the predictive power of the analyses.

Keywords: Habitat-Suitability Models, Ecological niche factoranalysis, Climatic factors, Geographic information system.

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Authors: Carmen Maria Moraru, Iuliana Stefan, Ovidiu Balteanu, Ciprian Bucur, Liviu Stefan, Anisia Bornea, Ioan Stefanescu

Abstract:

The implementation of the new software and hardware-s technologies for tritium processing nuclear plants, and especially those with an experimental character or of new technology developments shows a coefficient of complexity due to issues raised by the implementation of the performing instrumentation and equipment into a unitary monitoring system of the nuclear technological process of tritium removal. Keeping the system-s flexibility is a demand of the nuclear experimental plants for which the change of configuration, process and parameters is something usual. The big amount of data that needs to be processed stored and accessed for real time simulation and optimization demands the achievement of the virtual technologic platform where the data acquiring, control and analysis systems of the technological process can be integrated with a developed technological monitoring system. Thus, integrated computing and monitoring systems needed for the supervising of the technological process will be executed, to be continued with the execution of optimization system, by choosing new and performed methods corresponding to the technological processes within the tritium removal processing nuclear plants. The developing software applications is executed with the support of the program packages dedicated to industrial processes and they will include acquisition and monitoring sub-modules, named “virtually" as well as the storage sub-module of the process data later required for the software of optimization and simulation of the technological process for tritium removal. The system plays and important role in the environment protection and durable development through new technologies, that is – the reduction of and fight against industrial accidents in the case of tritium processing nuclear plants. Research for monitoring optimisation of nuclear processes is also a major driving force for economic and social development.

Keywords: Monitoring system, process simulation.

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Authors: Jafreezal Jaafar, Hasiah Mohamed, Hazida Razali

Abstract:

This paper focuses on the 3D reconstruction of the architectural design of Darul Ridzuan Museum. It has concentrated on designing exterior part of the building according to colored digital photo of the real museum. Besides viewing the architecture, walkthroughs are generated for the user to control it in an easier way. User can travel through the museum to get the feel of the environment and to explore the design of the museum as a whole; both exterior and interior. The result has shown positive result in terms of realism, navigation, collision detection, suitability, usability and user-s acceptance. In brief, the 3D virtual museum has provided an alternative to present a real museum.

Keywords: Virtual Heritage, 3D Modelling, Virtual Museum, Usability Evaluation

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Authors: Maha Idrissi Aouad, Rene Schott, Olivier Zendra

Abstract:

Reducing energy consumption of embedded systems requires careful memory management. It has been shown that Scratch- Pad Memories (SPMs) are low size, low cost, efficient (i.e. energy saving) data structures directly managed at the software level. In this paper, the focus is on heuristic methods for SPMs management. A method is efficient if the number of accesses to SPM is as large as possible and if all available space (i.e. bits) is used. A Tabu Search (TS) approach for memory management is proposed which is, to the best of our knowledge, a new original alternative to the best known existing heuristic (BEH). In fact, experimentations performed on benchmarks show that the Tabu Search method is as efficient as BEH (in terms of energy consumption) but BEH requires a sorting which can be computationally expensive for a large amount of data. TS is easy to implement and since no sorting is necessary, unlike BEH, the corresponding sorting time is saved. In addition to that, in a dynamic perspective where the maximum capacity of the SPM is not known in advance, the TS heuristic will perform better than BEH.

Keywords: Energy consumption, memory allocation management, optimization, tabu search heuristic.

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Authors: Chih-Wei Hsieh, Chau-Yi Chou, Sheng-HsiuKuo, Tsung-Che Tsai, I-Chen Wu

Abstract:

This paper presents the benchmarking results and performance evaluation of differentclustersbuilt atthe National Center for High-Performance Computingin Taiwan. Performance of processor, memory subsystem andinterconnect is a critical factor in the overall performance of high performance computing platforms. The evaluation compares different system architecture and software platforms. Most supercomputer used HPL to benchmark their system performance, in accordance with the requirement of the TOP500 List. In this paper we consider system memory access factors that affect benchmark performance, such as processor and memory performance.We hope these works will provide useful information for future development and construct cluster system.

Keywords: Performance Evaluation, Benchmarking and High-Performance Computing

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Authors: Rana M. Zeina, Laila AL-Ayadhi, Shahid Bashir

Abstract:

The association between sensory problems and cognitive abilities has been studied in individuals with Autism Spectrum Disorders (ASDs). In this study, we used a Neuropsychological Test to evaluate memory and attention in ASDs children with sensory problems compared to the ASDs children without sensory problems. Four visual memory tests of Cambridge Neuropsychological Test Automated Battery (CANTAB) including Big/little circle (BLC), Simple Reaction Time (SRT) Intra /Extra dimensional set shift (IED), Spatial recognition memory (SRM), were administered to 14 ASDs children with sensory problems compared to 13 ASDs without sensory problems aged 3 to 12 with IQ of above 70. ASDs individuals with sensory problems performed worse than the ASDs group without sensory problems on comprehension, learning, reversal and simple reaction time tasks, and no significant difference between the two groups was recorded in terms of the visual memory and visual comprehension tasks. The findings of this study suggest that ASDs children with sensory problems are facing deficits in learning, comprehension, reversal, and speed of response to a stimulus.

Keywords: Visual memory, Attention, Autism Spectrum Disorders (ASDs).

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Authors: Mackenzie Leake, Liyu Xia, Kamil Rocki, Wayne Imaino

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In the Hierarchical Temporal Memory (HTM) paradigm the effect of overlap between inputs on the activation of columns in the spatial pooler is studied. Numerical results suggest that similar inputs are represented by similar sets of columns and dissimilar inputs are represented by dissimilar sets of columns. It is shown that the spatial pooler produces these results under certain conditions for the connectivity and proximal thresholds. Following the discussion of the initialization of parameters for the thresholds, corresponding qualitative arguments about the learning dynamics of the spatial pooler are discussed.

Keywords: Hierarchical Temporal Memory, HTM, Learning Algorithms, Machine Learning, Spatial Pooler.

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Authors: H. El-Madbouly

Abstract:

For future Broad band ISDN, Asynchronous Transfer Mode (ATM) is designed not only to support a wide range of traffic classes with diverse flow characteristics, but also to guarantee the different quality of service QOS requirements. The QOS may be measured in terms of cell loss probability and maximum cell delay. In this paper, ATM networks in which the virtual path (VP) concept is implemented are considered. By applying the Markov Deterministic process method, an efficient algorithm to compute the minimum capacity required to satisfy the QOS requirements when multiple classes of on-off are multiplexed on to a single VP. Using the result, we then proposed a simple algorithm to determine different combinations of VP to achieve the optimum of the total capacity required for satisfying the individual QOS requirements (loss- delay).

Keywords: Bandwidth allocation, Quality of services, ATMNetwork, virtual path.

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Authors: J. Novak-Marcincin, J. Barna, M. Janak

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Augmented Reality (AR) shows great promises for its usage as a tool for simulation and verification of design proposal of new technological systems. Main advantage of augmented reality application usage is possibility of creation and simulation of new technological unit before its realization. This may contribute to increasing of safety and ergonomics and decreasing of economical aspects of new proposed unit. Virtual model of proposed workcell could reveal hidden errors which elimination in later stage of new workcell creation should cause great difficulties. Paper describes process of such virtual model creation and possibilities of its simulation and verification by augmented reality tools.

Keywords: Augmented reality, simulation, workcell design.

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