Search results for: Six level inverter

Authors: A. Maamoun, Y. M. Alsayed, A. Shaltout

Abstract:

The paper presents a space-vector pulse width modulation (SVPWM) inverter feeding a permanent-magnet synchronous motor (PMSM). The SVPWM inverter enables to feed the motor with a higher voltage with low harmonic distortions than the conventional sinusoidal PWM inverter. The control strategy of the inverter is the voltage / frequency control method, which is based on the space-vector modulation technique. The proposed PMSM drive system involving the field-oriented control scheme not only decouples the torque and flux which provides faster response but also makes the control task easy. The performance of the proposed drive is simulated. The advantages of the proposed drive are confirmed by the simulation results.

Keywords: permanent-magnet synchronous motor, space-vectorPWM inverter, voltage/frequency control.

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Authors: Irtaza M. Syed, Kaamran Raahemifar

Abstract:

In this paper, we present a comparative assessment of Space Vector Pulse Width Modulation (SVPWM) and Model Predictive Control (MPC) for two-level three phase (2L-3P) Voltage Source Inverter (VSI). VSI with associated system is subjected to both control techniques and the results are compared. Matlab/Simulink was used to model, simulate and validate the control schemes. Findings of this study show that MPC is superior to SVPWM in terms of total harmonic distortion (THD) and implementation.

Keywords: Model Predictive Control, Space Vector Pulse Width Modulation, Voltage Source Inverter.

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Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a feed-forward control in a halfbridge resonant dc link inverter. The configuration of feed-forward control is based on synchronous sigma-delta modulation and the halfbridge resonant dc link inverter consists of two inductors, one capacitor and two power switches. The simulation results show the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.

Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.

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Authors: L. Ashok Kumar, N. Sujith Kumar

Abstract:

Most of the PV systems are designed with transformer for safety purpose with galvanic isolation. However, the transformer is big, heavy and expensive. Also, it reduces the overall frequency of the conversion stage. Generally PV inverter with transformer is having efficiency around 92%–94% only. To overcome these problems, transformerless PV system is introduced. It is smaller, lighter, cheaper and higher in efficiency. However, dangerous leakage current will flow between PV array and the grid due to the stray capacitance. There are different types of configurations available for transformerless inverters like H5, H6, HERIC, oH5, and Dual paralleled buck inverter. But each configuration is suffering from its own disadvantages like high conduction losses, shoot-through issues of switches, dead-time requirements at zero crossing instants of grid voltage to avoid grid shoot-through faults and MOSFET reverse recovery issues. The main objective of the proposed transformerless inverter is to address two key issues: One key issue for a transformerless inverter is that it is necessary to achieve high efficiency compared to other existing inverter topologies. Another key issue is that the inverter configuration should not have any shoot-through issues for higher reliability.

Keywords: Leakage current, common mode (CM), photovoltaic (PV) systems, pulse width modulation (PWM).

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Authors: Khaled A. Madi

Abstract:

Induction motors are being used in greater numbers throughout a wide variety of industrial and commercial applications because it provides many benefits and reliable device to convert the electrical energy into mechanical motion. In some application it-s desired to control the speed of the induction motor. Because of the physics of the induction motor the preferred method of controlling its speed is to vary the frequency of the AC voltage driving the motor. In recent years, with the microcontroller incorporated into an appliance it becomes possible to use it to generate the variable frequency AC voltage to control the speed of the induction motor. This study investigates the microcontroller based variable frequency power inverter. the microcontroller is provide the variable frequency pulse width modulation (PWM) signal that control the applied voltage on the gate drive, which is provides the required PWM frequency with less harmonics at the output of the power inverter. The fully controlled bridge voltage source inverter has been implemented with semiconductors power devices isolated gate bipolar transistor (IGBT), and the PWM technique has been employed in this inverter to supply the motor with AC voltage. The proposed drive system for three & single phase power inverter is simulated using Matlab/Simulink. The Matlab Simulation Results for the proposed system were achieved with different SPWM. From the result a stable variable frequency inverter over wide range has been obtained and a good agreement has been found between the simulation and hardware of a microcontroller based single phase inverter.

Keywords: Power, inverter, PWM, microcontroller.

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Authors: Z.A. Jaffery, Vinay Kumar Chandna, Sunil Kumar Chaudhary

Abstract:

This paper present a MATLAB-SIMULINK model of a single phase 2.5 KVA, 240V RMS controlled PV VSI (Photovoltaic Voltage Source Inverter) inverter using IGBTs (Insulated Gate Bipolar Transistor). The behavior of output voltage, output current, and the total harmonic distortion (THD), with the variation in input dc blocking capacitor (Cdc), for linear and non-linear load has been analyzed. The values of Cdc as suggested by the other authors in their papers are not clearly defined and it poses difficulty in selecting the proper value. As the dc power stored in Cdc, (generally placed parallel with battery) is used as input to the VSI inverter. The simulation results shows the variation in the output voltage and current with different values of Cdc for linear and non-linear load connected at the output side of PV VSI inverter and suggest the selection of suitable value of Cdc.

Keywords: DC Blocking capacitor, IGBTs, PV VSI, THD.

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Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang

Abstract:

Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: Analog voltage inverter, Capacitive load, Gain control, DC-DC converter, Piezoelectric, Voltage waveform.

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Authors: Joshi Manohar. V., Sujatha. P., Anjaneyulu K. S. R

Abstract:

The range of the output power is a very important and evident limitation of two-level inverters. In order to overcome this disadvantage, multilevel inverters are introduced. Recently, Cascade H-Bridge inverters have emerged as one of the popular converter topologies used in numerous industrial applications. The modulation switching strategies such as phase shifted carrier based Pulse Width Modulation (PWM) technique and Stair case modulation with Selective Harmonic Elimination (SHE) PWM technique are generally used. NR method is used to solve highly non linear transcendental equations which are formed by SHEPWM method. Generally NR method has a drawback of requiring good initial guess but in this paper a new approach is implemented for NR method with any random initial guess. A three phase CHB 11-level inverter is chosen for analysis. MATLAB/SIMULINK programming environment and harmonic profiles are compared. Finally this paper presents a method at fundamental switching frequency with least % THDV.

Keywords: Cascade H-bridge 11- level Inverter, NR method, Phase shifted carrier based pulse width modulation (PSCPWM), Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Total Harmonic Distortion (%THDv).

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Authors: S. Venkateshwarlu, B. P. Muni, A. D. Rajkumar, J. Praveen

Abstract:

Custom power is a technology driven product and service solution which embraces a family devices such as Dynamic Voltage Restorer (DVR), Distributed Shunt Compensator (DSTATCOM), Solid State Breaker (SSB) etc which will provide power quality functions at distribution voltages. The rapid response of these devices enables them to operate in real time, providing continuous and dynamic control of the supply including voltage and reactive power regulation, harmonic reduction and elimination of voltage dips. This paper presents the benefits of multilevel inverters when they are used for DPC based custom power devices. Power flow control mechanism, salient features, advantages and disadvantages of direct power control (DPC) using lookup table, SVM, predictive voltage vector and hybrid DPC strategies are discussed in this paper. Simulation results of three level inverter based STATCOM, harmonic analysis of multi level inverters are presented at the end.

Keywords: DPC, DPC-SVM, Dynamic voltage restorer, DSTATCOM, Multilevel inverter, PWM Converter, PDPC, VF-DPC.

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Authors: Hanifah Jambari, Naziha A. Azli, M. Afendi M. Piah

Abstract:

This paper presents the generation of bipolar square wave pulses with characteristics that are suitable for liquid food sterilization using a Cascaded H-bridge Multilevel Inverter (CHMI). Bipolar square waves pulses have been reported as stable for a longer time during the sterilization process with minimum heat emission and increased efficiency. The CHMI allows the system to produce bipolar square wave pulses and yielding high output voltage without using a transformer while fulfilling the pulse requirements for effective liquid food sterilization. This in turn can reduce power consumption and cost of the overall liquid food sterilization system. The simulation results have shown that pulses with peak output voltage of 2.4 kV, pulse width of between 1 2s and 1 ms at frequencies of 50 Hz and 100 Hz can be generated by a 7-level CHMI. Results from the experimental set-up based on a 5-level CHMI has indicated the potential of the proposed circuit in producing bipolar square wave output pulses with peak values that depends on the DC source level supplied to the CHMI modules, pulse width of between 12.5 2s and 1 ms at frequencies of 50 Hz and 100 Hz.

Keywords: pulsed electric field, multilevel inverter, bipolarsquare wave, food sterilization

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Authors: Mohd Tariq

Abstract:

The three phase system drives produce the problem of more torque pulsations and harmonics. This issue prevents the smooth operation of the drives and it also induces the amount of heat generated thus resulting in an increase in power loss. Higher phase system offers smooth operation of the machines with greater power capacity. Five phase variable-speed induction motor drives are commonly used in various industrial and commercial applications like tractions, electrical vehicles, ship propulsions and conveyor belt drive system. In this work, a comparative analysis of the different modulation schemes applied on the five-level five-phase Packed U Cell (PUC) inverter fed induction motor drives is presented. The performance of the inverter is greatly affected with the modulation schemes applied. The system is modeled, designed, and implemented in MATLAB^®/Simulink environment. Experimental validation is done for the prototype of single phase, whereas five phase experimental validation is proposed in the future works.

Keywords: Packed U-Cell inverter, pulse width modulation, five-phase system, induction motor.

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Authors: M. Nayeemuddin, T. Bramhananda Reddy, M. Vijaya Kumar

Abstract:

Acoustic noise becoming ever more obnoxious radiated by voltage source inverter fed induction motor drive in modern and industrial applications. The drive utilized for industrial and modern applications should use “spread spectrum” innovation known as Random pulse width modulation (PWM) algorithms where acoustic noise emanates through the machine should be critically concerned. This paper illustrates three types of random PWM control algorithms with fixed switching frequency namely 1) Random modulating PWM 2) Random carrier PWM and 3) Random modulating-carrier PWM. The spectrum plots of the motor stator current demonstrate the strength and robustness of the proposed PWM algorithms. To affirm the proposed algorithms, experimental tests have been conducted using dSPACE rt1104 control board on a v/f control three phase induction motor drive fed by DC link cascaded multilevel inverter.

Keywords: Multilevel inverter, acoustic noise, CSVPWM, total harmonic distortion, random PWM algorithm.

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Authors: Apinan Aurasopon, Worawat Sa-ngiavibool

Abstract:

This paper proposes a feed-forward control in resonant dc link inverter. The feed-forward control configuration is based on synchronous sigma-delta modulation. The simulation results showing the proposed technique can reject non-ideal dc bus improving the total harmonic distortion.

Keywords: Feed-forward control, Resonant dc link inverter, Synchronous sigma-delta modulation.

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Authors: Tapan Trivedi, Pramod Agarwal, Rajendrasinh Jadeja, Pragnesh Bhatt

Abstract:

Space Vector Pulse Width Modulation is popular for variable frequency drives. The method has several advantages over carried based PWM and is computation intensive. The implementation of SVPWM for multilevel inverter requires special attention and at the same time consumes considerable resources. Due to faster processing power and reduced over all computational burden, FPGAs are being investigated as an alternative for other controllers. In this paper, a space vector PWM algorithm is implemented using FPGA which requires less computational area and is modular in structure. The algorithm is verified experimentally for Neutral Point Clamped inverter using FPGA development board xc3s5000-4fg900.

Keywords: Modular structure, Multilevel inverter, Space Vector PWM, Switching States.

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Authors: Gaddafi S. Shehu, T. Yalcinoz, Abdullahi B. Kunya

Abstract:

Multilevel inverters such as flying capacitor, diodeclamped, and cascaded H-bridge inverters are very popular particularly in medium and high power applications. This paper focuses on a cascaded H-bridge module using a single direct current (DC) source in order to generate an 11-level output voltage. The noble approach reduces the number of switches and gate drivers, in comparison with a conventional method. The anticipated topology produces more accurate result with an isolation transformer at high switching frequency. Different modulation techniques can be used for the multilevel inverter, but this work features modulation techniques known as selective harmonic elimination (SHE).This modulation approach reduces the number of carriers with reduction in Switching Losses, Total Harmonic Distortion (THD), and thereby increasing Power Quality (PQ). Based on the simulation result obtained, it appears SHE has the ability to eliminate selected harmonics by chopping off the fundamental output component. The performance evaluation of the proposed cascaded multilevel inverter is performed using PSIM simulation package and THD of 0.94% is obtained.

Keywords: Cascaded H-bridge Multilevel Inverter, Power Quality, Selective Harmonic Elimination.

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Authors: Alpana Agarwal, Akhil Sharma

Abstract:

This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7^o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter.

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Authors: Najiya Omar, Hamed Aly, Timothy Little

Abstract:

The optimal size of a photovoltaic (PV) array is considered a critical factor in designing an efficient PV system due to the dependence of the PV cell performance on temperature. A high temperature can lead to voltage losses of solar panels, whereas a low temperature can cause voltage overproduction. There are two possible scenarios of the inverter’s operation in which they are associated with the erroneous calculations of the number of PV panels: 1) If the number of the panels is scant and the temperature is high, the minimum voltage required to operate the inverter will not be reached. As a result, the inverter will shut down. 2) Comparably, if the number of panels is excessive and the temperature is low, the produced voltage will be more than the maximum limit of the inverter which can cause the inverter to get disconnected or even damaged. This article aims to assess theoretical and practical methodologies to calculate size and determine the topology of a PV array. The results are validated by applying an experimental evaluation for a 100 kW Grid-connected PV system for a location in Halifax, Nova Scotia and achieving a satisfactory system performance compared to the previous work done.

Keywords: Sizing PV panels, grid-connected PV, topology of PV array, theoretical and practical methodologies.

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Authors: R. Gunabalan, S. Immanuel Prabakaran, J. Reegan, S. Ganesh

Abstract:

This paper describes a software approach for modeling inverter fed induction motor drive using Laboratory Virtual Instrument Engineering Workbench (LabVIEW). The reason behind the selection of LabVIEW software is because of its strong graphical interface, flexibility of its programming language combined with built-in tools designed specifically for test, measurement and control. LabVIEW is generally used in most of the applications for data acquisition, test and control. In this paper, inverter and induction motor are modeled using LabVIEW toolkits. Simulation results are presented and are validated.

Keywords: Induction motor, LabVIEW, State model.

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Authors: Spyridon Nikolaidis

Abstract:

A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, Inverter modeling, transistor current model, timing model.

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Authors: A. Bennassar, A. Abbou, M. Akherraz, M. Barara

Abstract:

In this paper, we propose a sensorless backstepping control of induction motor (IM) associated with three levels neutral clamped (NPC) inverter. First, the backstepping approach is designed to steer the flux and speed variables to theirs references and to compensate the uncertainties. A Lyapunov theory is used and it demonstrates that the dynamic trajectories tracking are asymptotically stable. Second, we estimate the rotor flux and speed by using the adaptive Luenberger observer (ALO). Simulation results are provided to illustrate the performance of the proposed approach in high and low speeds and load torque disturbance.

Keywords: Sensorless backstepping, IM, Three levels NPC inverter, Lyapunov theory, ALO.

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Authors: T. Abdelkrim, K. Benamrane, B. Bezza, Aeh Benkhelifa, A. Borni

Abstract:

This paper proposes a regulation method of back-to-back connected three-level converters in order to reduce the torque ripple in induction motor. First part is dedicated to the presentation of the feedback control of three-level PWM rectifier. In the second part, three-level NPC voltage source inverter balancing DC bus algorithm is presented. A theoretical analysis with a complete simulation of the system is presented to prove the excellent performance of the proposed technique.

Keywords: Back-to-back connection, Feedback control, Neutral-point balance, Three-level converter, Torque ripple.

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Authors: Shiang-Hwua Yu, Han-Sheng Tseng

Abstract:

This paper presents a novel sinusoidal modulation scheme that features least correlated noise and high linearity. The modulation circuit, which is composed of a quantizer, a resonator, and a comparator, is capable of eliminating correlated modulation noise while doing modulation. The proposed modulation scheme combined with the linear quadratic optimal control is applied to a single-phase voltage source inverter and validated with the experiment results. The experiments show that the inverter supplies stable 60Hz 110V AC power with a total harmonic distortion of less than 1%, under the DC input variation from 190 V to 300 V and the output power variation from 0 to 600 W.

Keywords: Pulse width modulation, feedback dithering, linear quadratic control, inverter.

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Authors: Dipankar Dhabak, Soumya Pandit

Abstract:

This paper presents an adaptive technique for generation of data required for construction of artificial neural network-based performance model of nano-scale CMOS inverter circuit. The training data are generated from the samples through SPICE simulation. The proposed algorithm has been compared to standard progressive sampling algorithms like arithmetic sampling and geometric sampling. The advantages of the present approach over the others have been demonstrated. The ANN predicted results have been compared with actual SPICE results. A very good accuracy has been obtained.

Keywords: CMOS Inverter, Nano-scale, Adaptive Sampling, ArtificialNeural Network

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Authors: A.Muthuramalingam, S.Himavathi

Abstract:

Space Vector Modulation (SVM) is an optimum Pulse Width Modulation (PWM) technique for an inverter used in a variable frequency drive applications. It is computationally rigorous and hence limits the inverter switching frequency. Increase in switching frequency can be achieved using Neural Network (NN) based SVM, implemented on application specific chips. This paper proposes a neural network based SVM technique for a Voltage Source Inverter (VSI). The network proposed is independent of switching frequency. Different architectures are investigated keeping the total number of neurons constant. The performance of the inverter is compared for various switching frequencies for different architectures of NN based SVM. From the results obtained, the network with minimum resource and appropriate word length is identified. The bit precision required for this application is identified. The network with 8-bit precision is implemented in the IC XCV 400 and the results are presented. The performance of NN based general purpose SVM with higher bit precision is discussed.

Keywords: NN based SVM, FPGA Implementation, LayerMultiplexing, NN structure and Resource Reduction, PerformanceEvaluation

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Authors: Syed Munvar Ali, V. Vijaya Kumar Reddy, M. Surya Kalavathi

Abstract:

In this paper, a dual inverter configuration has been implemented for induction motor drive. This isolated dual inverter is capable to produce high quality of output voltage and minimize common mode voltage (CMV). To this isolated dual inverter a decoupled space vector based pulse width modulation (PWM) technique is proposed. Conventional space vector based PWM (SVPWM) techniques require reference voltage vector calculation and sector identification. The proposed decoupled SVPWM technique generates gating pulses from instantaneous phase voltages and gives a CMV of ±v_dc/6. To evaluate proposed algorithm MATLAB based simulation studies are carried on indirect vector controlled open end winding induction motor drive.

Keywords: Inverter configuration, decoupled SVPWM, common mode voltage, vector control.

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Authors: Buket Turan Azizoğlu

Abstract:

In switch mode power inverters, small sized inverters can be obtained by increasing the switching frequency. Switching frequency increment causes high driver losses. Also, high dt di and dt dv produced by the switching action creates high Electromagnetic Interference (EMI) and Radio Frequency Interference (RFI). In this paper, a series half bridge series resonant inverter circuit is simulated and evaluated practically to demonstrate the turn-on and turn-off conditions during zero or close to zero voltage switching. Also, the reverse recovery current effects of the body diode of the MOSFETs were investigated by operating above and below resonant frequency.

Keywords: Driver losses, Half Bridge series resonant inverter, Zero Voltage Switching

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Authors: Ahmed Shariful Alam, Abu Hena M. Mustafa Kamal, M. Abdul Rahman, M. Nasmus Sakib Khan Shabbir, Atiqul Islam

Abstract:

According to the rules of quantum mechanics there is a non-vanishing probability of for an electron to tunnel through a thin insulating barrier or a thin capacitor which is not possible according to the laws of classical physics. Tunneling of electron through a thin insulating barrier or tunnel junction is a random event and the magnitude of current flowing due to the tunneling of electron is very low. As the current flowing through a Single Electron Transistor (SET) is the result of electron tunneling through tunnel junctions of its source and drain the supply voltage requirement is also very low. As a result, the power consumption across a Single Electron Transistor is ultra-low in comparison to that of a MOSFET. In this paper simulations have been done with PSPICE for an inverter built with both SETs and MOSFETs. 35mV supply voltage was used for a SET built inverter circuit and the supply voltage used for a CMOS inverter was 3.5V.

Keywords: ITRS, enhancement type MOSFET, island, DC analysis, transient analysis, power consumption, background charge co-tunneling.

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Authors: Nur Aisyah Jalalludin, Arwindra Rizqiawan, Goro Fujita

Abstract:

In this study, we aim to demonstrate a microgrid system experimental simulation for an easy understanding of a large-scale microgrid system. This model is required for industrial training and learning environments. However, in order to create an exact representation of a microgrid system, the laboratory-scale system must fulfill the requirements of a grid-connected inverter, in which power values are assigned to the system to cope with the intermittent output from renewable energy sources. Aside from that, during fluctuations in load capacity, the grid-connected system must be able to supply power from the utility grid side and microgrid side in a balanced manner. Therefore, droop control is installed in the inverter’s control board to maintain a balanced power sharing in both sides. This power control in a stand-alone condition and droop control in a grid-connected condition must be implemented in order to maintain a stabilized system. Based on the experimental results, power control and droop control can both be applied in the system by comparing the experimental and reference values.

Keywords: Droop control, droop characteristic, grid-connected inverter, microgrid, power control.

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Authors: H. Sediki, S. Djennoune

Abstract:

The switching lag-time and the voltage drop across the power devices cause serious waveform distortions and fundamental voltage drop in pulse width-modulated inverter output. These phenomenons are conspicuous when both the output frequency and voltage are low. To estimate the output voltage from the PWM reference signal it is essential to take account of these imperfections and to correct them. In this paper, on-line compensation method is presented. It needs three simple blocs to add at the ideal reference voltages. This method does not require any additional hardware circuit and off- line experimental measurement. The paper includes experimental results to demonstrate the validity of the proposed method. It is applied, finally, in case of indirect vector controlled induction machine and implemented using dSpace card.

Keywords: Dead time, field-oriented control, Induction motor, PWM inverter, voltage drop.

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Authors: Padmanabhan Balasubramanian, Karthik Anantha

Abstract:

Structural representation and technology mapping of a Boolean function is an important problem in the design of nonregenerative digital logic circuits (also called combinational logic circuits). Library aware function manipulation offers a solution to this problem. Compact multi-level representation of binary networks, based on simple circuit structures, such as AND-Inverter Graphs (AIG) [1] [5], NAND Graphs, OR-Inverter Graphs (OIG), AND-OR Graphs (AOG), AND-OR-Inverter Graphs (AOIG), AND-XORInverter Graphs, Reduced Boolean Circuits [8] does exist in literature. In this work, we discuss a novel and efficient graph realization for combinational logic circuits, represented using a NAND-NOR-Inverter Graph (NNIG), which is composed of only two-input NAND (NAND2), NOR (NOR2) and inverter (INV) cells. The networks are constructed on the basis of irredundant disjunctive and conjunctive normal forms, after factoring, comprising terms with minimum support. Construction of a NNIG for a non-regenerative function in normal form would be straightforward, whereas for the complementary phase, it would be developed by considering a virtual instance of the function. However, the choice of best NNIG for a given function would be based upon literal count, cell count and DAG node count of the implementation at the technology independent stage. In case of a tie, the final decision would be made after extracting the physical design parameters. We have considered AIG representation for reduced disjunctive normal form and the best of OIG/AOG/AOIG for the minimized conjunctive normal forms. This is necessitated due to the nature of certain functions, such as Achilles- heel functions. NNIGs are found to exhibit 3.97% lesser node count compared to AIGs and OIG/AOG/AOIGs; consume 23.74% and 10.79% lesser library cells than AIGs and OIG/AOG/AOIGs for the various samples considered. We compare the power efficiency and delay improvement achieved by optimal NNIGs over minimal AIGs and OIG/AOG/AOIGs for various case studies. In comparison with functionally equivalent, irredundant and compact AIGs, NNIGs report mean savings in power and delay of 43.71% and 25.85% respectively, after technology mapping with a 0.35 micron TSMC CMOS process. For a comparison with OIG/AOG/AOIGs, NNIGs demonstrate average savings in power and delay by 47.51% and 24.83%. With respect to device count needed for implementation with static CMOS logic style, NNIGs utilize 37.85% and 33.95% lesser transistors than their AIG and OIG/AOG/AOIG counterparts.

Keywords: AND-Inverter Graph, OR-Inverter Graph, DirectedAcyclic Graph, Low power design, Delay optimization.

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