Search results for: compact circuit breakers

Authors: Patel Himeshkumar Ashokbhai, Suchit Sharma, Arvind Kumar Garg

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The purpose of this paper is to study the effect of change in feed rate on grinding circuit and cyclone efficiency in case of lead-zinc ore. The following experiments and analysis were conducted on beneficiation circuit of Sindesar Khurd (SK) mines under Hindustan Zinc Ltd. subsidiary of Vedanta Group of Companies, a leading producer of lead-Zinc, silver and cadmium (as by products) in India. Feed rate is an important variable in beneficiation circuit operation. Optimizing feed rate is indispensable for any grinding circuit and directly effects cyclone efficiency. The size analysis of ore in grinding circuit along with cyclone efficiency on varying feed rates establishes their interdependence. Feed rate determines retention time ore gets within grinding circuit. Retention time in turn determines degree of liberation of mineral. Inadequate liberation causes decreased circuit efficiency. In this paper we have studied the effect of varying feed rate on (1) D80 particle size of different sections of different streams of grinding circuit (2) Re-circulating load (3) Cyclone efficiency. As a conclusion, this study gives some clues to operate grinding circuits and hydro-cyclones in more efficient way regarding beneficiation of Lead-zinc ore.

Keywords: cyclone efficiency, feed rate, grinding circuit, re-circulating load

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Authors: Douglas Yeboah, Monishka Narayan, Jai Singh

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One of the key parameters in determining the power conversion efficiency (PCE) of organic solar cells (OSCs) is the open-circuit voltage, however, it is still not well understood. In order to examine the performance of OSCs, it is necessary to understand the losses associated with the open-circuit voltage and how best it can be improved. Here, an analytical expression for the open-circuit voltage of bulk heterojunction (BHJ) OSCs is derived from the charge carrier densities without considering the drift-diffusion current. The open-circuit voltage thus obtained is dependent on the donor-acceptor band gap, the energy difference between the highest occupied molecular orbital (HOMO) and the hole quasi-Fermi level of the donor material, temperature, the carrier density (electrons), the generation rate of free charge carriers and the bimolecular recombination coefficient. It is found that open-circuit voltage increases when the carrier density increases and when the temperature decreases. The calculated results are discussed in view of experimental results and agree with them reasonably well. Overall, this work proposes an alternative pathway for improving the open-circuit voltage in BHJ OSCs.

Keywords: charge carrier density, open-circuit voltage, organic solar cells, temperature

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Authors: Duanlei Yuan, Guangchao Yan, Zhanqing Chen, Xian Cheng

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This paper mainly focuses on the problem that high voltage circuit breaker’s closing and opening operation at random phase brings harmful electromagnetic transient effects on the power system. To repress the negative transient effects, a 35 kV SF6 phase-control circuit breaker equipped with electromagnetic force driving actuator is designed in this paper. Based on the constructed mathematical and structural models, the static magnetic field distribution and dynamic properties of the under loading actuator are simulated. The prototype of 35 kV SF6 phase-control circuit breaker is developed based on theories analysis and simulation. Tests are carried on to verify the operating reliability of the prototype. The developed circuit breaker can control its operating speed intelligently and switches with phase selection. Results of the tests and simulation prove that the phase-control circuit breaker is feasible for industrial applications.

Keywords: phase-control, circuit breaker, electromagnetic force driving actuator, tests and simulation

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Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

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In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

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Authors: Milad Kaboli

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A new CMOS low voltage current-mode four-quadrant analog multiplier based on the squarer circuit with voltage output is presented. The proposed circuit is composed of a pair of current subtractors, a pair differential-input V-I converters and a pair of voltage squarers. The circuit was simulated using HSPICE simulator in standard 0.18 μm CMOS level 49 MOSIS (BSIM3 V3.2 SPICE-based). Simulation results show the performance of the proposed circuit and experimental results are given to confirm the operation. This topology of multiplier results in a high-frequency capability with low power consumption. The multiplier operates for a power supply ±1.2V. The simulation results of analog multiplier demonstrate a THD of 0.65% in 10MHz, a −3dB bandwidth of 1.39GHz, and a maximum power consumption of 7.1mW.

Keywords: analog processing circuit, WTA, LTA, low voltage

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Authors: Xiaohui Wang, Liwei Sun, Guilin Zhang

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Printed circuit board (PCB) is the carrier of electronic components. Its coating is the first barrier for protecting itself. If the coating is damaged, the performance of printed circuit board will decrease rapidly until failure. Therefore, the coating plays an important role in the entire printed circuit board. There are common four kinds of coating of printed circuit board that the material of the coatings are paryleneC, acrylic, polyurethane, silicone. In this paper, we designed an accelerated degradation test of humid and heat for these four kinds of coating. And chose insulation resistance, moisture absorption and surface morphology as its test indexes. By comparing the change of insulation resistance of the coating before and after the test, we estimate failure time of these coatings based on the degradation of insulation resistance. Based on the above, we estimate the service life of the four kinds of PCB.

Keywords: printed circuit board, life assessment, insulation resistance, coating material

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Authors: Simona Ziukaite, Remigijus Ivanauskas, Gintaras Denafas

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Market development of electrical and electronic equipment and a short life cycle is driven by the increasing waste streams. Gold Au, copper Cu, silver Ag and palladium Pd can be found on printed circuit board. These metals make up the largest value of printed circuit board. Therefore, the printed circuit boards scrap is valuable as potential raw material for precious metals recovery. A comparison of Cu, Au, Ag, Pd recovery from waste printed circuit techniques was selected metals leaching of chemical reagents. The study was conducted using the selected multistage technique for Au, Cu, Ag, Pd recovery of printed circuit board. In the first and second metals leaching stages, as the elution reagent, 2M H2SO4 and H2O2 (35%) was used. In the third stage, leaching of precious metals used solution of 20 g/l of thiourea and 6 g/l of Fe2 (SO4)3. Verify the efficiency of the method was carried out the metals leaching test with aqua regia. Based on the experimental study, the leaching efficiency, using the preferred methodology, 60 % of Au and 85,5 % of Cu dissolution was achieved. Metals leaching efficiency after waste mechanical crushing and thermal treatment have been increased by 1,7 times (40 %) for copper, 1,6 times (37 %) for gold and 1,8 times (44 %) for silver. It was noticed that, the Au amount in old (> 20 years) waste is 17 times more, Cu amount - 4 times more, and Ag - 2 times more than in the new (< 1 years) waste. Palladium in the new printed circuit board waste has not been found, however, it was established that from 1 t of old printed circuit board waste can be recovered 1,064 g of Pd (leaching with aqua regia). It was found that from 1 t of old printed circuit board waste can be recovered 1,064 g of Ag. Precious metals recovery in Lithuania was estimated in this study. Given the amounts of generated printed circuit board waste, the limits for recovery of precious metals were identified.

Keywords: leaching efficiency, limits for recovery, precious metals recovery, printed circuit board waste

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Authors: Ramnath Narhete, Saket Pandey, Puran Gour

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This paper presents of dual-band planner antenna with a compact radiator for 2.4/5.2/5.8 proposed by optimizing its resonant frequency, Bandwidth of operation and radiation frequency using the genetic algorithm. The antenna consists L-shaped and E-shaped radiating element to generate two resonant modes for dual band operation. The above techniques have been successfully used in many applications. Dual band antenna with the compact radiator for 2.4/5.2/5.8 GHz WLAN application design and radiator size only width 8mm and a length is 11.3 mm. The antenna can we used for various application in the field of communication. Genetic algorithm will be used to design the antenna and impedance matching network.

Keywords: genetic algorithm, dual-band E, dual-band L, WLAN, compact radiator

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Authors: Carlos Gonzalez-Flores, Ernesto Liñan-García

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A simple and robust approach for developing secure software. A Four Phase methodology consists in developing the non-secure software in phase one, and for the next three phases, one phase for each of the secure developing types (i.e. self-protected software, secure code transformation, and the secure shield). Our methodology requires first the determination and understanding of the type of security level needed for the software. The methodology proposes the use of several teams to accomplish this task. One Software Engineering Developing Team, a Compiler Team, a Specification and Requirements Testing Team, and for each of the secure software developing types: three teams of Secure Software Developing, three teams of Code Breakers, and three teams of Intrusion Analysis. These teams will interact among each other and make decisions to provide a secure software code protected against a required level of intruder.

Keywords: secure software, four phases methodology, software engineering, code breakers, intrusion analysis

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Authors: Sun-Ki Hong, Nam-HeeByeon, Jung-Seop Lee, Tae-Sam Kang

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For Common R or R-L load to apply arbitrary voltage, the bridge traditional inverters don’t have any difficulties by PWM method. However for driving some piezoelectric actuator, arbitrary voltage not a pulse but a steady voltage should be applied. Piezoelectric load is considered as R-C load and its voltage does not decrease even though the applied voltage decreases. Therefore it needs some special inverter with circuit that can discharge the capacitive energy. Especially for unidirectional arbitrary voltage driving like as sine wave, it becomes more difficult problem. In this paper, a charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator is proposed. The circuit has charging and discharging switches for increasing and decreasing output voltage. With the proposed simple circuit, the load voltage can have any unidirectional level with tens of bandwidth because the load voltage can be adjusted by switching the charging and discharging switch appropriately. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: DC-DC converter, analog output voltage, sinusoidal drive, piezoelectric load, discharging circuit

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Authors: Muhammad Yasir Wadood, Fatemeh Babaeian

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By developing ultra-wideband (UWB) systems, there is a high demand for UWB filters with low insertion loss, wide bandwidth, and having a planar structure which is compatible with other components of the UWB system. A microstrip interdigital filter is a great option for designing UWB filters. However, the presence of via holes in this structure creates difficulties in the fabrication procedure of the filter. Especially in the higher frequency band, any misalignment of the drilled via hole with the Microstrip stubs causes large errors in the measurement results compared to the desired results. Moreover, in this case (high-frequency designs), the line width of the stubs are very narrow, so highly precise small via holes are required to be implemented, which increases the cost of fabrication significantly. Also, in this case, there is a risk of having fabrication errors. To combat this issue, in this paper, a via-less UWB microstrip filter is proposed which is designed based on a modification of a conventional inter-digital bandpass filter. The novel approaches in this filter design are 1) replacement of each via hole with a quarter-wavelength open circuit stub to avoid the complexity of manufacturing, 2) using a bend structure to reduce the unwanted coupling effects and 3) minimising the size. Using the proposed structure, a UWB filter operating in the frequency band of 3.9-6.6 GHz (1-dB bandwidth) is designed and fabricated. The promising results of the simulation and measurement are presented in this paper. The selected substrate for these designs was Rogers RO4003 with a thickness of 20 mils. This is a common substrate in most of the industrial projects. The compact size of the proposed filter is highly beneficial for applications which require a very miniature size of hardware.

Keywords: band-pass filters, inter-digital filter, microstrip, via-less

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Authors: R. K. Saket, K. S. Anand Kumar

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This paper presents an innovative 3-wire capacitor circuit system used to increase the efficiency and comfort improvement of permanent split-capacitor ceiling fan. In this innovative circuit, current has been reduced to save electrical power. The system could be used to replace standard single phase motor 2-wire capacitor configuration by cost effective split value X rated of optimized AC capacitors with the auxiliary winding to provide reliable ceiling fan operation and improved machine performance to save power. In basic system operations, comparisons with conventional ceiling fan are described.

Keywords: permanent split-capacitor motor, innovative 3-wire capacitor circuit system, standard 2-wire capacitor circuit system, metalized film X-rated capacitor

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Authors: Velly Kapadia, Reenu Singh

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This report identifies the long-term driving forces behind urbanization and the impact of compact living on both society and the home and proposes a concept to create smarter and more sustainable homes. Compact living has been trending across India as a sustainable housing solution, and the reality is that India is currently facing a housing shortage in urban areas of around 10 million units. With the rising demand for housing, urban land prices have been rising and the cost of homes. The paper explores how and why the interior design of the homes can be improved to relieve the housing demand in an environmentally, socially and economically sustainable manner. A questionnaire survey was conducted to determine living patterns, area requirements, ecological footprints, energy consumption, purchasing patterns, and various pro-environmental behaviors of people who downsize to compact homes. Quantitative research explores sustainable material choices, durability, functionality, cost, and reusability of furniture. Besides addressing the need for smart and sustainable designed compact homes, a conceptual model is proposed, including options of ideal schematic layouts for homes in urban areas. In the conclusions, suggestions to improve space planning and suitable interior entities have been made to support the fact that compact homes are an eminently practical and sensible solution for the urban citizen.

Keywords: compact living, housing shortage, lifestyle, sustainable interior design

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Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal

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In the era of technological advancement, use of computer technology has become inevitable. Hence it has become the need of the hour to integrate software methods in engineering curriculum as a part to boost pedagogy techniques. Simulations software is a great help to graduates of disciplines such as electrical engineering. Since electrical engineering deals with high voltages and heavy instruments, extra care must be taken while operating with them. The viable solution would be to have appropriate control. The appropriate control could be well designed if engineers have knowledge of kind of waveforms associated with the system. Though these waveforms can be plotted manually, but it consumes a lot of time. Hence aid of simulation helps to understand steady state of system and resulting in better performance. In this paper computer, aided teaching of transformer is carried out using MATLAB/Simulink. The test carried out on a transformer includes open circuit test and short circuit respectively. The respective parameters of transformer are then calculated using the values obtained from open circuit and short circuit test respectively using Simulink.

Keywords: computer aided teaching, open circuit test, short circuit test, simulink, transformer

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Authors: Mohamad Farhat, Bal Virdee

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This paper present a compact Microstrip Bandpass filter exhibiting a very wide stop band and high selectivity. The filter comprises of asymmetric resonator structures, which are interconnected by an inter-digital capacitor to enable the realization of a wide bandwidth with high rejection level. High selectivity is obtained by optimizing the parameters of the interdigital capacitor. The filter has high out-of-band rejection (> 30 dB), less than 0.6 dB of insertion-loss, up to 5.5 GHz spurii free, and about 18 dB of return-loss. Full-wave electromagnetic simulator ADSTM (Mom) is used to analyze and optimize the prototype bandpass filter. The proposed technique was verified practically to validate the design methodology. The experimental results of the prototype circuit are presented and a good agreement was obtained comparing with the simulation results. The dimensions of the proposed filter are 32 x 24 mm2.The filter’s characteristics and compact size make it suitable for wireless communication systems.

Keywords: asymmetric resonator, bandpass filter, microstrip, spurious suppression, ultra-wide stop band

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Authors: Adhinarayanan Venkatasubramanian

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For design of high speed digital circuit wave pipeline is the best approach this can be operated at higher operating frequencies by adjusting clock periods and skews so as latch the o/p of combinational logic circuit at the stable period. In this paper, there are two methods are proposed in automation task one is BIST (Built in self test) and second method is Reconfigurable technique. For the above two approaches dedicated AND gate (multiplier) by applying wave pipeline technique. BIST approach is implemented by Xilinx Spartan-II device. In reconfigurable technique done by ASIC. From the results, wave pipeline circuits are faster than nonpipeline circuit and area, power dissipation are reduced by reconfigurable technique.

Keywords: SOC, wave-pipelining, FPGA, self-testing, reconfigurable, ASIC

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Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

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In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor

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Authors: G. Sivaraj, K. M. Parammasivam, R. Veeramanikandan, S. Nithish

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Reduction of ground clearance or (ride height) is a vital factor in minimizing aerodynamic drag force and improving vehicle performance. But in India, minimization of ground clearance is limited because of the road conditions. Due to this problem, reduction of aerodynamic drag and performance are not fully improved. In this view, this paper deals with the development of self-retractable front spoilers which are most suitable for Indian road conditions. These retractable spoilers are fitted in the front portion of the car and in speed below 60 km/hr these spoilers are in retracted positions. But, when the car crosses a speed above 60 km/hr, using electronic circuit the spoilers are activated. Thus, using this technique aerodynamic performance can be improved at a speed above 60 km/hr. Also, when the car speed is reduced below the 60 km/hr mark, the front spoiler are retracted which makes it as a normal car. This is because, in Indian roads, speed breakers are installed to cut off speed at particular places. Thus, in these circumstances there are chances of damaging front spoilers. Since, when the driver sees the speed breaker, he will automatically apply break to prevent damage, at this time using electronic circuit the front spoiler is retracted. However, accidentally when the driver fails to apply brakes there are chances for the front spoilers to get a hit. But as the front spoilers are made of Kevlar composite, it can withstand high impact loads and using a spring mechanism the spoilers are retracted immediately. By using CFD analysis and low-speed wind tunnel testing drag coefficient of the 1:10 scaled car model with and without self-retractable spoilers are calculated and validated. Also, using wind tunnel, proper working of self-retractable at car speed below and above 60 km/hr are validated.

Keywords: aerodynamic drag, CFD analysis, kevlar composite, self-retractable spoilers, wind tunnel

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Authors: Shrikant V. Sangludkar, Dilip I. Sangotra, Sachin T. Bagde, Abhijeet A. Khandagale

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The paper discloses a controlled tracked humanoid robot moving platform. A driving and driven wheel are controlled by a control module to drive a robot body to move according to data signals of a monitoring module, in addition, remote transmission can be achieved, and a certain remote control function can be realized. A power management module circuit board looks after in used for providing electric drive for moving of the robot body and distribution of separate power source to be used in internal of robot system. An external port circuit board is arranged, the tracked robot moving platform can be used immediately for any data acquisition. The moving platform is simple and compact in structure, strong in adaptation performance, stable in operation and suitable for being operated in severe environments. Meanwhile, a layered modular installation structure is adopted, and therefore the moving platform is convenient to assemble and disassemble.

Keywords: moving platform, humanoid robot, embedded controlled drive, mobile robot, museum robots, self-localization, obstacle avoidance, communication

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Authors: Carlos Gonzalez, Ernesto Linan

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We propose a methodology to conciliate two apparently contradictory processes in the development of secure obfuscated software and good software engineered software. Our methodology consists first in the system designers defining the type of security level required for the software. There are four types of attackers: casual attackers, hackers, institution attack, and government attack. Depending on the level of threat, the methodology we propose uses five or six teams to accomplish this task. One Software Engineer Team and one or two software Obfuscation Teams, and Compiler Team, these four teams will develop and compile the secure obfuscated software, a Code Breakers Team will test the results of the previous teams to see if the software is not broken at the required security level, and an Intrusion Analysis Team will analyze the results of the Code Breakers Team and propose solutions to the development teams to prevent the detected intrusions. We also present an analytical model to prove that our methodology is no only easier to use, but generates an economical way of producing secure obfuscated software.

Keywords: development methodology, obfuscated software, secure software development, software engineering

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Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

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In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

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Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

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This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver

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Authors: T. Obateru, Samuel Olaniran

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In an era when the new media is affording easy access to packaging and dissemination of information, the social media have become a popular avenue for sharing information for good or ill. It is evident that the traditional role of journalists as ‘news breakers’ is fast being eroded. People now share information on happenings via the social media like Facebook, Twitter and the rest, such that journalists themselves now get leads on happenings from such sources. Beyond the access to information provided by the new media is the erosion of the gatekeeping role of journalists who by their training and calling, are supposed to handle information with responsibility. Thus, sensitive information that journalists would normally filter is randomly shared by social media activists. This was the experience of journalists in Jos, Plateau State in January 2010 when another of the recurring ethnoreligious crisis that engulfed the state resulted in another widespread killing, vandalism, looting, and displacements. Considered as one of the high points of crises in the state, journalists who had the duty of covering the crisis also relied on some of these sources to get their bearing on the violence. This paper examined the role of Facebook in the work of journalists who covered the 2010 crisis. Taking the gatekeeping perspective, it interrogated the extent to which Facebook impacted their professional duty positively or negatively vis-à-vis the peace journalism model. It employed survey to elicit information from 50 journalists who covered the crisis using questionnaire as instrument. The paper revealed that the dissemination of hate information via mobile phones and social media, especially Facebook, aggravated the crisis situation. Journalists became news followers rather than news breakers because a lot of them were put on their toes by information (many of which were inaccurate or false) circulated on Facebook. It recommended that journalists must remain true to their calling by upholding their ‘gatekeeping’ role of disseminating only accurate and responsible information if they would remain the main source of credible information on which their audience rely.

Keywords: crisis, ethnoreligious, Facebook, journalists

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Authors: Zhiguo Shi, Cheng Ning Loong, Jiazeng Shan, Weichao Wu

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This study proposes an equivalent circuit model to simulate the eddy current damping force with shaking table tests and finite element modeling. The model is firstly proposed and applied to a simple eddy current damper, which is modelled in ANSYS, indicating that the proposed model can simulate the eddy current damping force under different types of excitations. Then, a non-contact and friction-free eddy current damper is designed and tested, and the proposed model can reproduce the experimental observations. The excellent agreement between the simulated results and the experimental data validates the accuracy and reliability of the equivalent circuit model. Furthermore, a more complicated model is performed in ANSYS to verify the feasibility of the equivalent circuit model in complex eddy current damper, and the higher-order fractional model and viscous model are adopted for comparison.

Keywords: equivalent circuit model, eddy current damping, finite element model, shake table test

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Authors: Jun-Geol Park, Kyoung-Il Do, Min-Ju Kwon, Kyung-Hyun Park, Yong-Seo Koo

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In this paper, we proposed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for latch-up immunity. The proposed circuit has a lower trigger voltage and a higher holding voltage characteristic by using the zener diode structure. These characteristics prevent latch-up problem in normal operating conditions. The proposed circuit was analyzed to figure out the electrical characteristics by the variations of design parameters D1, D2 and stack technology to obtain the n-fold electrical characteristics. The simulations are accomplished by using the Synopsys TCAD simulator. When using the stack technology, 2-stack has the holding voltage of 6.9V and 3-stack has the holding voltage of 10.9V.

Keywords: ESD, SCR, trigger voltage, holding voltage

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Authors: Amit Kumar Sinha

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A coal preparation plant typically operates with multiple beneficiation circuits to process individual size fractions of coal obtained from mine so that the targeted overall plant efficiency in terms of yield and ash is achieved. Conventional coal beneficiation plant in India or overseas operates generally in two methods of processing; coarse beneficiation with treatment in dense medium cyclones or in baths and fines beneficiation with treatment in flotation cell. This paper seeks to address the proven application of intermediate circuit along with coarse and fines circuit in Jamadoba New Coal Preparation Plant of capacity 2 Mt/y to treat -0.5 mm+0.25 mm size particles in reflux classifier. Previously this size of particles was treated directly in Flotation cell which had operational and metallurgical limitations which will be discussed in brief in this paper. The paper also details test work results performed on the representative samples of TSL coal washeries to determine the top size of intermediate and fines circuit and discusses about the overlapping process of intermediate circuit and how it is process wise suitable to beneficiate misplaced particles from coarse circuit and fines circuit. This paper also compares the separation efficiency (Ep) of various intermediate circuit process equipment and tries to validate the use of reflux classifier over fine coal DMC or spirals. An overview of Modern coal preparation plant treating Indian coal especially Washery Grade IV coal with reference to Jamadoba New Coal Preparation Plant which was commissioned in 2018 with basis of selection of equipment and plant profile, application of reflux classifier in intermediate circuit and process design criteria is also outlined in this paper.

Keywords: intermediate circuit, overlapping process, reflux classifier

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Authors: Ali Mustafa Elshawesh, Mohamed Abdulali

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The paper presents an approach to dimension circuit switched networks and find the relationship between the parameters of the circuit switched networks on the condition of specific probability of call blocking. Our work is creating a Simulation code based on Erlang (B) formula to draw graphs which show two curves for each graph; one of simulation and the other of calculated. These curves represent the relationships between average number of calls and average call duration with the probability of call blocking. This simulation code facilitates to select the appropriate parameters for circuit switched networks.

Keywords: Erlang B formula, call blocking, telephone system dimension, Markov model, link capacity

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

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A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: high gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra series

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Authors: Jude Inwumoh, Adam P. R. Taylor, Kosala Gunawardane

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Modular multilevel converters (MMC) exhibit a highly scalable and modular characteristic with good voltage/power expansion, fault tolerance capability, low output harmonic content, good redundancy, and a flexible front-end configuration. Fault detection, location, and isolation, as well as maintaining fault ride-through (FRT), are major challenges to MMC reliability and power supply sustainability. Different papers have been reviewed to seek the best MMC configuration with fault capability. DC faults are the most common fault, while the probability that AC fault occurs in a modular multilevel converter (MCC) is low; though, AC faults consequence are severe. This paper reviews several MMC topologies and modulation techniques in tackling faults. These fault control strategies are compared based on cost, complexity, controllability, and power loss. A meshed network of half-bridge (HB) MMC topology was optimal in rendering fault ride through than any other MMC topologies but only when combined with DC circuit breakers (CBS), AC CBS, and fault current limiters (FCL).

Keywords: MMC-HVDC, DC faults, fault current limiters, control scheme

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Authors: J. Alvarez, J. Pimienta, R. Sarmiento

Abstract:

Diode lasers working in free mode present different shifting and broadening determined by external factors such as temperature, current or mechanical vibrations, and they are not more useful in applications such as spectroscopy, metrology, and cooling of atoms, among others. Different configurations can reduce the spectral width of a laser; one of the most effective is to extend the optical resonator of the laser diode and use optical feedback either with the help of a partially reflective mirror or with a diffraction grating; this latter configuration is not only allowed to reduce the spectral width of the laser line but also to coarsely adjust its working wavelength, within a wide range typically ~ 10nm by slightly varying the angle of the diffraction grating. Two settings are commonly used for this purpose, the Littrow configuration and the Littmann Metcalf. In this paper, we present the design, construction, and characterization of a compact extended laser cavity in Littrow configuration. The designed cavity is compact and was machined on an aluminum block using computer numerical control (CNC); it has a mass of only 380 g. The design was tested on laser diodes with different wavelengths, 650nm, 780nm, and 795 nm, but can be equally efficient at other wavelengths. This report details the results obtained from the extended cavity working at a wavelength of 780 nm, with an output power of around 35mW and a line width of less than 1Mhz. The cavity was used to observe the spectrum of the corresponding Rubidium D2 line. By modulating the current and with the help of phase detection techniques, a dispersion signal with an excellent signal-to-noise ratio was generated that allowed the stabilization of the laser to a transition of the hyperfine structure of Rubidium with an integral proportional controller (PI) circuit made with precision operational amplifiers.

Keywords: Littrow, Littman-Metcalf, line width, laser stabilization, hyperfine structure

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