Search results for: Sarvada Nand

Authors: Sorcha Bennett, Joe Sullivan

Abstract:

Triple-Level Cell (TLC) NAND Flash memory at, and below, 20nm (nanometer) is still largely unexplored by researchers, and with the ever more commonplace existence of Flash in consumer and enterprise applications there is a need for such gaps in knowledge to be filled. At the time of writing, there was little published data or literature on TLC, and more specifically reliability testing, with a further emphasis on both endurance and retention. This paper will give an introduction to NAND Flash memory, followed by an overview of the relevant current research on the reliability of Flash memory, along with the planned future work which will provide results to help characterise the reliability of TLC memory.

Keywords: endurance, patterns, raw flash, reliability, retention, TLC NAND flash memory, trade-off

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Authors: Xin Li, Ji-Yang Yu, Yue-Hua Niu, Lu-Yuan Wang

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As an inevitable chain of the space data acquirement system, space-borne storage system based on Nand Flash has gradually been implemented in spacecraft. In face of massive, parallel and varied data on board, efficient data management become an important issue of storage research. Face to the requirements of high-performance and reliability in Nand Flash storage system, a combination of hardware and file system design can drastically increase system dependability, even for missions with a very long duration. More sophisticated flash storage concepts with advanced operating systems have been researched to improve the reliability of Nand Flash storage system on satellites. In this paper, architecture of file system with multi-channel data acquisition and storage on board is proposed, which obtains large-capacity and high-performance with the combine of intra-channel pipeline and device partition in Nand Flash. Multi-channel data in different rate are stored as independent files with parallel-storage system in device partition, which assures the high-effective and reliable throughput of file treatments. For massive and high-speed data storage, an efficiency assessment model is established to calculate the bandwidth formula of intra-channel pipeline. Information tables designed in Magnetoresistive RAM (MRAM) hold the management of bad block in Nand Flash and the arrangement of file system address for the high-reliability of data storage. During the full-load test, the throughput of 3D PLUS Module 160Gb Nand Flash can reach 120Mbps for store and reach 120Mbps for playback, which efficiently satisfies the requirement of multi-channel data acquisition in Satellite. Compared with previous literature, the results of experiments verify the advantages of the proposed system.

Keywords: device partition architecture, intra-channel pipelining, nand flash, parallel storage

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Authors: Sarvada Nand

Abstract:

Teacher quality is directly proportional to the achievement level of students. Recent researches reveal that the teacher learning communities enhance the quality of teacher. It is a proven fact that community does help in enhancing teachers’ self-esteem as professionals, their teaching skills and enhancing classroom transaction that results in the higher achievement of students. The purpose of this study is to develop TLC and provide them platform where they share their views and ideas on various academic issues. The study examines how teachers conceptualize TLCs, up to what extent TLC help in developing professionalism among teachers and how they prepare themselves for the days to come. In this study, pre-test in five subjects, Hindi, English, Mathematics, Science and Social Studies was conducted and a questionnaire was designed to judge the teachers' attitude towards teaching practice. After completion of the project duration of three and a half-month, an exercise of post-test was conducted in all the above subjects. The post tests show tremendous improvements in achievement level of those students who were regular in their classes and were attended through this new method. A visible shift in teacher’s attitude is seen for the better. They were able to realize their own potentials. There was a group of Facilitators formed to perform continuously supervision and monitor in regular intervals so that they could easily handle the challenges, and factors much important for the attainment towards the fulfillment of the objectives.

Keywords: teacher learning communities, best practice, teacher professionalism, student achievement

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Authors: Satyasen Panda, Urmila Bhanja

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In this paper, we have presented and analyzed three-dimensional (3-D) matrices of wavelength/time/space code for optical code division multiple access (OCDMA) networks with NAND subtraction detection technique. The 3-D codes are constructed by integrating a two-dimensional modified quadratic congruence (MQC) code with one-dimensional modified prime (MP) code. The respective encoders and decoders were designed using fiber Bragg gratings and optical delay lines to minimize the bit error rate (BER). The performance analysis of the 3D-OCDMA system is based on measurement of signal to noise ratio (SNR), BER and eye diagram for a different number of simultaneous users. Also, in the analysis, various types of noises and multiple access interference (MAI) effects were considered. The results obtained with NAND detection technique were compared with those obtained with OR and AND subtraction techniques. The comparison results proved that the NAND detection technique with 3-D MQC\MP code can accommodate more number of simultaneous users for longer distances of fiber with minimum BER as compared to OR and AND subtraction techniques. The received optical power is also measured at various levels of BER to analyze the effect of attenuation.

Keywords: Cross Correlation (CC), Three dimensional Optical Code Division Multiple Access (3-D OCDMA), Spectral Amplitude Coding Optical Code Division Multiple Access (SAC-OCDMA), Multiple Access Interference (MAI), Phase Induced Intensity Noise (PIIN), Three Dimensional Modified Quadratic Congruence/Modified Prime (3-D MQC/MP) code

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Authors: K. Shaji Mon, P. R. John Sreenidhi

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In deep-submicrometer CMOS processes, time-domain resolution of a digital signal is becoming higher than voltage resolution of analog signals. This claim is nowadays pushing toward a new circuit design paradigm in which the traditional analog signal processing is expected to be progressively substituted by the processing of times in the digital domain. Within this novel paradigm, digitally controlled delay lines (DCDL) should play the role of digital-to-analog converters in traditional, analog-intensive, circuits. Digital delay locked loops are highly prevalent in integrated systems.The proposed paper addresses the glitches present in delay circuits along with area,power dissipation and signal integrity.The digitally controlled delay lines(DCDL) under study have been designed in a 90 nm CMOS technology 6 layer metal Copper Strained SiGe Low K Dielectric. Simulation and synthesis results show that the novel circuits exhibit no glitches for dual output coarse DCDL with less power dissipation and consumes less area compared to the glitch free NAND based DCDL.

Keywords: glitch free, NAND-based DCDL, CMOS, deep-submicrometer

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Authors: Jaechun No

Abstract:

This paper focuses on I/O optimizations of N-hybrid (New-Form of hybrid), which provides a hybrid file system space constructed on SSD and HDD. Although the promising potentials of SSD, such as the absence of mechanical moving overhead and high random I/O throughput, have drawn a lot of attentions from IT enterprises, its high ratio of cost/capacity makes it less desirable to build a large-scale data storage subsystem composed of only SSDs. In this paper, we present N-hybrid that attempts to integrate the strengths of SSD and HDD, to offer a single, large hybrid file system space. Several experiments were conducted to verify the performance of N-hybrid.

Keywords: SSD, data section, I/O optimizations, hybrid system

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Authors: Gaurav Upadhyay, Nand Kishore, Prashant Ranjan, V. S. Tripathi, Shivesh Tripathi

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A frequency reconfigurable multiband antenna for intelligent transportation system (ITS) applications is proposed in this paper. A PIN-diode is used for reconfigurability. Centre frequencies are 1.38, 1.98, 2.89, 3.86, and 4.34 GHz in “ON” state of Diode and 1.56, 2.16, 2.88, 3.91 and 4.45 GHz in “OFF” state. Achieved maximum bandwidth is 18%. The maximum gain of the proposed antenna is 2.7 dBi in “ON” state and 3.95 dBi in “OFF” state of the diode. The antenna is simulated, fabricated, and tested in the lab. Measured and simulated results are in good confirmation.

Keywords: ITS, multiband antenna, PIN-diode, reconfigurable

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Authors: Yiqiang Ni, Xuanlong Chen, Enliang Li, Linting Zheng, Shizheng Yang

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Bipolar ICs are playing an important role in military applications, mainly used in logic gates, such as inverter and NAND gate. The defect of metal break located on the step is one of the main failure mechanisms of bipolar ICs, resulting in open-circuit or functional failure. In this situation, general failure localization methods like optical beam-induced resistance change (OBIRCH) and photon emission microscopy (PEM) might not be fully effective. However, active voltage contrast (AVC) can be used as a voltage probe, which may pinpoint the incorrect potential and thus locate the failure position. Two case studies will be present in this paper on how to implement AVC for failure localization, and the detailed failure mechanism will be discussed.

Keywords: bipolar IC, failure localization, metal break, open failure, voltage contrast

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Authors: Gaurav Upadhyay, Nand Kishore, Prashant Ranjan, Shivesh Tripathi, V. S. Tripathi

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In this paper, a patch antenna array design is proposed for vehicular communication. The antenna consists of 2-element patch array. The antenna array is operating at multiple frequency bands. The multiband operation is achieved by use of slots at proper locations at the patch. The array is made reconfigurable by use of two PIN-diodes. The antenna is simulated and measured in four states of diodes i.e. ON-ON, ON-OFF, OFF-ON, and OFF-OFF. In ON-ON state of diodes, the resonant frequencies are 4.62-4.96, 6.50-6.75, 6.90-7.01, 7.34-8.22, 8.89-9.09 GHz. In ON-OFF state of diodes, the measured resonant frequencies are 4.63-4.93, 6.50-6.70 and 7.81-7.91 GHz. In OFF-ON states of diodes the resonant frequencies are 1.24-1.46, 3.40-3.75, 5.07-5.25 and 6.90-7.20 GHz and in the OFF-OFF state of diodes 4.49-4.75 and 5.61-5.98 GHz. The maximum bandwidth of the proposed antenna is 16.29%. The peak gain of the antenna is 3.4 dB at 5.9 GHz, which makes it suitable for vehicular communication.

Keywords: antenna, array, reconfigurable, vehicular

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Authors: Ravneil Nand

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Cooperative coevolution uses problem decomposition methods to solve a larger problem. The problem decomposition deals with breaking down the larger problem into a number of smaller sub-problems depending on their method. Different problem decomposition methods have their own strengths and limitations depending on the neural network used and application problem. In this paper we are introducing a new problem decomposition method known as Hidden-Neuron Level Decomposition (HNL). The HNL method is competing with established problem decomposition method in time series prediction. The results show that the proposed approach has improved the results in some benchmark data sets when compared to the standalone method and has competitive results when compared to methods from literature.

Keywords: cooperative coevaluation, feed forward network, problem decomposition, neuron, synapse

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Authors: Spyridon Nikolaidis

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A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, inverter modeling, transistor current mode, timing model

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Authors: Jae Young Park, Hwansu Jung, Jong Tae Kim

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Whether the data has been well parallelized is an important factor in the Solid-State-Drive (SSD) performance. SSD parallelization is affected by allocation scheme and it is directly connected to SSD performance. There are dynamic allocation and static allocation in representative allocation schemes. Dynamic allocation is more adaptive in exploiting write operation parallelism, while static allocation is better in read operation parallelism. Therefore, it is hard to select the appropriate allocation scheme when the workload is mixed read and write operations. We simulated conditions on a few mixed data patterns and analyzed the results to help the right choice for better performance. As the results, if data arrival interval is long enough prior operations to be finished and continuous read intensive data environment static allocation is more suitable. Dynamic allocation performs the best on write performance and random data patterns.

Keywords: dynamic allocation, NAND flash based SSD, SSD parallelism, static allocation

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Authors: Jaechun No

Abstract:

As the technology of NAND flash memory rapidly grows, SSD is becoming an excellent alternative for storage solutions, because of its high random I/O throughput and low power consumption. These SSD potentials have drawn great attention from IT enterprises that seek for better I/O performance. However, high SSD cost per capacity makes it less desirable to construct a large-scale storage subsystem solely composed of SSD devices. An alternative is to build a hybrid storage subsystem where both HDD and SSD devices are incorporated in an economic manner, while employing the strengths of both devices. This paper presents a hybrid file system, called hybridFS, that attempts to utilize the advantages of HDD and SSD devices, to provide a single, virtual address space by integrating both devices. HybridFS not only proposes an efficient implementation for the file management in the hybrid storage subsystem but also suggests an experimental framework for making use of the excellent features of existing file systems. Several performance evaluations were conducted to verify the effectiveness and suitability of hybridFS.

Keywords: hybrid file mapping, data layout, hybrid device integration, extent allocation

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Authors: Dishant Shahi, Aradhya Shandilya, Nand Kumar

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We study here the impact of the black component referred to as X component in the text on Real estate transactions. The X component involved not only acts as friction in transaction but also leads to dysfunctionality in the capital market of real estate. The effect of the component is presented by using a model of economy which seeks resemblance with that of India involving property deals. The rigidities which hinder smooth transactions in property or land deals are depicted and their impact on the economy as a whole has been modelled. The effect of subprime crisis (2007) on Indian housing capital market and the role which the X component played during it, is also included in one of the sections. In the entire text, we have utilised 4 Quadrant graphs to study supply and demand causalities involved in commercial real estate. At the end we have included the impact of demonetisation as a move to counter the problem of overvaluation in the property assets arising due to the X component. The case of Demonetisation which has been the latest move by the Indian Government to control huge amount of black money in circulation has been included along with its impact on the housing and rent as well as the capital market.

Keywords: X-component, 4Q graph, real estate, capital markets, demonetisation, consumer sentiments

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Authors: Shashi Arya, Nand L. Singh, Samiksha Singh, Pradeep K. Mishra, Siddh N. Upadhyay

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The enormous generation of E- waste and its recycling have greater environmental concern especially in developing countries like India. A major part of this waste comprises printed circuit boards (PCBs). Edge trims of PCBs have high copper content ranging between 25-60%. The extraction of various metals out of these PCBs is more or less a proven technology, wherein various hazardous chemicals are being used in the resource recovery, resulting into secondary pollution. The current trend of extracting of valuable metals is the utilization of microbial strains to eliminate the problem of a secondary pollutant. Keeping the above context in mind, this work aims at the enhanced recovery of copper from edge trims, through bioleaching using bacterial strain Acidithiobacillus ferrooxidans. The raw material such as motherboards, hard drives, floppy drives and DVD drives were obtained from the warehouse of the University. More than 90% copper could be extracted through bioleaching using Acidithiobacillus ferrooxidans. Inoculate concentration has merely insignificant effect over copper recovery above 20% inoculate concentration. Higher concentration of inoculation has the only initial advantage up to 2-4 days. The complete recovery has been obtained between 14- 24 days.

Keywords: acidithiobacillus ferrooxidans, bioleaching, e-waste, printed circuit boards

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Authors: Roshan Kamal Topno, Maneesh Kumar, Manas Ranjan Dikhit, Krishna Pandey, Major Madhukar, Vidhya Nand Rabidas, Vahab Ali, Ganesh Chandra Sahoo, Bhawana, Devendra Prasad Yadav, Rishikesh Kumar, Pradeep Das

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A diagnostic marker for asymptomatic subject becomes a crucial need for advocating early prophylactic majors to control protozoal infection. The main issue in epidemiological affected regions is the presence of an asymptomatic individual that might potentially convert to a symptomatic visceral leishmaniasis (VL). The epidemiological study has been conducted at highly VL endemic Moriyama village in Patna district, Bihar, India that covers total population of 1540 individuals. Here, 1104(74.02%) people had been randomly screened and only 46 (4.17%) asymptomatic individuals were found sero-positive by the rK39 test. After taking signed informed consent form, blood samples were collected from 46 asymptomatic subjects for further hematological and immunological tests. Total leukocyte count, hemoglobin (gm%), neutrophil, lymphocyte, platelet count and interleukin-10 (IL-10) had been included as diagnostic markers. Interestingly only 5 (10.86%) individuals showed their asymptomatic conversion into symptomatic VL patients during quarterly surveillance. In overall analysis only two markers are suggestive for disease conversion that is hemoglobin (gm%) and IL-10. In all the infected patients, both the mean decrease in hemoglobin and mean increase of IL-10 was 19.23% from its normal value. The results might suggest that hematological and immunological changes would become helpful for early diagnosis of asymptomatic to symptomatic VL conversion.

Keywords: asymptomatic, epidemiological, symptomatic visceral leishmaniasis, hemoglobin (gm%), interleukin-10, diagnosis

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Authors: Garima Joshi, Pratap Sharan, V. Sreenivas, Nand Kumar, Kameshwar Prasad, Ashima N. Wadhawan

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Schizophrenia is a debilitating disorder and is marked by cognitive impairment, which deleteriously impacts the social and professional functioning along with the quality of life of the patients and the caregivers. Often the cognitive symptoms are in their prodromal state and worsen as the illness progresses; they have proven to have a good predictive value for the prognosis of the illness. It has been shown that intensive cognitive rehabilitation (CR) leads to improvements in the healthy as well as cognitively-impaired subjects. As the majority of population in India falls in the lower to middle socio-economic status and have low education levels, using the existing packages, a majority of which are developed in the West, for cognitive rehabilitation becomes difficult. The use of technology is also restricted due to the high costs involved and the limited availability and familiarity with computers and other devices, which pose as an impedance for continued therapy. Cognitive rehabilitation in India uses a plethora of retraining methods for the patients with schizophrenia targeting the functions of attention, information processing, executive functions, learning and memory, and comprehension along with Social Cognition. Psychologists often have to follow an integrative therapy approach involving social skills training, family therapy and psychoeducation in order to maintain the gains from the cognitive rehabilitation in the long run. This paper reviews the methodologies and cognitive retaining programs used in India. It attempts to elucidate the evolution and development of methodologies used, from traditional paper-pencil based retraining to more sophisticated neuroscience-informed techniques in cognitive rehabilitation of deficits in schizophrenia as home-based or supervised and guided programs for cognitive rehabilitation.

Keywords: schizophrenia, cognitive rehabilitation, neuropsychological interventions, integrated approached to rehabilitation

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Authors: Ramesh Chand Chauhan, Sanjay Kumar Rai, Shashi kant, Rakesh Lodha, Nand Kumar

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Background: With a better understanding of HIV pathogenesis and availability of antiretroviral therapy more children are growing and entering in teenage group; informing children of their own HIV status has become an important aspect of long-term disease management. There is little evidence of how and when this type of disclosure takes place in a resource-limited setting. Methods: A cross-sectional study was conducted from June 2010 to May 2011 among a dyads of 156 HIV-infected children and their caregivers, those were visiting pediatric clinic at a tertiary care hospital in Delhi, India. The study protocol was approved by the Institute Ethics Committee. After taking written informed consent; pretested structured questionnaire was administered to caregivers during routine clinic visits. Information regarding socio-demographic characteristics, awareness of HIV infection status among children and their perception regarding disclosure was collected. Mean and frequencies were calculated and chi-square and logistic regression test were applied. Results: The mean age of children was 8.4 ±3.45 years. Among them 73.7% were male and 39.1% were orphans. Among 156 enrolled children, 74.4% (n=116) were of ≥ 6 years and were assessed for disclosure. Only 18.1% (n=21) children had been informed of their HIV status. Of those under 9 years, 6.4% knew their status, whereas 18.4% of 9-11 years and 35.5% of 12-14 years children knew they had HIV. Awareness among males (23.3%) was higher than females (3.3%). Both age and sex of child were significantly (p<0.01) associated with disclosure status. Other factors favoring disclosure were orphan-hood, non-perinatal mode of transmission (OR = 4.32; 95% CI 1.01-7.12), ART initiation (OR = 4.21; 95% CI 1.03-6.98), and caregiver educated beyond primary level (OR = 1.89; 95% CI 1.03-3.26). Repeated enquiry regarding the visit to clinic was the most common reason (66.6%) for disclosure. In 52.4% children disclosure was done with the involvement of other family members. 82.5% caregivers felt the age of > 10 years is appropriate for disclosing the HIV infection status to the child. Conclusion: Detailed guidelines on disclosure are required focusing on children of school-going age with perinatal infection who are not on ART and with caregivers of low educational status.

Keywords: HIV, children, India, disclosure

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Authors: Alok Kumar Yadav, Saurabh Saraswat, Preeti Sirohi, Manjoo Rani, Sameer Srivastava, Manish Pratap Singh, Nand K. Singh

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The development of antibiotic resistance in bacteria is increasing at an alarming rate, and this is considered as one of the most serious threats in the history of medicine, and an alternative solution should be derived so as to tackle this problem. In many countries, people use the medicinal plants for the treatment of various diseases as these are cheaper, easily available and least toxic. Syzygium cumini is used for the treatment of various kinds of diseases but their mechanism of action is not reported. The antimicrobial activity of Syzygium cumini was tested by the well diffusion assay and zone of inhibition was reported to be 20.06 mm as compared to control with MIC of 0.3 mg/ml. Genomic DNA fragmentation of Bacillus subtilis revealed apoptosis and FE-SEM indicate cell wall cracking on several intervals of time. Propidium iodide staining results showed that few bacterial cells were stained in the control and population of stained cells increase after exposing them for various period of time. Flow cytometric kinetic data analysis on the membrane permeabilization in bacterial cell showed the significant contribution of antimicrobial potential of the seed extract on antimicrobial-induced permeabilization. Two components of Syzygium cumini methanolic seed extract was found to be quite active against four enzymes like PDB ID- 1W5D, 4OX3, 3MFD and 5E2F which have a very crucial role in membrane synthesis in Bacillus subtilis by in silico analysis. Through in silico analysis, lupeol showed highest binding energy for macromolecule 1W5D and 4OX3 whereas stigmasterol showed the highest binding energy for macromolecule 3MFD and 5E2F respectively. It showed that methanolic seed extract of Syzygium cumini can be used for the inhibition of foodborne infections caused by Bacillus subtilis and also as an alternative of prevalent antibiotics.

Keywords: antibiotics, Bacillus subtilis, inhibition, Syzygium cumini

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Authors: Krishna Nand, Mohammad Taufik

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Fused Filament Fabrication (FFF) is one of the most popular additive manufacturing (AM) technology. In FFF technology, a wire form material (filament) is fed inside a heated chamber, where it gets converted into semi-solid form and extruded out of a nozzle to be deposited on the build platform to fabricate the part. FFF technology is expanding and covering the market at a very rapid rate, so the need of raw materials for 3D printing is also increasing. The cost of 3D printing is directly affected by filament cost. To make 3D printing more economic, a compact and portable filament/wire extrusion system is needed. Wire extrusion systems to extrude ordinary wire/filament made of a single material are available in the market. However, extrusion system to make a composite wire/filament are not available. Hence, in this study, initial efforts have been made to develop a table-top composite wire extruder. The developed system is consisted of mechanical parts, electronics parts, and a control system. A multiple channel hopper, extrusion screw, melting chamber and nozzle, cooling zone, and spool winder are some mechanical parts. While motors, heater, temperature sensor, cooling fans are some electronics parts, which are used to develop this system. A control board has been used to control the various process parameters like – temperature and speed of motors. For the production of composite wire/filament, two different materials could be fed through two channels of hopper, which will be mixed and carried to the heated zone by extrusion screw. The extrusion screw is rotated by a motor, and the speed of this motor will be controlled by the controller as per the requirement of material extrusion rate. In the heated zone, the material will melt with the help of a heating element and extruded out of the nozzle in the form of wire. The developed system occupies less floor space due to the vertical orientation of its heating chamber. It is capable to extrude ordinary filament as well as composite filament, which are compatible with 3D printers available in the market. Further, the developed system could be employed in the research and development of materials, processing, and characterization for 3D printer. The developed system presented in this study could be a better choice for hobbyists and researchers dealing with the fused filament fabrication process to reduce the 3D printing cost significantly by recycling the waste material into 3D printer feed material. Further, it could also be explored as a better alternative for filament production at the commercial level.

Keywords: additive manufacturing, 3D Printing, filament extrusion, pellet extrusion

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Authors: Mohd Azman Abdul Latif, Erwan Basiron

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A flaw or drift from expected operational performance in one component (NAND, PMIC, controller, DRAM, etc.) may affect the reliability of the entire Solid State Drive (SSD) system. Therefore, it is important to ensure the required quality of each individual component through qualification testing specified using standards or user requirements. Qualification testing is time-consuming and comes at a substantial cost for product manufacturers. A highly technical team, from all the eminent stakeholders is embarking on reliability prediction from beginning of new product development, identify critical to reliability parameters, perform full-blown characterization to embed margin into product reliability and establish control to ensure the product reliability is sustainable in the mass production. The paper will discuss a comprehensive development framework, comprehending SSD end to end from design to assembly, in-line inspection, in-line testing and will be able to predict and to validate the product reliability at the early stage of new product development. During the design stage, the SSD will go through intense reliability margin investigation with focus on assembly process attributes, process equipment control, in-process metrology and also comprehending forward looking product roadmap. Once these pillars are completed, the next step is to perform process characterization and build up reliability prediction modeling. Next, for the design validation process, the reliability prediction specifically solder joint simulator will be established. The SSD will be stratified into Non-Operating and Operating tests with focus on solder joint reliability and connectivity/component latent failures by prevention through design intervention and containment through Temperature Cycle Test (TCT). Some of the SSDs will be subjected to the physical solder joint analysis called Dye and Pry (DP) and Cross Section analysis. The result will be feedbacked to the simulation team for any corrective actions required to further improve the design. Once the SSD is validated and is proven working, it will be subjected to implementation of the monitor phase whereby Design for Assembly (DFA) rules will be updated. At this stage, the design change, process and equipment parameters are in control. Predictable product reliability at early product development will enable on-time sample qualification delivery to customer and will optimize product development validation, effective development resource and will avoid forced late investment to bandage the end-of-life product failures. Understanding the critical to reliability parameters earlier will allow focus on increasing the product margin that will increase customer confidence to product reliability.

Keywords: e2e reliability prediction, SSD, TCT, solder joint reliability, NUDD, connectivity issues, qualifications, characterization and control

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Authors: Shreeyam, Ranjan Kumar Sah, Shivangi

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Recognizing and solving handwritten mathematical expressions can be a challenging task, particularly when certain characters are segmented and classified. This project proposes a solution that uses Convolutional Neural Network (CNN) and image processing techniques to accurately solve various types of equations, including arithmetic, quadratic, and trigonometric equations, as well as logical operations like logical AND, OR, NOT, NAND, XOR, and NOR. The proposed solution also provides a graphical solution, allowing users to visualize equations and their solutions. In addition to equation solving, the platform, called CNNCalc, offers a comprehensive learning experience for students. It provides educational content, a quiz platform, and a coding platform for practicing programming skills in different languages like C, Python, and Java. This all-in-one solution makes the learning process engaging and enjoyable for students. The proposed methodology includes horizontal compact projection analysis and survey for segmentation and binarization, as well as connected component analysis and integrated connected component analysis for character classification. The compact projection algorithm compresses the horizontal projections to remove noise and obtain a clearer image, contributing to the accuracy of character segmentation. Experimental results demonstrate the effectiveness of the proposed solution in solving a wide range of mathematical equations. CNNCalc provides a powerful and user-friendly platform for solving equations, learning, and practicing programming skills. With its comprehensive features and accurate results, CNNCalc is poised to revolutionize the way students learn and solve mathematical equations. The platform utilizes a custom-designed Convolutional Neural Network (CNN) with image processing techniques to accurately recognize and classify symbols within handwritten equations. The compact projection algorithm effectively removes noise from horizontal projections, leading to clearer images and improved character segmentation. Experimental results demonstrate the accuracy and effectiveness of the proposed solution in solving a wide range of equations, including arithmetic, quadratic, trigonometric, and logical operations. CNNCalc features a user-friendly interface with a graphical representation of equations being solved, making it an interactive and engaging learning experience for users. The platform also includes tutorials, testing capabilities, and programming features in languages such as C, Python, and Java. Users can track their progress and work towards improving their skills. CNNCalc is poised to revolutionize the way students learn and solve mathematical equations with its comprehensive features and accurate results.

Keywords: AL, ML, hand written equation solver, maths, computer, CNNCalc, convolutional neural networks

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