Search results for: circuit design

Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

Abstract:

A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: bridgeless boost (BLB), boost converter, power factor correction (PFC), hold-up time

Procedia PDF Downloads 387

Authors: Himanshu J. Bahirat, Apoorva S. Janawlekar

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Plasma actuators are essential for aerodynamic flow separation control due to their lack of mechanical parts, lightweight, and high response frequency, which have numerous applications in hypersonic or supersonic aircraft. The working of these actuators is based on the formation of a low-temperature plasma between a pair of parallel electrodes by the application of a high-voltage AC signal across the electrodes, after which air molecules from the air surrounding the electrodes are ionized and accelerated through the electric field. The high-frequency operation is required in dielectric discharge barriers to ensure plasma stability. To carry out flow separation control in a hypersonic flow, the optimal design and construction of a power supply to generate dielectric barrier discharges is carried out in this paper. In this paper, it is aspired to construct a simplified circuit topology to emulate the dielectric barrier discharge and study its various frequency responses. The power supply can generate high voltage pulses up to 20kV at the repetitive frequency range of 20-50kHz with an input power of 500W. The power supply has been designed to be short circuit proof and can endure variable plasma load conditions. Its general outline is to charge a capacitor through a half-bridge converter and then later discharge it through a step-up transformer at a high frequency in order to generate high voltage pulses. After simulating the circuit, the PCB design and, eventually, lab tests are carried out to study its effectiveness in controlling flow separation.

Keywords: aircraft propulsion, dielectric barrier discharge, flow separation control, power source

Procedia PDF Downloads 99

Authors: Mesbah Tarek, Kelaiaia Samia, Chiheb Sofien, Kelaiaia Mounia Samira, Labar Hocine

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As every power systems short circuit failure can occur for HVDC at the DC link. So, the power devices should be protected against over heath produced by this over-current. This can be achieved through the power switchers or fast breaker. After short circuit the system is unable to restart, only after a time delay, because of the potential distribution along the DC link line. An appropriate fast and safety control is proposed and tested successfully. The detailed development and discussion of these faults is presented in this paper.

Keywords: HVDC, DC link, switchers, short circuit, faults

Procedia PDF Downloads 551

Authors: Daniel O. Johnson, Abiodun A. Ogunseye, Aaron Aransiola, Majors Samuel

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Power Inverter is a very important device in renewable energy use particularly for solar photovoltaic power application because it is the effective interface between the DC power generator and the load or the grid. Transformerless inverter is getting more and more preferred to the power converter with galvanic isolation transformer and may eventually supplant it. Transformerless inverter offers advantages of improved DC to AC conversion and power delivery efficiency; and reduced system cost, weight and complexity. This work presents thorough analysis of the design and prototyping of 3KVA grid-tie transformerless inverter. The inverter employs electronic switching method with minimised heat generation in the system and operates based on the principle of pulse-width modulation (PWM). The design is such that it can take two inputs, one from PV arrays and the other from Battery Energy Storage BES and addresses the safety challenge of leakage current. The inverter system was designed around microcontroller system, modeled with Proteus® software for simulation and testing of the viability of the designed inverter circuit. The firmware governing the operation of the grid-tied inverter is written in C language and was developed using MicroC software by Mikroelectronica® for writing sine wave signal code for synchronization to the grid. The simulation results show that the designed inverter circuit performs excellently with very high efficiency, good quality sinusoidal output waveform, negligible harmonics and gives very stable performance under voltage variation from 36VDC to 60VDC input. The prototype confirmed the simulated results and was successfully synchronized with the utility supply. The comprehensive analyses of the circuit design, the prototype and explanation on overall performance will be presented.

Keywords: grid-tied inverter, leakage current, photovoltaic system, power electronic, transformerless inverter

Procedia PDF Downloads 264

Authors: Abdelmonaem Ayachi, Belgacem Hamdi

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This paper presents a fault-tolerant implementation for adder schemes using the dual duplication code. To prove the efficiency of the proposed method, the circuit is simulated in double pass transistor CMOS 32nm technology and some transient faults are voluntary injected in the Layout of the circuit. This fully differential implementation requires only 20 transistors which mean that the proposed design involves 28.57% saving in transistor count compared to standard CMOS technology.

Keywords: digital electronics, integrated circuits, full adder, 32nm CMOS tehnology, double pass transistor technology, fault toleance, self-checking

Procedia PDF Downloads 319

Authors: Sherif Keddis, Mohamed Azzam, Norbert Schwesinger

Abstract:

Harvesting mechanical energy from footsteps or other impacts is a possibility to enable wireless autonomous sensor nodes. These can be used for a highly efficient control of connected devices such as lights, security systems, air conditioning systems or other smart home applications. They can also be used for accurate location or occupancy monitoring. Converting the mechanical energy into useful electrical energy can be achieved using the piezoelectric effect offering simple harvesting setups and low deflections. The challenge facing piezoelectric transducers is the achievable amount of energy per impact in the lower mJ range and the management of such low energies. Simple setups for energy extraction such as a full wave bridge connected directly to a capacitor are problematic due to the mismatch between high impedance sources and low impedance storage elements. Efficient energy circuits for piezoelectric harvesters are commonly designed for vibration harvesters and require periodic input energies with predictable frequencies. Due to the sporadic nature of impact harvesters, such circuits are not well suited. This paper presents a self-powered circuit that avoids the impedance mismatch during energy extraction by disconnecting the load until the source reaches its charge peak. The switch is implemented with passive components and works independent from the input frequency. Therefore, this circuit is suited for impact harvesting and sporadic inputs. For the same input energy, this circuit stores 150% of the energy in comparison to a directly connected capacitor to a bridge rectifier. The total efficiency, defined as the ratio of stored energy on a capacitor to available energy measured across a matched resistive load, is 63%. Although the resulting energy is already sufficient to power certain autonomous applications, further optimization of the circuit are still under investigation in order to improve the overall efficiency.

Keywords: autonomous sensors, circuit design, energy harvesting, energy management, impact harvester, piezoelectricity

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Authors: Hamdi Belgacem, Fradi Aymen

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In this paper we present a low power, low cost differential logic unit (LU). The proposed LU receives dual-rail inputs and generates dual-rail outputs. The proposed circuit can be used in Arithmetic and Logic Units (ALU) of processor. It can be also dedicated for self-checking applications based on dual duplication code. Four logic functions as well as their inverses are implemented within a single Logic Unit. The hardware overhead for the implementation of the proposed LU is lower than the hardware overhead required for standard LU implemented with standard CMOS logic style. This new implementation is attractive as fewer transistors are required to implement important logic functions. The proposed differential logic unit can perform 8 Boolean logical operations by using only 16 transistors. Spice simulations using a 32 nm technology was utilized to evaluate the performance of the proposed circuit and to prove its acceptable electrical behaviour.

Keywords: differential logic unit, double pass transistor logic, low power CMOS design, low cost CMOS design

Procedia PDF Downloads 426

Authors: Wirat Sonchan, Pratoom Moungmee, Anek Sootmongkol

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This study aimed to examine the effects of a circuit training program on muscle strength, agility, anaerobic performance and cardiovascular endurance. The study involved 24 freshmen (age 18.87+0.68 yr.) male students of the Faculty of Sport Science, Burapha University. They sample study were randomly divided into two groups: Circuit Training group (CT; n=12) and a Control group (C; n=12). Baseline data on height, weight, muscle strength (hand grip dynamometer and leg strength dynamometer), agility (agility T-Test), and anaerobic performance (Running-based Anaerobic Sprint Test) and cardiovascular endurance (20 m Endurance Shuttle Run Test) were collected. The circuit training program included one circuit of eight stations of 30/60 seconds of work/rest interval with two cycles in Week 1-4, and 60/90 seconds of work/rest interval with three cycles in Week 5-8, performed three times per week. Data were analyzed using paired t-tests and independent sample t-test. Statistically significance level was set at 0.05. The results show that after 8 weeks of a training program, muscle strength, agility, anaerobic capacity and cardiovascular endurance increased significantly in the CT Group (p < 0.05), while significant increase was not observed in the C Group (p < 0.05). The results of this study suggest that the circuit training program improved muscle strength, agility, anaerobic capacity and cardiovascular endurance of the study subjects. This program may be used as a guideline for selecting a set of exercise to improve physical fitness.

Keywords: circuit training, physical fitness, cardiovascular endurance, anaerobic performance

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Authors: Po-Hui Yang, Jing-Min Chen, Po-Yu Kuo, Chia-Chun Wu

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This paper proposed a high resolution Vernier Delay Line (VDL) measurement circuit with coarse and fine detection mechanism, which improved the trade-off problem between high resolution and less delay cells in traditional VDL circuits. And the measuring time of proposed measurement circuit is also under the high resolution requests. At first, the testing range of input signal which proposed high resolution delay line is detected by coarse detection VDL. Moreover, the delayed input signal is transmitted to fine detection VDL for measuring value with better accuracy. This paper is implemented at 0.18μm process, operating frequency is 100 MHz, and the resolution achieved 2.0 ps with only 16-stage delay cells. The test range is 170ps wide, and 17% stages saved compare with traditional single delay line circuit.

Keywords: vernier delay line, D-type flip-flop, DFF, metastable phenomenon

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Authors: D. Touil, L. Ouadah

Abstract:

An industrial model of cement grinding circuit is proposed on the basis of sampling surveys undertaken in the Meftah cement plant in Algiers, Algeria. The ball mill is described by a series of equal fully mixed stages that incorporates the effect of air sweeping. The kinetic parameters of this material in the energy normalized form obtained using the data of batch dry ball milling are taken into account in developing the present scale-up procedure. The dynamic separator is represented by the air classifier selectivity equation corrected by empirical factors. The model is incorporated in computer program that predict full size distributions and mass flow rates for all streams in a circuit under a particular set of operating conditions.

Keywords: grinding circuit, clinker, cement, modeling, population balance, energy

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Authors: Madina Hamiane

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Modelling and simulation of an analogy function generator is presented based on a polynomial expansion model. The proposed function generator model is based on a 10th order polynomial approximation of any of the required functions. The polynomial approximations of these functions can then be implemented using basic CMOS circuit blocks. In this paper, a circuit model is proposed that can simultaneously generate many different mathematical functions. The circuit model is designed and simulated with HSPICE and its performance is demonstrated through the simulation of a number of non-linear functions.

Keywords: modelling and simulation, analog function generator, polynomial approximation, CMOS transistors

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Authors: Hafiz Md. Hasan Babu, Khandaker Mohammad Mohi Uddin, Nitish Biswas, Sarreha Tasmin Rikta, Nuzmul Hossain Nahid

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Nanomedicine and bioengineering use biological systems that can perform computing operations. In a biocomputational circuit, different types of biomolecules and DNA (Deoxyribose Nucleic Acid) are used as active components. DNA computing has the capability of performing parallel processing and a large storage capacity that makes it diverse from other computing systems. In most processors, the multiplier is treated as a core hardware block, and multiplication is one of the time-consuming and lengthy tasks. In this paper, cost-effective DNA multipliers are designed using algorithms of molecular DNA operations with respect to conventional ones. The speed and storage capacity of a DNA multiplier are also much higher than a traditional silicon-based multiplier.

Keywords: biological systems, DNA multiplier, large storage, parallel processing

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Authors: Florian Kleber, Martin Kampel

Abstract:

The increasing demand of gallium, indium and rare-earth elements for the production of electronics, e.g. solid state-lighting, photovoltaics, integrated circuits, and liquid crystal displays, will exceed the world-wide supply according to current forecasts. Recycling systems to reclaim these materials are not yet in place, which challenges the sustainability of these technologies. This paper proposes a multispectral imaging system as a basis for a vision based recognition system for valuable components of electronics waste. Multispectral images intend to enhance the contrast of images of printed circuit boards (single components, as well as labels) for further analysis, such as optical character recognition and entire printed circuit board recognition. The results show that a higher contrast is achieved in the near infrared compared to ultraviolet and visible light.

Keywords: electronics waste, multispectral imaging, printed circuit boards, rare-earth elements

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Authors: Hyeong-Gyu Park, Hak-Gon Noh, Beom-Soo Kang, Jeong Kim

Abstract:

Electromagnetic forming (EMF) process is one of a high-speed forming process, which uses an electromagnetic body (Lorentz) force to deform work-piece. Advantages of EMF are summarized as improvement of formability, reduction in wrinkling, non-contact forming. In this study, the spiral coil is considered to evaluate formability in terms of pressure distribution of the forming process. It also is represented forming results of numerical analysis using ANSYS code. In the numerical simulation, RLC circuit coupled with spiral coil was made to consider the design parameters such as system input current and electromagnetic force. The simulation results show that even though input peak currents level are same level in each case, forming condition is certainly different because of frequency of input current and magnitude of current density and magnetic flux density. Finally, the simulation results appear that electromagnetic forming force apparently affected by input current frequency which determines magnitude of current density and magnetic flux density.

Keywords: electromagnetic forming, high-speed forming, RLC circuit, Lorentz force

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Authors: Manuel Meranza-Castillon, Rolando Diaz-Castillo, Adrian Arellano-Delgado, Cesar Cruz-Hernandez, Rosa Martha Lopez-Gutierrez

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In this work, we deal with experimental network synchronization of chaotic nodes with different topologies. Our approach is based on complex system theory, and we use a master-slave configuration to couple the nodes in the networks. In particular, we design and implement electronically complex dynamical networks composed by nine coupled chaotic Chua’s circuits with topologies: in nearest-neighbor, small-world, open ring, star, and global. Also, network synchronization is evaluated according to a particular coupling strength for each topology. This study is important by the possible applications to private transmission of information in a chaotic communication network of multiple users.

Keywords: complex networks, Chua's circuit, experimental synchronization, multiple users

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Authors: Chun-Ming Huang, Yi-Jun Liu, Yi-Jie Hsieh, Jin-Ju Chue, Wei-Lin Lai, Chun-Yu Chen, Chih-Chyau Yang, Chien-Ming Wu

Abstract:

The market of wearable devices has been growing rapidly in two years. The integration of sensors and wearable devices has become the trend of the next technology products. Thus, the academics and industries are eager to cultivate talented persons in sensing technology. Currently, academic and industries have more and more demands on the integrations of versatile sensors and applications, especially for the teams who focus on the development of sensor circuit architectures. These teams tape-out many MEMs sensors chips through the chip fabrication service from National Chip Implementation Center (CIC). However, most of these teams are only able to focus on the circuit design of MEMs sensors; they lack the key support of further system demonstration. This paper follows the CIC’s main mission of promoting the chip/system advanced design technology and aims to establish the environments of the modularized sensing system platform and the system design flow with the measurement and calibration technology. These developed environments are used to support these research teams and help academically advanced sensor designs to perform the system demonstration. Thus, the research groups can promote and transfer their advanced sensor designs to industrial and further derive the industrial economic values. In this paper, the modularized sensing platform is proposed to enable the system demonstration for advanced sensor chip design. The environment of sensor measurement and calibration is established for academic to achieve an accurate sensor result. Two reference sensor designs cooperated with the modularized sensing platform are given to show the sensing system integration and demonstration. These developed environments and platforms are currently provided to academics in Taiwan, and so that the academics can obtain a better environment to perform the system demonstration and improve the research and teaching quality.

Keywords: modularized sensing platform, sensor design and calibration, sensor system, sensor system design flow

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Authors: Jun Yu, Yat-Hei Lam, Boris Grinberg, Kevin Chai Tshun Chuan

Abstract:

This paper presents a 5-V to 30-V current-mode boost converter for powering the drive circuit of a micro-electro-mechanical sensor. The design of a transconductance amplifier and an integrated current sensing circuit are presented. In addition, essential building blocks for power-on protection such as a soft-start and clamp block and supply and clock ready block are discussed in details. The chip is fabricated in a 0.18-μm CMOS process. Measurement results show that the soft-start and clamp block can effectively limit the inrush current during startup and protect the boost converter from startup failure.

Keywords: boost converter, current sensing, power-on protection, step-up converter, soft-start

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Authors: Chih Chin Yang, Chung Shan Sun

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In this paper, the relationships between professional competences and school curricula in IC design industry are explored. The semi-structured questionnaire survey and focus group interview is the research method. Study participants are graduates of microelectronics engineering professional departments who are currently employed in the IC industry. The IC industries are defined as the electronic component manufacturing industry and optical-electronic component manufacturing industry in the semiconductor industry and optical-electronic material devices, respectively. Study participants selected from IC design industry include IC engineering and electronic & semiconductor engineering. The human training with IC design professional competence in microelectronics engineering professional departments is explored in this research. IC professional competences of human resources in the IC design industry include general intelligence and professional intelligence.

Keywords: IC design, curricula, competence, task, duty

Procedia PDF Downloads 356

Authors: R. A. Qawasma, F. M. Haddad, H. O. Salhab

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Hemodialysis is a life-preserving treatment for a number of patients with kidney failure. The standard procedure of hemodialysis is three times a week during the hemodialysis procedure, the patient usually suffering from many inconvenient, exhausting feeling and effect on the heart and cardiovascular system are the most common signs. This paper provides a solution to reduce the previous problems by designing a wearable artificial kidney (WAK) taking in consideration a minimization the size of the dialysis machine. The WAK system consists of two circuits: blood circuit and dialysate circuit. The blood from the patient is filtered in the dialyzer before returning back to the patient. Several parameters using an advanced microcontroller and array of sensors. WAK equipped with visible and audible alarm system to aware the patients if there is any problem.

Keywords: artificial kidney, home dialysis, renal failure, wearable kidney

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Authors: Kittipong Tripetch, Nobuhiko Nakano

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This paper proposes one stage and two stage CMOS Complementary Regulated Cascode Distributed Amplifier (CRCDA) design based on Inductive and Transformer coupling techniques. Usually, Distributed amplifier is based on inductor coupling between gate and gate of MOSFET and between drain and drain of MOSFET. But this paper propose some new idea, by coupling with differential primary windings of transformer between gate and gate of MOSFET first stage and second stage of regulated cascade amplifier and by coupling with differential secondary windings transformer of MOSFET between drain and drain of MOSFET first stage and second stage of regulated cascade amplifier. This paper also proposes polynomial modeling of Silicon Transformer passive equivalent circuit from Nanyang Technological University which is used to extract frequency response of transformer. Cadence simulation results are used to verify validity of transformer polynomial modeling which can be used to design distributed amplifier without Cadence. 4 parameters of scattering matrix of 2 port of the propose circuit is derived as a function of 4 parameters of impedance matrix.

Keywords: CMOS regulated cascode distributed amplifier, silicon transformer modeling with polynomial, low power consumption, distribute amplification technique

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Authors: Yasunori Kobori, Li Quan, Shu Wu, Nizam Mohyar, Zachary Nosker, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

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This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors which capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the typical current of 350 mA. We are now making the proposed circuit on a universal board in order to measure the experimental characteristics.

Keywords: LED driver, electrolytic, capacitor-less, AC-DC converter, buck-boost converter, current ripple canceller

Procedia PDF Downloads 447

Authors: Wenjun Hou, Marek Perkowski

Abstract:

The Traveling Salesman problem is famous in computing and graph theory. In short, it asks for the Hamiltonian cycle of the least total weight in a given graph with N nodes. All variations on this problem, such as those with K-bounded-degree nodes, are classified as NP-complete in classical computing. Although several papers propose theoretical high-level designs of quantum algorithms for the Traveling Salesman Problem, no quantum circuit implementation of these algorithms has been created up to our best knowledge. In contrast to previous papers, the goal of this paper is not to optimize some abstract complexity measures based on the number of oracle iterations, but to be able to evaluate the real circuit and time costs of the quantum computer. Using the emerging quantum programming language Q# developed by Microsoft, which runs quantum circuits in a quantum computer simulation, an implementation of the bounded-degree problem and its respective quantum circuit were created. To apply Grover’s algorithm to this problem, a quantum oracle was designed, evaluating the cost of a particular set of edges in the graph as well as its validity as a Hamiltonian cycle. Repeating the Grover algorithm with an oracle that finds successively lower cost each time allows to transform the decision problem to an optimization problem, finding the minimum cost of Hamiltonian cycles. N log₂ K qubits are put into an equiprobablistic superposition by applying the Hadamard gate on each qubit. Within these N log₂ K qubits, the method uses an encoding in which every node is mapped to a set of its encoded edges. The oracle consists of several blocks of circuits: a custom-written edge weight adder, node index calculator, uniqueness checker, and comparator, which were all created using only quantum Toffoli gates, including its special forms, which are Feynman and Pauli X. The oracle begins by using the edge encodings specified by the qubits to calculate each node that this path visits and adding up the edge weights along the way. Next, the oracle uses the calculated nodes from the previous step and check that all the nodes are unique. Finally, the oracle checks that the calculated cost is less than the previously-calculated cost. By performing the oracle an optimal number of times, a correct answer can be generated with very high probability. The oracle of the Grover Algorithm is modified using the recalculated minimum cost value, and this procedure is repeated until the cost cannot be further reduced. This algorithm and circuit design have been verified, using several datasets, to generate correct outputs.

Keywords: quantum computing, quantum circuit optimization, quantum algorithms, hybrid quantum algorithms, quantum programming, Grover’s algorithm, traveling salesman problem, bounded-degree TSP, minimal cost, Q# language

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Authors: Peter A. L’vov, Roman S. Konovalov, Alexey A. L’vov

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The paper presents the advanced digital modification of the conventional current loop circuit for pressure piezoelectric transducers. The optimal DSP algorithms of current loop responses by the maximum likelihood method are applied for diminishing of measurement errors. The loop circuit has some additional advantages such as the possibility to operate with any type of resistance or reactance sensors, and a considerable increase in accuracy and quality of measurements to be compared with AC bridges. The results obtained are dedicated to replace high-accuracy and expensive measuring bridges with current loop circuits.

Keywords: current loop, maximum likelihood method, optimal digital signal processing, precise pressure measurement

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Authors: Nasser Ghassembaglou, Armin Rahmatfam, Faramarz Ranjbar

Abstract:

Using of cold EGR method with variable venturi and turbocharger has a very significant affection on the reduction of NOX and grime simultaneously. EGR cooler is one of the most important parts in the cold EGR circuit. In this paper optimum design of cooler for working in different percents of EGR and for determining of optimum temperature of exhausted gases, growth of efficiency, reduction of weight, reduction of dimension and expenditures, and reduction of sediment and optimum performance by using gas oil which has significant amounts of brimstone are investigated and optimized.

Keywords: cold EGR, NOX, cooler, gas oil

Procedia PDF Downloads 465

Authors: G. S. Ayyappan, Srinivas Kota, Jaffer R. C. Sheriff, C. Prakash Chandra Joshua

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In the present scenario of energy crises, energy conservation in the electrical machines is very important in the industries. In order to conserve energy, one needs to monitor the performance of an induction motor on-site and in-situ. The instruments available for this purpose are very meager and very expensive. This paper deals with the design and development of induction motor performance analyser on-line, on-site, and in-situ. The system measures only few electrical input parameters like input voltage, line current, power factor, frequency, powers, and motor shaft speed. These measured data are coupled to name plate details and compute the operating efficiency of induction motor. This system employs the method of computing motor losses with the help of equivalent circuit parameters. The equivalent circuit parameters of the concerned motor are estimated using the developed algorithm at any load conditions and stored in the system memory. The developed instrument is a reliable, accurate, compact, rugged, and cost-effective one. This portable instrument could be used as a handy tool to study the performance of both slip ring and cage induction motors. During the analysis, the data can be stored in SD Memory card and one can perform various analyses like load vs. efficiency, torque vs. speed characteristics, etc. With the help of the developed instrument, one can operate the motor around its Best Operating Point (BOP). Continuous monitoring of the motor efficiency could lead to Life Cycle Assessment (LCA) of motors. LCA helps in taking decisions on motor replacement or retaining or refurbishment.

Keywords: energy conservation, equivalent circuit parameters, induction motor efficiency, life cycle assessment, motor performance analysis

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Authors: Ambuj Kumar, Sunil Kumar Singh, Shrikant Singh, Zakir Husain, R. K. Jarial

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Sweep frequency response analysis has been turning out a powerful tool for investigation of mechanical as well as electrical integration of transformers. In this paper various aspect of practical application of SFRA has been studied. Open circuit and short circuit measurement were done on different phases of high voltage and low voltage winding. A case study was presented for the transformer of rating 31.5 MVA for various frequency ranges. A clear picture was presented for sub- frequency ranges for HV as well as LV winding. The main motive of work is to investigate high voltage short circuit response. The theoretical concept about SFRA responses is validated with expert system software results.

Keywords: transformer winding, SFRA, OCT & SCT, frequency deviation

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Authors: J. H. Kim, J. H. Kwon, J. S. Park, K. J. Lim

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This paper has investigated a technique that predicts the performance of a bar-type unimorph piezoelectric vibration actuator depending on the frequency. This paper has been proposed an equivalent circuit that can be easily analyzed for the bar-type unimorph piezoelectric vibration actuator. In the dynamic analysis, rigidity and resonance frequency, which are important mechanical elements, were derived using the basic beam theory. In the equivalent circuit analysis, the displacement and bandwidth of the piezoelectric vibration actuator depending on the frequency were predicted. Also, for the reliability of the derived equations, the predicted performance depending on the shape change was compared with the result of a finite element analysis program.

Keywords: actuator, piezoelectric, performance, unimorph

Procedia PDF Downloads 445

Authors: Enrico Dorigatti

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The growing pile of hazardous e-waste produced especially by those developed and wealthy countries gets relentlessly bigger, composed of the EEDs (Electric and Electronic Device) that are often thrown away although still well functioning, mainly due to (programmed) obsolescence. As a consequence, e-waste has taken, over the last years, the shape of a frightful, uncontrollable, and unstoppable phenomenon, mainly fuelled by market policies aiming to maximize sales—and thus profits—at any cost. Against it, governments and organizations put some efforts in developing ambitious frameworks and policies aiming to regulate, in some cases, the whole lifecycle of EEDs—from the design to the recycling. Incidentally, however, such regulations sometimes make the disposal of the devices economically unprofitable, which often translates into growing illegal e-waste trafficking—an activity usually undertaken by criminal organizations. It seems that nothing, at least in the near future, can stop the phenomenon of e-waste production and accumulation. But while, from a practical standpoint, a solution seems hard to find, much can be done regarding people's education, which translates into informing and promoting good practices such as reusing and repurposing. This research argues that circuit bending—an activity rooted in neo-materialist philosophy and post-digital aesthetic, and based on repurposing EEDs into novel music instruments and sound generators—could have a great potential in this. In particular, it asserts that circuit bending could expose ecological, environmental, and social criticalities related to the current market policies and economic model. Not only thanks to its practical side (e.g., sourcing and repurposing devices) but also to the artistic one (e.g., employing bent instruments for ecological-aware installations, performances). Currently, relevant literature and debate lack interest and information about the ecological aspects and implications of the practical and artistic sides of circuit bending. This research, therefore, although still at an early stage, aims to fill in this gap by investigating, on the one side, the ecologic potential of circuit bending and, on the other side, its capacity of sensitizing people, through artistic practice, about e-waste-related issues. The methodology will articulate in three main steps. Firstly, field research will be undertaken—with the purpose of understanding where and how to source, in an ecologic and sustainable way, (discarded) EEDs for circuit bending. Secondly, artistic installations and performances will be organized—to sensitize the audience about environmental concerns through sound art and music derived from bent instruments. Data, such as audiences' feedback, will be collected at this stage. The last step will consist in realising workshops to spread an ecologically-aware circuit bending practice. Additionally, all the data and findings collected will be made available and disseminated as resources.

Keywords: circuit bending, ecology, sound art, sustainability

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Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of the combinational logic circuit. The existing research on soft error rates (SER) of the combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rate evaluation method based on LET. In this paper, the authors analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on the LET. Based on this model, the error rate of test circuit ISCAS'85 is calculated. The effectiveness of the model is proved by comparing it with previous experiments.

Keywords: communication satellite, pulse width, soft error rates, LET

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Authors: Settapong Malisuwan, Jesada Sivaraks, Peerawat Promkladpanao, Nattakit Suriyakrai, Navneet Madan

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In this paper, a compact microstrip patch antenna is designed for mobile LTE applications by applying the frequency-dependent Smith-Chart (FDSC) model. The FDSC model is adopted in this research to reduce the error on the frequency-dependent characteristics. The Ansoft HFSS and various techniques is applied to meet frequency and size requirements. The proposed method within this research is suitable for use in computer-aided microstrip antenna design and RF integrated circuit (RFIC) design.

Keywords: frequency-dependent, smith-chart, microstrip, antenna, LTE, CAD

Procedia PDF Downloads 352