Search results for: CMOS analog to digital converter
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 3245

Search results for: CMOS analog to digital converter

3215 A Low-Power Comparator Structure with Arbitrary Pre-Amplification Delay

Authors: Ata Khorami, Mohammad Sharifkhani

Abstract:

In the dynamic comparators, the pre-amplifier amplifies the input differential voltage and when the output Vcm of the pre-amplifier becomes larger than Vth of the latch input transistors, the latch is activated and finalizes the comparison. As a result, the pre-amplification delay is fixed to a value and cannot be set at the minimum required delay, thus, significant power and delay are imposed. In this paper, a novel structure is proposed through which the pre-amplification delay can be set at any low value saving power and time. Simulations show that using the proposed structure, by setting the pre-amplification delay at the minimum required value the power and comparison delay can be reduced by 55% and 100ps respectively.

Keywords: dynamic comparator, low power comparator, analog to digital converter, pre-amplification delay

Procedia PDF Downloads 204
3214 A Single Loop Repetitive Controller for a Four Legs Matrix Converter Unit

Authors: Wesam Rohouma

Abstract:

The aim of this paper is to investigate the use of repetitive controller to regulate the output voltage of three phase four leg matric converter for an Aircraft Ground Power Supply Unit. The proposed controller improve the steady state error and provide good regulation during different loading. Simulation results of 7.5 KW converter are presented to verify the operation of the proposed controller.

Keywords: matrix converter, Power electronics, controller, regulation

Procedia PDF Downloads 1506
3213 Design of CMOS CFOA Based on Pseudo Operational Transconductance Amplifier

Authors: Hassan Jassim Motlak

Abstract:

A novel design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. The feature of consumption whivh has a very low power in designing pseudo-OTA is used to decreasing the total power consumption of the proposed CFOA. This design approach applies pseudo-OTA as input stage cascaded with buffer stage. Moreover, the DC input offset voltage and harmonic distortion (HD) of the proposed CFOA are very low values compared with the conventional CMOS CFOA due to symmetrical input stage. P-Spice simulation results using 0.18µm MIETEC CMOS process parameters using supply voltage of ±1.2V and 50μA biasing current. The P-Spice simulation shows excellent improvement of the proposed CFOA over existing CMOS CFOA. Some of these performance parameters, for example, are DC gain of 62. dB, open-loop gain-bandwidth product of 108 MHz, slew rate (SR+) of +71.2V/µS, THD of -63dB and DC consumption power (PC) of 2mW.

Keywords: pseudo-OTA used CMOS CFOA, low power CFOA, high-performance CFOA, novel CFOA

Procedia PDF Downloads 316
3212 Single Chip Controller Design for Piezoelectric Actuators with Mixed Signal FPGA

Authors: Han-Bin Park, Taesam Kang, SunKi Hong, Jeong Hoi Gu

Abstract:

The piezoelectric material is being used widely for actuators due to its large power density with simple structure. It can generate a larger force than the conventional actuators with the same size. Furthermore, the response time of piezoelectric actuators is very short, and thus, it can be used for very fast system applications with compact size. To control the piezoelectric actuator, we need analog signal conditioning circuits as well as digital microcontrollers. Conventional microcontrollers are not equipped with analog parts and thus the control system becomes bulky compared with the small size of the piezoelectric devices. To overcome these weaknesses, we are developing one-chip micro controller that can handle analog and digital signals simultaneously using mixed signal FPGA technology. We used the SmartFusion™ FPGA device that integrates ARM®Cortex-M3, analog interface and FPGA fabric in a single chip and offering full customization. It gives more flexibility than traditional fixed-function microcontrollers with the excessive cost of soft processor cores on traditional FPGAs. In this paper we introduce the design of single chip controller using mixed signal FPGA, SmartFusion™[1] device. To demonstrate its performance, we implemented a PI controller for power driving circuit and a 5th order H-infinity controller for the system with piezoelectric actuator in the FPGA fabric. We also demonstrated the regulation of a power output and the operation speed of a 5th order H-infinity controller.

Keywords: mixed signal FPGA, PI control, piezoelectric actuator, SmartFusion™

Procedia PDF Downloads 520
3211 Design and Simulation a Low Phase Noise CMOS LC VCO for IEEE802.11a WLAN Applications

Authors: Hooman Kaabi, Raziyeh Karkoub

Abstract:

This work proposes a structure of AMOS-varactors. A 5GHz LC-VCO designed in TSMC 0.18μm CMOS to improve phase noise and tuning range performance. The tuning range is from 5.05GHZ to 5.88GHz.The phase noise is -154.9dBc/Hz at 1MHz offset from the carrier. It meets the requirements for IEEE 802.11a WLAN standard.

Keywords: CMOS LC VCO, spiral inductor, varactor, phase noise, tuning range

Procedia PDF Downloads 536
3210 An Implementation of a Configurable UART-to-Ethernet Converter

Authors: Jungho Moon, Myunggon Yoon

Abstract:

This paper presents an implementation of a configurable UART-to-Ethernet converter using an ARM-based 32-bit microcontroller as well as a dedicated configuration program running on a PC for configuring the operating parameters of the converter. The program was written in Python. Various parameters pertaining to the operation of the converter can be modified by the configuration program through the Ethernet interface of the converter. The converter supports 3 representative asynchronous serial communication protocols, RS-232, RS-422, and RS-485 and supports 3 network modes, TCP/IP server, TCP/IP client, and UDP client. The TCP/IP and UDP protocols were implemented on the microcontroller using an open source TCP/IP protocol stack called lwIP (A lightweight TCP/IP) and FreeRTOS, a free real-time operating system for embedded systems. Due to the use of a real-time operating system, the firmware of the converter was implemented as a multi-thread application and as a result becomes more modular and easier to develop. The converter can provide a seamless bridge between a serial port and an Ethernet port, thereby allowing existing legacy apparatuses with no Ethernet connectivity to communicate using the Ethernet protocol.

Keywords: converter, embedded systems, ethernet, lwIP, UART

Procedia PDF Downloads 706
3209 A CMOS Capacitor Array for ESPAR with Fast Switching Time

Authors: Jin-Sup Kim, Se-Hwan Choi, Jae-Young Lee

Abstract:

A 8-bit CMOS capacitor array is designed for using in electrically steerable passive array radiator (ESPAR). The proposed capacitor array shows the fast response time in rising and falling characteristics. Compared to other works in silicon-on-insulator (SOI) or silicon-on-sapphire (SOS) technologies, it shows a comparable tuning range and switching time with low power consumption. Using the 0.18um CMOS, the capacitor array features a tuning range of 1.5 to 12.9 pF at 2.4GHz. Including the 2X4 decoder for control interface, the Chip size is 350um X 145um. Current consumption is about 80 nA at 1.8 V operation.

Keywords: CMOS capacitor array, ESPAR, SOI, SOS, switching time

Procedia PDF Downloads 589
3208 A Single Phase ZVT-ZCT Power Factor Correction Boost Converter

Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

In this paper, a single phase soft switched Zero Voltage Transition and Zero Current Transition (ZVT-ZCT) Power Factor Correction (PFC) boost converter is proposed. In the proposed PFC converter, the main switch turns on with ZVT and turns off with ZCT without any additional voltage or current stresses. Auxiliary switch turns on and off with zero current switching (ZCS). Also, the main diode turns on with zero voltage switching (ZVS) and turns off with ZCS. The proposed converter has features like low cost, simple control and structure. The output current and voltage are controlled by the proposed PFC converter in wide line and load range. The theoretical analysis of converter is clarified and the operating steps are given in detail. The simulation results of converter are obtained for 500 W and 100 kHz. It is observed that the semiconductor devices operate with soft switching (SS) perfectly. So, the switching power losses are minimum. Also, the proposed converter has 0.99 power factor with sinusoidal current shape.

Keywords: power factor correction, zero-voltage transition, zero-current transition, soft switching

Procedia PDF Downloads 803
3207 Functional Compounds Activity of Analog Rice Based on Purple Yam and Bran as Alternative Food for People with Diabetes Mellitus Type II

Authors: A. Iqbal Banauaji, Muchamad Sholikun

Abstract:

Diabetes mellitus (DM) is a metabolism disorder that tends to increase its prevalence in the world, including in Indonesia. The development of DM type 2 can cause oxidative stress characterized by an imbalance between oxidants and antioxidants in the body Increased oxidative stress causes type 2 diabetes mellitus to require intake of exogenous antioxidants in large quantities to inhibit oxidative damage in the body. Bran can be defined as a functional food because it consists of 11.39% fiberand 28.7% antioxidants and the purple yam consists of anthocyanin which functions as an antioxidant. With abundant amount and low price, purple yam and bran can be used for analog rice as the effort to diversify functional food. The antioxidant’s activity of analog rice from purple yam and bran which is measured by using DPPH’s method is 12,963%. The rough fiber’s level on the analog rice from purple yam is 2.985%. The water amount of analog rice from purple yam and bran is 8.726%. Analog rice from purple yam and bran has the similar texture as the usual rice, tasted slightly sweet, light purple colored, and smelled like bran.

Keywords: antioxidant, analog rice, functional food, diabetes mellitus

Procedia PDF Downloads 193
3206 Frequency Transformation with Pascal Matrix Equations

Authors: Phuoc Si Nguyen

Abstract:

Frequency transformation with Pascal matrix equations is a method for transforming an electronic filter (analogue or digital) into another filter. The technique is based on frequency transformation in the s-domain, bilinear z-transform with pre-warping frequency, inverse bilinear transformation and a very useful application of the Pascal’s triangle that simplifies computing and enables calculation by hand when transforming from one filter to another. This paper will introduce two methods to transform a filter into a digital filter: frequency transformation from the s-domain into the z-domain; and frequency transformation in the z-domain. Further, two Pascal matrix equations are derived: an analogue to digital filter Pascal matrix equation and a digital to digital filter Pascal matrix equation. These are used to design a desired digital filter from a given filter.

Keywords: frequency transformation, bilinear z-transformation, pre-warping frequency, digital filters, analog filters, pascal’s triangle

Procedia PDF Downloads 549
3205 Memristor-A Promising Candidate for Neural Circuits in Neuromorphic Computing Systems

Authors: Juhi Faridi, Mohd. Ajmal Kafeel

Abstract:

The advancements in the field of Artificial Intelligence (AI) and technology has led to an evolution of an intelligent era. Neural networks, having the computational power and learning ability similar to the brain is one of the key AI technologies. Neuromorphic computing system (NCS) consists of the synaptic device, neuronal circuit, and neuromorphic architecture. Memristor are a promising candidate for neuromorphic computing systems, but when it comes to neuromorphic computing, the conductance behavior of the synaptic memristor or neuronal memristor needs to be studied thoroughly in order to fathom the neuroscience or computer science. Furthermore, there is a need of more simulation work for utilizing the existing device properties and providing guidance to the development of future devices for different performance requirements. Hence, development of NCS needs more simulation work to make use of existing device properties. This work aims to provide an insight to build neuronal circuits using memristors to achieve a Memristor based NCS.  Here we throw a light on the research conducted in the field of memristors for building analog and digital circuits in order to motivate the research in the field of NCS by building memristor based neural circuits for advanced AI applications. This literature is a step in the direction where we describe the various Key findings about memristors and its analog and digital circuits implemented over the years which can be further utilized in implementing the neuronal circuits in the NCS. This work aims to help the electronic circuit designers to understand how the research progressed in memristors and how these findings can be used in implementing the neuronal circuits meant for the recent progress in the NCS.

Keywords: analog circuits, digital circuits, memristors, neuromorphic computing systems

Procedia PDF Downloads 174
3204 Digital Joint Equivalent Channel Hybrid Precoding for Millimeterwave Massive Multiple Input Multiple Output Systems

Authors: Linyu Wang, Mingjun Zhu, Jianhong Xiang, Hanyu Jiang

Abstract:

Aiming at the problem that the spectral efficiency of hybrid precoding (HP) is too low in the current millimeter wave (mmWave) massive multiple input multiple output (MIMO) system, this paper proposes a digital joint equivalent channel hybrid precoding algorithm, which is based on the introduction of digital encoding matrix iteration. First, the objective function is expanded to obtain the relation equation, and the pseudo-inverse iterative function of the analog encoder is derived by using the pseudo-inverse method, which solves the problem of greatly increasing the amount of computation caused by the lack of rank of the digital encoding matrix and reduces the overall complexity of hybrid precoding. Secondly, the analog coding matrix and the millimeter-wave sparse channel matrix are combined into an equivalent channel, and then the equivalent channel is subjected to Singular Value Decomposition (SVD) to obtain a digital coding matrix, and then the derived pseudo-inverse iterative function is used to iteratively regenerate the simulated encoding matrix. The simulation results show that the proposed algorithm improves the system spectral efficiency by 10~20%compared with other algorithms and the stability is also improved.

Keywords: mmWave, massive MIMO, hybrid precoding, singular value decompositing, equivalent channel

Procedia PDF Downloads 96
3203 Optimization and Design of Current-Mode Multiplier Circuits with Applications in Analog Signal Processing for Gas Industrial Package Systems

Authors: Mohamad Baqer Heidari, Hefzollah.Mohammadian

Abstract:

This brief presents two original implementations of improved accuracy current-mode multiplier/divider circuits. Besides the advantage of their simplicity, these original multiplier/divider structures present the advantage of very small linearity errors that can be obtained as a result of the proposed design techniques (0.75% and 0.9%, respectively, for an extended range of the input currents). The original multiplier/divider circuits permit a facile reconfiguration, the presented structures representing the functional basis for implementing complex function synthesizer circuits. The proposed computational structures are designed for implementing in 0.18-µm CMOS technology, with a low-voltage operation (a supply voltage of 1.2 V). The circuits’ power consumptions are 60 and 75 µW, respectively, while their frequency bandwidths are 79.6 and 59.7 MHz, respectively.

Keywords: analog signal processing, current-mode operation, functional core, multiplier, reconfigurable circuits, industrial package systems

Procedia PDF Downloads 374
3202 Radio Frequency Energy Harvesting Friendly Self-Clocked Digital Low Drop-Out for System-On-Chip Internet of Things

Authors: Christos Konstantopoulos, Thomas Ussmueller

Abstract:

Digital low drop-out regulators, in contrast to analog counterparts, provide an architecture of sub-1 V regulation with low power consumption, high power efficiency, and system integration. Towards an optimized integration in the ultra-low-power system-on-chip Internet of Things architecture that is operated through a radio frequency energy harvesting scheme, the D-LDO regulator should constitute the main regulator that operates the master-clock and rest loads of the SoC. In this context, we present a D-LDO with linear search coarse regulation and asynchronous fine regulation, which incorporates an in-regulator clock generation unit that provides an autonomous, self-start-up, and power-efficient D-LDO design. In contrast to contemporary D-LDO designs that employ ring-oscillator architecture which start-up time is dependent on the frequency, this work presents a fast start-up burst oscillator based on a high-gain stage with wake-up time independent of coarse regulation frequency. The design is implemented in a 55-nm Global Foundries CMOS process. With the purpose to validate the self-start-up capability of the presented D-LDO in the presence of ultra-low input power, an on-chip test-bench with an RF rectifier is implemented as well, which provides the RF to DC operation and feeds the D-LDO. Power efficiency and load regulation curves of the D-LDO are presented as extracted from the RF to regulated DC operation. The D-LDO regulator presents 83.6 % power efficiency during the RF to DC operation with a 3.65 uA load current and voltage regulator referred input power of -27 dBm. It succeeds 486 nA maximum quiescent current with CL 75 pF, the maximum current efficiency of 99.2%, and 1.16x power efficiency improvement compared to analog voltage regulator counterpart oriented to SoC IoT loads. Complementary, the transient performance of the D-LDO is evaluated under the transient droop test, and the achieved figure-of-merit is compared with state-of-art implementations.

Keywords: D-LDO, Internet of Things, RF energy harvesting, voltage regulators

Procedia PDF Downloads 145
3201 1 kW Power Factor Correction Soft Switching Boost Converter with an Active Snubber Cell

Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

A 1 kW power factor correction boost converter with an active snubber cell is presented in this paper. In the converter, the main switch turns on under zero voltage transition (ZVT) and turns off under zero current transition (ZCT) without any additional voltage or current stress. The auxiliary switch turns on and off under zero current switching (ZCS). Besides, the main diode turns on under ZVS and turns off under ZCS. The output current and voltage are controlled by the PFC converter in wide line and load range. The simulation results of converter are obtained for 1 kW and 100 kHz. One of the most important feature of the given converter is that it has direct power transfer as well as excellent soft switching techniques. Also, the converter has 0.99 power factor with the sinusoidal input current shape.

Keywords: power factor correction, direct power transfer, zero-voltage transition, zero-current transition, soft switching

Procedia PDF Downloads 962
3200 Three Dimensional Simulation of the Transient Modeling and Simulation of Different Gas Flows Velocity and Flow Distribution in Catalytic Converter with Porous Media

Authors: Amir Reza Radmanesh, Sina Farajzadeh Khosroshahi, Hani Sadr

Abstract:

The transient catalytic converter performance is governed by complex interactions between exhaust gas flow and the monolithic structure of the catalytic converter. Stringent emission regulations around the world necessitate the use of highly-efficient catalytic converters in vehicle exhaust systems. Computational fluid dynamics (CFD) is a powerful tool for calculating the flow field inside the catalytic converter. Radial velocity profiles, obtained by a commercial CFD code, present very good agreement with respective experimental results published in the literature. However the applicability of CFD for transient simulations is limited by the high CPU demands. In the present work, Geometric modeling ceramic monolith substrate is done with square shaped channel type of Catalytic converter and it is coated platinum and palladium. This example illustrates the effect of flow distribution on thermal response of a catalytic converter and different gas flow velocities, during the critical phase of catalytic converter warm up.

Keywords: catalytic converter, computational fluid dynamic, porous media, velocity distribution

Procedia PDF Downloads 858
3199 Single Ended Primary Inductance Converter with Internal Model Controller

Authors: Fatih Suleyman Taskincan, Ahmet Karaarslan

Abstract:

In this article, the study and analysis of Single Ended Primary Inductance Converter (SEPIC) are presented for battery charging applications that will be used in military applications. The usage of this kind of converters come from its advantage of non-reverse polarity at outputs. As capacitors charge and discharge through inductance, peak current does not occur on capacitors. Therefore, the efficiency will be high compared to buck-boost converters. In this study, the converter (SEPIC) is designed to be operated with Internal Model Controller (IMC). The traditional controllers like Proportional Integral Controller are not preferred as its linearity behavior. Hence IMC is designed for this converter. This controller is a model-based control and provides more robustness and better set point monitoring. Moreover, it can be used for an unstable process where the conventional controller cannot handle the dynamic operation. Matlab/Simulink environment is used to simulate the converter and its controller, then, the results are shown and discussed.

Keywords: DC/DC converter, single ended primary inductance converter, SEPIC, internal model controller, IMC, switched mode power supply

Procedia PDF Downloads 629
3198 A High Step-Up DC-DC Converter for Renewable Energy System Applications

Authors: Sopida Vacharasukpo, Sudarat Khwan-On

Abstract:

This paper proposes a high step-up DC-DC converter topology for renewable energy system applications. The proposed converter employs only a single power switch instead of using several switches. Compared to the conventional DC-DC step-up converters the higher voltage gain with small output ripples can be achieved by using the proposed high step-up DC-DC converter topology. It can step up the low input voltage (20-50Vdc) generated from the photovoltaic modules to the high output voltage level approximately 600Vdc in order to supply the three-phase inverter fed the three-phase motor drive. In this paper, the operating principle of the proposed converter topology and its control strategy under the continuous conduction mode (CCM) are described. Finally, simulation results are shown to demonstrate the effectiveness of the proposed high step-up DC-DC converter with its control strategy to increase the voltage step-up conversion ratio.

Keywords: DC-DC converter, high step-up ratio, renewable energy, single switch

Procedia PDF Downloads 1193
3197 Development of a Real Time Axial Force Measurement System and IoT-Based Monitoring for Smart Bearing

Authors: Hassam Ahmed, Yuanzhi Liu, Yassine Selami, Wei Tao, Hui Zhao

Abstract:

The purpose of this research is to develop a real time axial force measurement system for a smart bearing through the use of strain-gauges, whereby the data acquisition is performed by an Arduino microcontroller due to its easy manipulation and low-cost. The measured signal is acquired and then discretized using a Wheatstone Bridge and an Analog-Digital Converter (ADC) respectively. For bearing monitoring, a real time monitoring system based on Internet of things (IoT) and Bluetooth were developed. Experimental tests were performed on a bearing within a force range up to 600 kN. The experimental results show that there is a proportional linear relationship between the applied force and the output voltage, and the error R squared is within 0.9878 based on the regression analysis.

Keywords: bearing, force measurement, IoT, strain gauge

Procedia PDF Downloads 142
3196 Regulated Output Voltage Double Switch Buck-Boost Converter for Photovoltaic Energy Application

Authors: M. Kaouane, A. Boukhelifa, A. Cheriti

Abstract:

In this paper, a new Buck-Boost DC-DC converter is designed and simulated for photovoltaic energy system. The presented Buck-Boost converter has a double switch. Moreover, its output voltage is regulated to a constant value whatever its input is. In the presented work, the Buck-Boost transfers the produced energy from the photovoltaic generator to an R-L load. The converter is controlled by the pulse width modulation technique in a way to have a suitable output voltage, in the other hand, to carry the generator’s power, and put it close to the maximum possible power that can be generated by introducing the right duty cycle of the pulse width modulation signals that control the switches of the converter; each component and each parameter of the proposed circuit is well calculated using the equations that describe each operating mode of the converter. The proposed configuration of Buck-Boost converter has been simulated in Matlab/Simulink environment; the simulation results show that it is a good choice to take in order to maintain the output voltage constant while ensuring a good energy transfer.

Keywords: Buck-Boost converter, switch, photovoltaic, PWM, power, energy transfer

Procedia PDF Downloads 905
3195 Sliding Mode Controlled Quadratic Boost Converter

Authors: Viji Vijayakumar, R. Divya, A. Vivek

Abstract:

This paper deals with a quadratic boost converter which belongs to cascade boost family, controlled by sliding mode controller. In the cascade boost family, quadratic boost converter is the best trade-off when circuit complexity and modulator saturation is considered. Sliding mode control being a nonlinear control results in a robust and stable system when applied to switching converters which are inherently variable structured systems. The stability of this system is analyzed through Lyapunov’s approach. Analysis is done for load regulation, line regulation and step response of the system. Also these results are compared with that of PID controller based system.

Keywords: DC-DC converter, quadratic boost converter, sliding mode control, PID control

Procedia PDF Downloads 993
3194 Batteryless DCM Boost Converter for Kinetic Energy Harvesting Applications

Authors: Andrés Gomez-Casseres, Rubén Contreras

Abstract:

In this paper, a bidirectional boost converter operated in Discontinuous Conduction Mode (DCM) is presented as a suitable power conditioning circuit for tuning of kinetic energy harvesters without the need of a battery. A nonlinear control scheme, composed by two linear controllers, is used to control the average value of the input current, enabling the synthesization of complex loads. The converter, along with the control system, is validated through SPICE simulations using the LTspice tool. The converter model and the controller transfer functions are derived. From the simulation results, it was found that the input current distortion increases with the introduced phase shift and that, such distortion, is almost entirely present at the zero-crossing point of the input voltage.

Keywords: average current control, boost converter, electrical tuning, energy harvesting

Procedia PDF Downloads 762
3193 The System for Root Canal Length Measurement Based on Multifrequency Impedance Method

Authors: Zheng Zhang, Xin Chen, Guoqing Ding

Abstract:

Electronic apex locators (EAL) has been widely used clinically for measuring root canal working length with high accuracy, which is crucial for successful endodontic treatment. In order to maintain high accuracy in different measurement environments, this study presented a system for root canal length measurement based on multifrequency impedance method. This measuring system can generate a sweep current with frequencies from 100 Hz to 1 MHz through a direct digital synthesizer. Multiple impedance ratios with different combinations of frequencies were obtained and transmitted by an analog-to-digital converter and several of them with representatives will be selected after data process. The system analyzed the functional relationship between these impedance ratios and the distance between the file and the apex with statistics by measuring plenty of teeth. The position of the apical foramen can be determined by the statistical model using these impedance ratios. The experimental results revealed that the accuracy of the system based on multifrequency impedance ratios method to determine the position of the apical foramen was higher than the dual-frequency impedance ratio method. Besides that, for more complex measurement environments, the performance of the system was more stable.

Keywords: root canal length, apex locator, multifrequency impedance, sweep frequency

Procedia PDF Downloads 156
3192 Recovery of Hydrogen Converter Efficiency Affected by Poisoning of Catalyst with Increasing of Temperature

Authors: Enayat Enayati, Reza Behtash

Abstract:

The purpose of the H2 removal system is to reduce a content of hydrogen and other combustibles in the CO2 feed owing to avoid developing a possible explosive condition in the synthesis. In order to reduce the possibility of forming an explosive gas mixture in the synthesis as much as possible, the hydrogen percent in the fresh CO2, will be removed in hydrogen converter. Therefore the partly compressed CO2/Air mixture is led through Hydrogen converter (Reactor) where the H2, present in the CO2, is reduced by catalytic combustion to values less than 50 ppm (vol). According the following exothermic chemical reaction: 2H2 + O2 → 2H2O + Heat. The catalyst in hydrogen converter consist of platinum on a aluminum oxide carrier. Low catalyst activity maybe due to catalyst poisoning. This will result in an increase of the hydrogen content in the CO2 to the synthesis. It is advised to shut down the plant when the outlet of hydrogen converter increased above 100 ppm, to prevent undesirable gas composition in the plant. Replacement of catalyst will be time exhausting and costly so as to prevent this, we increase the inlet temperature of hydrogen converter according to following Arrhenius' equation: K=K0e (-E_a/RT) K is rate constant of a chemical reaction where K0 is the pre-exponential factor, E_a is the activation energy, and R is the universal gas constant. Increment of inlet temperature of hydrogen converter caused to increase the rate constant of chemical reaction and so declining the amount of hydrogen from 125 ppm to 70 ppm.

Keywords: catalyst, converter, poisoning, temperature

Procedia PDF Downloads 819
3191 0.13-μm CMOS Vector Modulator for Wireless Backhaul System

Authors: J. S. Kim, N. P. Hong

Abstract:

In this paper, a CMOS vector modulator designed for wireless backhaul system based on 802.11ac is presented. A poly phase filter and sign select switches yield two orthogonal signal paths. Two variable gain amplifiers with strongly reduced phase shift of only ±5 ° are used to weight these paths. It has a phase control range of 360 ° and a gain range of -10 dB to 10 dB. The current drawn from a 1.2 V supply amounts 20.4 mA. Using a 0.13 mm technology, the chip die area amounts 1.47x0.75 mm².

Keywords: CMOS, phase shifter, backhaul, 802.11ac

Procedia PDF Downloads 386
3190 AC Voltage Regulators Using Single Phase Matrix Converter

Authors: Nagaraju Jarugu, B. R. Narendra

Abstract:

This paper focused on boost rectification by Single Phase Matrix Converter with fewer numbers of switches. The conventional matrix converter consists of 4 bidirectional switches, i.e. 8 set of IGBT/MOSFET with anti-parallel diodes. In this proposed matrix converter, only six switches are used. The switch commutation arrangements are also carried out in this work. The SPMC topology has many advantages as a minimal passive device use. It is very flexible and it can be used as a lot of converters. The gate pulses to the switches are provided by the PWM techniques. The duty ratio of the switches based on Pulse Width Modulation (PWM) technique was used to produce the output waveform of the circuit, simply by turning ON and OFF the switches. The simulation results using MATLAB/Simulink were provided to validate the feasibility of this proposed method.

Keywords: single phase matrix converter, reduced switches, AC voltage regulators, boost rectifier operation

Procedia PDF Downloads 1188
3189 Design and Implementation of DC-DC Converter with Inc-Cond Algorithm

Authors: Mustafa Engin Başoğlu, Bekir Çakır

Abstract:

The most important component affecting the efficiency of photovoltaic power systems are solar panels. Efficiency of these systems are significantly affected because of being low efficiency of solar panel. Therefore, solar panels should be operated under maximum power point conditions through a power converter. In this study, design boost converter with maximum power point tracking (MPPT) operation has been designed and performed with Incremental Conductance (Inc-Cond) algorithm by using direct duty control. Furthermore, it is shown that performance of boost converter with MPPT operation fails under low load resistance connection.

Keywords: boost converter, incremental conductance (Inc-Cond), MPPT, solar panel

Procedia PDF Downloads 1046
3188 Design and Characterization of a CMOS Process Sensor Utilizing Vth Extractor Circuit

Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah

Abstract:

This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (Vth) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.

Keywords: CMOS process sensor, PVT sensor, threshold extractor circuit, Vth extractor circuit

Procedia PDF Downloads 175
3187 Neural Nets Based Approach for 2-Cells Power Converter Control

Authors: Kamel Laidi, Khelifa Benmansour, Ouahid Bouchhida

Abstract:

Neural networks-based approach for 2-cells serial converter has been developed and implemented. The approach is based on a behavioural description of the different operating modes of the converter. Each operating mode represents a well-defined configuration, and for which is matched an operating zone satisfying given invariance conditions, depending on the capacitors' voltages and the load current of the converter. For each mode, a control vector whose components are the control signals to be applied to the converter switches has been associated. Therefore, the problem is reduced to a classification task of the different operating modes of the converter. The artificial neural nets-based approach, which constitutes a powerful tool for this kind of task, has been adopted and implemented. The application to a 2-cells chopper has allowed ensuring efficient and robust control of the load current and a high capacitors voltages balancing.

Keywords: neural nets, control, multicellular converters, 2-cells chopper

Procedia PDF Downloads 834
3186 Inverter Based Gain-Boosting Fully Differential CMOS Amplifier

Authors: Alpana Agarwal, Akhil Sharma

Abstract:

This work presents a fully differential CMOS amplifier consisting of two self-biased gain boosted inverter stages, that provides an alternative to the power hungry operational amplifier. The self-biasing avoids the use of external biasing circuitry, thus reduces the die area, design efforts, and power consumption. In the present work, regulated cascode technique has been employed for gain boosting. The Miller compensation is also applied to enhance the phase margin. The circuit has been designed and simulated in 1.8 V 0.18 µm CMOS technology. The simulation results show a high DC gain of 100.7 dB, Unity-Gain Bandwidth of 107.8 MHz, and Phase Margin of 66.7o with a power dissipation of 286 μW and makes it suitable candidate for the high resolution pipelined ADCs.

Keywords: CMOS amplifier, gain boosting, inverter-based amplifier, self-biased inverter

Procedia PDF Downloads 303