Search results for: threshold voltage

Authors: Suwimon Saneewong Na Ayuttaya, Chainarong Chaktranond, Phadungsak Rattanadecho

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This study numerically investigates the effects of Electrohydrodynamic on flow patterns and heat transfer enhancement within a cavity which is on the lower wall of channel. In this simulation, effects of using ground wire and ground plate on the flow patterns are compared. Moreover, the positions of electrode wire respecting with ground are tested in the range of angles θ = 0 - 180^o. High electrical voltage exposes to air is 20 kV. Bulk mean velocity and temperature of inlet air are controlled at 0.1 m/s and 60 ^OC, respectively. The result shows when electric field is applied, swirling flow is appeared in the channel. In addition, swirling flow patterns in the main flow of using ground plate are widely spreader than that of using ground wire. Moreover, direction of swirling flow also affects the flow pattern and heat transfer in a cavity. These cause the using ground wire to give the maximum temperature and heat transfer higher than using ground plate. Furthermore, when the angle is at θ = 60^o, high shear flow effect is obtained. This results show high strength of swirling flow and effective heat transfer enhancement.

Keywords: Swirling Flow, Heat Transfer, Electrohydrodynamic, Numerical Analysis.

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

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The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

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Authors: Bahram Khan, Anderson Rocha Ramos, Rui R. Paulo, Fernando J. Velez

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With the growing demand for a new blend of applications, the users dependency on the internet is increasing day by day. Mobile internet users are giving more attention to their own experiences, especially in terms of communication reliability, high data rates and service stability on move. This increase in the demand is causing saturation of existing radio frequency bands. To address these challenges, researchers are investigating the best approaches, Carrier Aggregation (CA) is one of the newest innovations, which seems to fulfill the demands of the future spectrum, also CA is one the most important feature for Long Term Evolution - Advanced (LTE-Advanced). For this purpose to get the upcoming International Mobile Telecommunication Advanced (IMT-Advanced) mobile requirements (1 Gb/s peak data rate), the CA scheme is presented by 3GPP, which would sustain a high data rate using widespread frequency bandwidth up to 100 MHz. Technical issues such as aggregation structure, its implementations, deployment scenarios, control signal techniques, and challenges for CA technique in LTE-Advanced, with consideration of backward compatibility, are highlighted in this paper. Also, performance evaluation in macro-cellular scenarios through a simulation approach is presented, which shows the benefits of applying CA, low-complexity multi-band schedulers in service quality, system capacity enhancement and concluded that enhanced multi-band scheduler is less complex than the general multi-band scheduler, which performs better for a cell radius longer than 1800 m (and a PLR threshold of 2%).

Keywords: Component carrier, carrier aggregation, LTE-Advanced, scheduling, spectrum management.

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Authors: R. Srinivasa Rao

Abstract:

This paper presents a new and efficient approach for capacitor placement in radial distribution systems that determine the optimal locations and size of capacitor with an objective of improving the voltage profile and reduction of power loss. The solution methodology has two parts: in part one the loss sensitivity factors are used to select the candidate locations for the capacitor placement and in part two a new algorithm that employs Plant growth Simulation Algorithm (PGSA) is used to estimate the optimal size of capacitors at the optimal buses determined in part one. The main advantage of the proposed method is that it does not require any external control parameters. The other advantage is that it handles the objective function and the constraints separately, avoiding the trouble to determine the barrier factors. The proposed method is applied to 9 and 34 bus radial distribution systems. The solutions obtained by the proposed method are compared with other methods. The proposed method has outperformed the other methods in terms of the quality of solution.

Keywords: Distribution systems, Capacitor allocation, Loss reduction, Fuzzy, PGSA.

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Authors: Ashwani K. Rana, Narottam Chand, Vinod Kapoor

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This paper presents a new compact analytical model of the gate leakage current in high-k based nano scale MOSFET by assuming a two-step inelastic trap-assisted tunneling (ITAT) process as the conduction mechanism. This model is based on an inelastic trap-assisted tunneling (ITAT) mechanism combined with a semiempirical gate leakage current formulation in the BSIM 4 model. The gate tunneling currents have been calculated as a function of gate voltage for different gate dielectrics structures such as HfO2, Al2O3 and Si3N4 with EOT (equivalent oxide thickness) of 1.0 nm. The proposed model is compared and contrasted with santaurus simulation results to verify the accuracy of the model and excellent agreement is found between the analytical and simulated data. It is observed that proposed analytical model is suitable for different highk gate dielectrics simply by adjusting two fitting parameters. It was also shown that gate leakages reduced with the introduction of high-k gate dielectric in place of SiO2.

Keywords: Analytical model, High-k gate dielectrics, inelastic trap assisted tunneling, metal–oxide–semiconductor (MOS) devices.

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Authors: R. Srinivasa Rao, S. V. L. Narasimham

Abstract:

This paper presents a new and efficient approach for capacitor placement in radial distribution systems that determine the optimal locations and size of capacitor with an objective of improving the voltage profile and reduction of power loss. The solution methodology has two parts: in part one the loss sensitivity factors are used to select the candidate locations for the capacitor placement and in part two a new algorithm that employs Plant growth Simulation Algorithm (PGSA) is used to estimate the optimal size of capacitors at the optimal buses determined in part one. The main advantage of the proposed method is that it does not require any external control parameters. The other advantage is that it handles the objective function and the constraints separately, avoiding the trouble to determine the barrier factors. The proposed method is applied to 9, 34, and 85-bus radial distribution systems. The solutions obtained by the proposed method are compared with other methods. The proposed method has outperformed the other methods in terms of the quality of solution.

Keywords: Distribution systems, Capacitor placement, loss reduction, Loss sensitivity factors, PGSA.

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Authors: C. Panya-Isara, T. Kulworawanichpong, P. Pao-La-Or

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Piezoelectric transformers are electronic devices made from piezoelectric materials. The piezoelectric transformers as the name implied are used for changing voltage signals from one level to another. Electrical energy carried with signals is transferred by means of mechanical vibration. Characterizing in both electrical and mechanical properties leads to extensively use and efficiency enhancement of piezoelectric transformers in various applications. In this paper, study and analysis of electrical and mechanical properties of multi-layer piezoelectric transformers in forms of potential and displacement distribution throughout the volume, respectively. This paper proposes a set of quasi-static mathematical model of electromechanical coupling for piezoelectric transformer by using a set of partial differential equations. Computer-based simulation utilizing the three-dimensional finite element method (3-D FEM) is exploited as a tool for visualizing potentials and displacements distribution within the multi-layer piezoelectric transformer. This simulation was conducted by varying a number of layers. In this paper 3, 5 and 7 of the circular ring type were used. The computer simulation based on the use of the FEM has been developed in MATLAB programming environment.

Keywords: Multi-layer Piezoelectric Transformer, 3-D Finite Element Method (3-D FEM), Electro-mechanical Coupling, Mechanical Vibration

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Authors: G. Renuka Devi

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This paper presents design and analysis of fault tolerate feature of n-phase induction motor drive. The n-phase induction motor (more than 3-phases) has a number of advantages over conventional 3-phase induction motor, it has low torque pulsation with increased torque density, more fault tolerant feature, low current ripple with increased efficiency. When increasing the number of phases, it has reduced current per phase without increasing per phase voltage, resulting in an increase in the total power rating of n-phase motors in the same volume machine. In this paper, the theory of operation of a multi-phase induction motor is discussed. The detailed study of d-q modeling of n-phase induction motors is elaborated. The d-q model of n-phase (5, 6, 7, 9 and 12) induction motors is developed in a MATLAB/Simulink environment. The steady state and dynamic performance of the multi-phase induction motor is studied under varying load conditions. Comparison of 5-phase induction is presented under normal and fault conditions.

Keywords: d-q model, dynamic Response, fault tolerant feature, matlab/simulink, multi-phase induction motor, transient response.

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Authors: Jalil Boudjadar

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Dynamic Voltage and Frequency Scaling (DVFS) multicore platforms are promising execution platforms that enable high computational performance, less energy consumption and flexibility in scheduling the system processes. However, the resulting interleaving and memory interference together with per-core frequency tuning make real-time guarantees hard to be delivered. Besides, energy consumption represents a strong constraint for the deployment of such systems on energy-limited settings. Identifying the system configurations that would achieve a high performance and consume less energy while guaranteeing the system schedulability is a complex task in the design of modern embedded systems. This work studies the trade-off between energy consumption, cores utilization and memory bottleneck and their impact on the schedulability of DVFS multicore time-critical systems with a hierarchy of shared memories. We build a model-based framework using Parametrized Timed Automata of UPPAAL to analyze the mutual impact of performance, energy consumption and schedulability of DVFS multicore systems, and demonstrate the trade-off on an actual case study.

Keywords: Time-critical systems, multicore systems, schedulability analysis, performance, memory interference, energy consumption.

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Authors: D. Krishnaveni, M. Geetha Priya

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Application of reversible logic in integrated circuits results in the improved optimization of power consumption. This technology can be put into use in a variety of low power applications such as quantum computing, optical computing, nano-technology, and Complementary Metal Oxide Semiconductor (CMOS) Very Large Scale Integrated (VLSI) design etc. Logic gates are the basic building blocks in the design of any logic network and thus integrated circuits. In this paper, reversible Dual Key Gate (DKG) and Dual key Gate Pair (DKGP) gates that work singly as full adder/full subtractor are used to realize the basic building blocks of logic circuits. Reversible full adder/subtractor and parallel adder/ subtractor are designed using other reversible gates available in the literature and compared with that of DKG & DKGP gates. Efficient performance of reversible logic circuits relies on the optimization of the key parameters viz number of constant inputs, garbage outputs and number of reversible gates. The full adder/subtractor and parallel adder/subtractor design with reversible DKGP and DKG gates results in least number of constant inputs, garbage outputs, and number of reversible gates compared to the other designs. Thus, this paper provides a threshold to build more complex arithmetic systems using these reversible logic gates, leading to the enhanced performance of computing systems.

Keywords: Low power CMOS, quantum computing, reversible logic gates, full adder, full subtractor, parallel adder/subtractor, basic gates, universal gates.

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Authors: A. Yazdanpanah Goharrizi

Abstract:

An improved topology of a voltage-fed quasi-resonant soft switching LCrCdc series-parallel half bridge inverter with a constant-frequency for electronic ballast applications is proposed in this paper. This new topology introduces a low-cost solution to reduce switching losses and circuit rating to achieve high-efficiency ballast. Switching losses effect on ballast efficiency is discussed through experimental point of view. In this discussion, an improved topology in which accomplishes soft switching operation over a wide power regulation range is proposed. The proposed structure uses reverse recovery diode to provide better operation for the ballast system. A symmetrical pulse wide modulation (PWM) control scheme is implemented to regulate a wide range of out-put power. Simulation results are kindly verified with the experimental measurements obtained by ballast-lamp laboratory prototype. Different load conditions are provided in order to clarify the performance of the proposed converter.

Keywords: Electronic ballast, Pulse wide modulation (PWM) Reverse recovery diode, Soft switching.

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Authors: Shayan Rezvanigilkolaei, Shayesteh Vefaghnematollahi

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Electrical impedance tomography is a non-invasive medical imaging technique suitable for medical applications. This paper describes an electrical impedance tomography device with the ability to navigate a robotic arm to manipulate a target object. The design of the device includes various hardware and software sections to perform medical imaging and control the robotic arm. In its hardware section an image is formed by 16 electrodes which are located around a container. This image is used to navigate a 3DOF robotic arm to reach the exact location of the target object. The data set to form the impedance imaging is obtained by having repeated current injections and voltage measurements between all electrode pairs. After performing the necessary calculations to obtain the impedance, information is transmitted to the computer. This data is fed and then executed in MATLAB which is interfaced with EIDORS (Electrical Impedance Tomography Reconstruction Software) to reconstruct the image based on the acquired data. In the next step, the coordinates of the center of the target object are calculated by image processing toolbox of MATLAB (IPT). Finally, these coordinates are used to calculate the angles of each joint of the robotic arm. The robotic arm moves to the desired tissue with the user command.

Keywords: Electrical impedance tomography, EIT, Surgeon robot, image processing of Electrical impedance tomography.

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Authors: Fekkak Bouazza, Menaa Mohamed, Loukriz Abdelhamid, Krim Mohamed L.

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This paper presents modeling and control strategy for the grid connected wind turbine system based on Permanent Magnet Synchronous Generator (PMSG). The considered system is based on back-to-back converter topology. The Grid Side Converter (GSC) achieves the DC bus voltage control and unity power factor. The Machine Side Converter (MSC) assures the PMSG speed control. The PMSG is used as a variable speed generator and connected directly to the turbine without gearbox. The pitch angle control is not either considered in this study. Further, Optimal Tip Speed Ratio (OTSR) based MPPT control strategy is used to ensure the most energy efficiency whatever the wind speed variations. A filter (L) is put between the GSC and the grid to reduce current ripple and to improve the injected power quality. The proposed grid connected wind system is built under MATLAB/Simulink environment. The simulation results show the feasibility of the proposed topology and performance of its control strategies.

Keywords: Wind, grid, PMSG, MPPT, OTSR.

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Authors: Kréhi Serge Agbli, Samuel Portebos, Michaël Salomon

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Here a methodology is considered aiming at evaluating the economic benefit of the provision of a primary frequency control unit using a Battery Energy Storage System (BESS). In this methodology, two control types (basic and hysteresis) are implemented and the corresponding minimum energy storage system power allowing to maintain the frequency drop inside a given threshold under a given contingency is identified and compared using DigSilent’s PowerFactory software. Following this step, the corresponding energy storage capacity (in MWh) is calculated. As PowerFactory is dedicated to dynamic simulation for transient analysis, a first order model related to the IEEE 9 bus grid used for the analysis under PowerFactory is characterized and implemented on MATLAB-Simulink. Primary frequency control is simulated using the two control types over one-month grid's frequency deviation data on this Simulink model. This simulation results in the energy throughput both basic and hysteresis BESSs. It emerges that the 15 minutes operation band of the battery capacity allocated to frequency control is sufficient under the considered disturbances. A sensitivity analysis on the width of the control deadband is then performed for the two control types. The deadband width variation leads to an identical sizing with the hysteresis control showing a better frequency control at the cost of a higher delivered throughput compared to the basic control. An economic analysis comparing the cost of the sized BESS to the potential revenues is then performed.

Keywords: Battery Energy Storage System, electrical network frequency stability, frequency control unit, PowerFactory.

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Authors: H. Rezvani, A. Hekmati

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Nowadays, the use of renewable energy sources has been increasingly great because of the cost increase and public demand for clean energy sources. One of the fastest growing sources is wind energy. In this paper, Wind Diesel Hybrid System (WDHS) comprising a Diesel Generator (DG), a Wind Turbine Generator (WTG), the Consumer Load, a Battery-based Energy Storage System (BESS), and a Dump Load (DL) is used. Voltage is controlled by Diesel Generator; the frequency is controlled by BESS and DL. The BESS elimination is an efficient way to reduce maintenance cost and increase the dynamic response. Simulation results with graphs for the frequency of Power System, active power, and the battery power are presented for load changes. The controlling parameters are optimized by using Imperialist Competitive Algorithm (ICA). The simulation results for the BESS/no BESS cases are compared. Results show that in no BESS case, the frequency control is more optimal than the BESS case by using ICA. 

Keywords: Renewable Energy, Wind Diesel System, Induction Generator, Energy Storage, Imperialist Competitive Algorithm.

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Authors: Stefan M. Goetz, Thomas Weyh, Hans-Georg Herzog

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The triumph of inductive neuro-stimulation since its rediscovery in the 1980s has been quite spectacular. In lots of branches ranging from clinical applications to basic research this system is absolutely indispensable. Nevertheless, the basic knowledge about the processes underlying the stimulation effect is still very rough and rarely refined in a quantitative way. This seems to be not only an inexcusable blank spot in biophysics and for stimulation prediction, but also a fundamental hindrance for technological progress. The already very sophisticated devices have reached a stage where further optimization requires better strategies than provided by simple linear membrane models of integrate-and-fire style. Addressing this problem for the first time, we suggest in the following text a way for virtual quantitative analysis of a stimulation system. Concomitantly, this ansatz seems to provide a route towards a better understanding by using nonlinear signal processing and taking the nerve as a filter that is adapted for neuronal magnetic stimulation. The model is compact and easy to adjust. The whole setup behaved very robustly during all performed tests. Exemplarily a recent innovative stimulator design known as cTMS is analyzed and dimensioned with this approach in the following. The results show hitherto unforeseen potentials.

Keywords: Theory of magnetic stimulation, inversion, optimization, high voltage oscillator, TMS, cTMS.

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Authors: Ya-Chi Yu, Pei-Syuan Ruan, Shao-Wen Chen, Yu-Hsien Chang, Jin-Der Lee, Jong-Rong Wang, Chunkuan Shih

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This study analyzed the transient signals of central region void fraction of air-water two-phase flow in a 3x3 rod bundle. Experimental tests were carried out utilizing a vertical rod bundle test section along with a set of air-water supply/flow control system, and the transient signals of the central region void fraction were collected through the electrical conductivity sensors as well as visualized via high speed photography. By converting the electric signals, transient void fraction can be obtained through the voltage ratios. With a fixed superficial water velocity (J_f=0.094 m/s), two different superficial air velocities (J_g=0.094 m/s and 0.236 m/s) were tested and presented, which were corresponding to the flow conditions of bubbly flows and cap/slug flows, respectively. The time averaged central region void fraction was obtained as 0.109-0.122 with 0.028 standard deviation for the selected bubbly flow and 0.188-0.221with 0.101 standard deviation for the selected cap/slug flow, respectively. Through Fast Fourier Transform (FFT) analysis, no clear frequency peak was found in bubbly flow, while two dominant frequencies were identified around 1.6 Hz and 2.5 Hz in the present cap/slug flow.

Keywords: Central region, rod bundles, transient void fraction, two-phase flow.

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Authors: Farhad Kolahan, Mehdi Heidari

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Gas Metal Arc Welding (GMAW) processes is an important joining process widely used in metal fabrication industries. This paper addresses modeling and optimization of this technique using a set of experimental data and regression analysis. The set of experimental data has been used to assess the influence of GMAW process parameters in weld bead geometry. The process variables considered here include voltage (V); wire feed rate (F); torch Angle (A); welding speed (S) and nozzle-to-plate distance (D). The process output characteristics include weld bead height, width and penetration. The Taguchi method and regression modeling are used in order to establish the relationships between input and output parameters. The adequacy of the model is evaluated using analysis of variance (ANOVA) technique. In the next stage, the proposed model is embedded into a Simulated Annealing (SA) algorithm to optimize the GMAW process parameters. The objective is to determine a suitable set of process parameters that can produce desired bead geometry, considering the ranges of the process parameters. Computational results prove the effectiveness of the proposed model and optimization procedure.

Keywords: Weld Bead Geometry, GMAW welding, Processparameters Optimization, Modeling, SA algorithm

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Authors: Oliver Marunțălu, Elena Elisabeta Manea, Lăcrămioara Diana Robescu, Mihai Necșoiu, Gheorghe Lăzăroiu, Dana Andreya Bondrea

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In order to obtain efficient pollutants removal in small-scale wastewater treatment plants, uniform water flow has to be achieved. The experimental setup, designed for treating high-load wastewater (leachate), consists of two aerobic biological reactors and a lamellar settler. Both biological tanks were aerated by using three different types of aeration systems - perforated pipes, membrane air diffusers and tube ceramic diffusers. The possibility of homogenizing the water mass with each of the air diffusion systems was evaluated comparatively. The oxygen concentration was determined by optical sensors with data logging. The experimental data was analyzed comparatively for all three different air dispersion systems aiming to identify the oxygen concentration variation during different operational conditions. The Oxygenation Capacity was calculated for each of the three systems and used as performance and selection parameter. The global mass transfer coefficients were also evaluated as important tools in designing the aeration system. Even though using the tubular porous diffusers leads to higher oxygen concentration compared to the perforated pipe system (which provides medium-sized bubbles in the aqueous solution), it doesn’t achieve the threshold limit of 80% oxygen saturation in less than 30 minutes. The study has shown that the optimal solution for the studied configuration was the radial air diffusers which ensure an oxygen saturation of 80% in 20 minutes. An increment of the values was identified when the air flow was increased.

Keywords: Flow, aeration, bioreactor, oxygen concentration.

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Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

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An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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Authors: Noor H Jabarullah

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In the past many uneconomic solutions for limitation and interruption of short-circuit currents in low power applications have been introduced, especially polymer switch based on the positive temperature coefficient of resistance (PCTR) concept. However there are many limitations in the active material, which consists of conductive fillers. This paper presents a significantly improved and simplified approach that replaces the existing current limiters with faster switching elements. Its elegance lies in the remarkable simplicity and low-cost processes of producing the device using polyaniline (PANI) doped with methane-sulfonic acid (MSA). Samples characterized as lying in the metallic and critical regimes of metal insulator transition have been studied by means of electrical performance in the voltage range from 1V to 5 V under different environmental conditions. Moisture presence is shown to increase the resistivity and also improved its current limiting performance. Additionally, the device has also been studied for electrical resistivity in the temperature range 77 K-300 K. The temperature dependence of the electrical conductivity gives evidence for a transport mechanism based on variable range hopping in three dimensions.

Keywords: Conducting polymer, current limiter, intrinsic, moisture dependence, polyaniline, resettable, surge protection.

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Authors: Khryslyn Araño, Dela Cruz, Michael Leo, Dela Pena, Eden May, Leslie Joy Diaz

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Montmorillonite (MMT) is a very abundant clay mineral and is versatile such that it can be chemically or physically altered by changing the ions between the sheets of its layered structure. This clay mineral can be prepared into functional nanoparticles that can be used as fillers in other nanomaterials such as nanofibers to achieve special properties. In this study, two types of iron-modified MMT, Iron-MMT (FeMMT) and Zero Valent Iron-MMT (ZVIMMT) were synthesized via ion exchange technique. The modified clay was incorporated in polymer nanofibers which were produced using a process called electrospinning. ICP analysis confirmed that clay modification was successful where there is an observed decrease in the concentration of Na and an increase in the concentration of Fe after ion exchange. XRD analysis also confirmed that modification took place because of the changes in the d-spacing of Na-MMT from 11.5 Å to 13.6 Å and 12.6 Å after synthesis of FeMMT and ZVIMMT, respectively. SEM images of the electrospun nanofibers revealed that the ZVIMMT-filled fibers have a smaller average diameter than the FeMMT-filled fibers because of the lower resistance of the suspensions of the former to the elongation force from the applied electric field. The resistance to the electric field was measured by getting the bulk voltage of the suspensions.

Keywords: Electrospinning, nanofibers, montmorillonite.

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Authors: Sundararajan Sangeetha, Joseph Jesu Christopher, Swaminathan Ramakrishnan

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In this work, the primary compressive strength components of human femur trabecular bone are qualitatively assessed using image processing and wavelet analysis. The Primary Compressive (PC) component in planar radiographic femur trabecular images (N=50) is delineated by semi-automatic image processing procedure. Auto threshold binarization algorithm is employed to recognize the presence of mineralization in the digitized images. The qualitative parameters such as apparent mineralization and total area associated with the PC region are derived for normal and abnormal images.The two-dimensional discrete wavelet transforms are utilized to obtain appropriate features that quantify texture changes in medical images .The normal and abnormal samples of the human femur are comprehensively analyzed using Harr wavelet.The six statistical parameters such as mean, median, mode, standard deviation, mean absolute deviation and median absolute deviation are derived at level 4 decomposition for both approximation and horizontal wavelet coefficients. The correlation coefficient of various wavelet derived parameters with normal and abnormal for both approximated and horizontal coefficients are estimated. It is seen that in almost all cases the abnormal show higher degree of correlation than normals. Further the parameters derived from approximation coefficient show more correlation than those derived from the horizontal coefficients. The parameters mean and median computed at the output of level 4 Harr wavelet channel was found to be a useful predictor to delineate the normal and the abnormal groups.

Keywords: Image processing, planar radiographs, trabecular bone and wavelet analysis.

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Authors: Yao Wu

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In the context of financial globalization, China has put forward the policy goal of high-quality development, and the digital economy, with its advantage of information resources, is driving China's export trade to achieve high-quality development. Due to the long-standing financing constraints of small and medium-sized export enterprises, how to expand the export scale of small and medium-sized enterprises has become a major threshold for the development of China's export trade. This paper firstly adopts the hierarchical analysis method to establish the evaluation system of high-quality development of China's export trade; secondly, the panel data of 30 provinces in China from 2011 to 2018 are selected for empirical analysis to establish the impact model of digital inclusive finance on the high-quality development of China's export trade; based on the analysis of the heterogeneous enterprise trade model, a mediating effect model is established to verify the mediating role of credit constraint in the development of high-quality export trade in China. Based on the above analysis, this paper concludes that inclusive digital finance, with its unique digital and inclusive nature, alleviates the credit constraint problem among SMEs, enhances the binary marginal effect of SMEs' exports, optimizes their export scale and structure, and promotes the high-quality development of regional and even national export trade. Finally, based on the findings of this paper, we propose insights and suggestions for inclusive digital finance to promote the high-quality development of export trade.

Keywords: Digital inclusive finance, high-quality development of export trade, fixed effects, binary marginal effects.

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Authors: Gaddafi S. Shehu, T. Yalcinoz, Abdullahi B. Kunya

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Multilevel inverters such as flying capacitor, diodeclamped, and cascaded H-bridge inverters are very popular particularly in medium and high power applications. This paper focuses on a cascaded H-bridge module using a single direct current (DC) source in order to generate an 11-level output voltage. The noble approach reduces the number of switches and gate drivers, in comparison with a conventional method. The anticipated topology produces more accurate result with an isolation transformer at high switching frequency. Different modulation techniques can be used for the multilevel inverter, but this work features modulation techniques known as selective harmonic elimination (SHE).This modulation approach reduces the number of carriers with reduction in Switching Losses, Total Harmonic Distortion (THD), and thereby increasing Power Quality (PQ). Based on the simulation result obtained, it appears SHE has the ability to eliminate selected harmonics by chopping off the fundamental output component. The performance evaluation of the proposed cascaded multilevel inverter is performed using PSIM simulation package and THD of 0.94% is obtained.

Keywords: Cascaded H-bridge Multilevel Inverter, Power Quality, Selective Harmonic Elimination.

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Authors: J. Daba, J. Dubois

Abstract:

In this work, we improve a previously developed segmentation scheme aimed at extracting edge information from speckled images using a maximum likelihood edge detector. The scheme was based on finding a threshold for the probability density function of a new kernel defined as the arithmetic mean-to-geometric mean ratio field over a circular neighborhood set and, in a general context, is founded on a likelihood random field model (LRFM). The segmentation algorithm was applied to discriminated speckle areas obtained using simple elliptic discriminant functions based on measures of the signal-to-noise ratio with fractional order moments. A rigorous stochastic analysis was used to derive an exact expression for the cumulative density function of the probability density function of the random field. Based on this, an accurate probability of error was derived and the performance of the scheme was analysed. The improved segmentation scheme performed well for both simulated and real images and showed superior results to those previously obtained using the original LRFM scheme and standard edge detection methods. In particular, the false alarm probability was markedly lower than that of the original LRFM method with oversegmentation artifacts virtually eliminated. The importance of this work lies in the development of a stochastic-based segmentation, allowing an accurate quantification of the probability of false detection. Non visual quantification and misclassification in medical ultrasound speckled images is relatively new and is of interest to clinicians.

Keywords: Discriminant function, false alarm, segmentation, signal-to-noise ratio, skewness, speckle.

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Authors: Asma M. Milad, Mohammad B. Kassim, Wan R. Daud

Abstract:

Highly ordered TiO2 nanotube (TNT) arrays were fabricated onto a pre-treated titanium foil by anodic oxidation with a voltage of 20V in phosphoric acid/sodium fluoride electrolyte. A pretreatment of titanium foil involved washing with acetone, isopropanol, ethanol and deionized water. Carbon doped TiO2 nanotubes (C-TNT) was fabricated 'in-situ' with the same method in the presence of polyvinyl alcohol and urea as carbon sources. The affects of polyvinyl alcohol concentration and oxidation time on the composition, morphology and structure of the C-TN were studied by FE-SEM, EDX and XRD techniques. FESEM images of the nanotubes showed uniform arrays of C-TNTs. The density and microstructures of the nanotubes were greatly affected by the content of PVA. The introduction of the polyvinyl alcohol into the electrolyte increases the amount of C content inside TiO2 nanotube arrays uniformly. The influence of carbon content on the photo-current of C-TNT was investigated and the I-V profiles of the nanotubes were established. The preliminary results indicated that the 'in-situ' doping technique produced a superior quality nanotubes compared to post doping techniques.

Keywords: Anodization, photoelectrochemical cell, 'in-situ', post doping, thin film, and titania nanotube arrays.

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Authors: Hassen M. Ouakad

Abstract:

In this paper, the influence of van der Waals, as well as electrostatic forces on the structural behavior of MEMS and NEMS actuators, has been investigated using of a Euler-Bernoulli beam continuous model. In the proposed nonlinear model, the electrostatic fringing-fields and the mid-plane stretching (geometric nonlinearity) effects have been considered. The nonlinear integro-differential equation governing the static structural behavior of the actuator has been derived. An original Galerkin-based reduced-order model has been developed to avoid problems arising from the nonlinearities in the differential equation. The obtained reduced-order model equations have been solved numerically using the Newton-Raphson method. The basic design parameters such as the pull-in parameters (voltage and deflection at pull-in), as well as the detachment length due to the van der Waals force of some investigated micro- and nano-actuators have been calculated. The obtained numerical results have been compared with some other existing methods (finite-elements method and finite-difference method) and the comparison showed good agreement among all assumed numerical techniques.

Keywords: MEMS, NEMS, fringing-fields, mid-plane stretching, Galerkin method.

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Authors: Jörg Lenhardt, Wolfram Schiffmann, Jörg Keller

Abstract:

While the feature sizes of recent Complementary Metal Oxid Semiconductor (CMOS) devices decrease the influence of static power prevails their energy consumption. Thus, power savings that benefit from Dynamic Frequency and Voltage Scaling (DVFS) are diminishing and temporal shutdown of cores or other microchip components become more worthwhile. A consequence of powering off unused parts of a chip is that the relative difference between idle and fully loaded power consumption is increased. That means, future chips and whole server systems gain more power saving potential through power-aware load balancing, whereas in former times this power saving approach had only limited effect, and thus, was not widely adopted. While powering off complete servers was used to save energy, it will be superfluous in many cases when cores can be powered down. An important advantage that comes with that is a largely reduced time to respond to increased computational demand. We include the above developments in a server power model and quantify the advantage. Our conclusion is that strategies from datacenters when to power off server systems might be used in the future on core level, while load balancing mechanisms previously used at core level might be used in the future at server level.

Keywords: Power efficiency, static power consumption, dynamic power consumption, CMOS.

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Authors: J. K Adedeji, O. H Olowomofe, C. O Alo, S.T Ijatuyi

Abstract:

The issue of high blood sugar level, the effects of which might end up as diabetes mellitus, is now becoming a rampant cardiovascular disorder in our community. In recent times, a lack of awareness among most people makes this disease a silent killer. The situation calls for urgency, hence the need to design a device that serves as a monitoring tool such as a wrist watch to give an alert of the danger a head of time to those living with high blood glucose, as well as to introduce a mechanism for checks and balances. The neural network architecture assumed 8-15-10 configuration with eight neurons at the input stage including a bias, 15 neurons at the hidden layer at the processing stage, and 10 neurons at the output stage indicating likely symptoms cases. The inputs are formed using the exclusive OR (XOR), with the expectation of getting an XOR output as the threshold value for diabetic symptom cases. The neural algorithm is coded in Java language with 1000 epoch runs to bring the errors into the barest minimum. The internal circuitry of the device comprises the compatible hardware requirement that matches the nature of each of the input neurons. The light emitting diodes (LED) of red, green, and yellow colors are used as the output for the neural network to show pattern recognition for severe cases, pre-hypertensive cases and normal without the traces of diabetes mellitus. The research concluded that neural network is an efficient Accu-Chek design tool for the proper monitoring of high glucose levels than the conventional methods of carrying out blood test.

Keywords: Accu-Chek, diabetes, neural network, pattern recognition.

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