Search results for: fixed ΔT circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1171

Search results for: fixed ΔT circuit

1021 Performance Enhancement of Analog Voltage Inverter with Adaptive Gain Control for Capacitive Load

Authors: Sun-Ki Hong, Yong-Ho Cho, Ki-Seok Kim, Tae-Sam Kang

Abstract:

Piezoelectric actuator is treated as RC load when it is modeled electrically. For some piezoelectric actuator applications, arbitrary voltage is required to actuate. Especially for unidirectional arbitrary voltage driving like as sine wave, some special inverter with circuit that can charge and discharge the capacitive energy can be used. In this case, the difference between power supply level and the object voltage level for RC load is varied. Because the control gain is constant, the controlled output is not uniform according to the voltage difference. In this paper, for charge and discharge circuit for unidirectional arbitrary voltage driving for piezoelectric actuator, the controller gain is controlled according to the voltage difference. With the proposed simple idea, the load voltage can have controlled smoothly although the voltage difference is varied. The appropriateness is proved from the simulation of the proposed circuit.

Keywords: Analog voltage inverter, Capacitive load, Gain control, DC-DC converter, Piezoelectric, Voltage waveform.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1714
1020 New Design of a Broadband Microwave Zero Bias Power Limiter

Authors: K. Echchakhaoui, E. Abdelmounim, J. Zbitou, H. Bennis, N. Ababssi, M. Latrach

Abstract:

In this paper a new design of a broadband microwave power limiter is presented and validated into simulation by using ADS software (Advanced Design System) from Agilent technologies. The final circuit is built on microstrip lines by using identical Zero Bias Schottky diodes. The power limiter is designed by Associating 3 stages Schottky diodes. The obtained simulation results permit to validate this circuit with a threshold input power level of 0 dBm until a maximum input power of 30 dBm.

Keywords: Limiter, microstrip, zero-biais.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3755
1019 An Inductive Coupling Based CMOS Wireless Powering Link for Implantable Biomedical Applications

Authors: Lei Yao, Jia Hao Cheong, Rui-Feng Xue, Minkyu Je

Abstract:

A closed-loop controlled wireless power transmission circuit block for implantable biomedical applications is described in this paper. The circuit consists of one front-end rectifier, power management sub-block including bandgap reference and low drop-out regulators (LDOs) as well as transmission power detection / feedback circuits. Simulation result shows that the front-end rectifier achieves 80% power efficiency with 750-mV single-end peak-to-peak input voltage and 1.28-V output voltage under load current of 4 mA. The power management block can supply 1.8mA average load current under 1V consuming only 12μW power, which is equivalent to 99.3% power efficiency. The wireless power transmission block described in this paper achieves a maximum power efficiency of 80%. The wireless power transmission circuit block is designed and implemented using UMC 65-nm CMOS/RF process. It occupies 1 mm × 1.2 mm silicon area.

Keywords: Implantable biomedical devices, wireless power transfer, LDO, rectifier, closed-loop power control

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2244
1018 Analysis of Fixed Beamforming Algorithms for Smart Antenna Systems

Authors: Muhammad Umair Shahid, Abdul Rehman, Mudassir Mukhtar, Muhammad Nauman

Abstract:

The smart antenna is the prominent technology that has become known in recent years to meet the growing demands of wireless communications. In an overcrowded atmosphere, its application is growing gradually. A methodical evaluation of the performance of Fixed Beamforming algorithms for smart antennas such as Multiple Sidelobe Canceller (MSC), Maximum Signal-to-interference ratio (MSIR) and minimum variance (MVDR) has been comprehensively presented in this paper. Simulation results show that beamforming is helpful in providing optimized response towards desired directions. MVDR beamformer provides the most optimal solution.

Keywords: Fixed weight beamforming, array pattern, signal to interference ratio, power efficiency, element spacing, array elements, optimum weight vector.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 709
1017 Using the Simple Fixed Rate Approach to Solve Economic Lot Scheduling Problem under the Basic Period Approach

Authors: Yu-Jen Chang, Yun Chen, Hei-Lam Wong

Abstract:

The Economic Lot Scheduling Problem (ELSP) is a valuable mathematical model that can support decision-makers to make scheduling decisions. The basic period approach is effective for solving the ELSP. The assumption for applying the basic period approach is that a product must use its maximum production rate to be produced. However, a product can lower its production rate to reduce the average total cost when a facility has extra idle time. The past researches discussed how a product adjusts its production rate under the common cycle approach. To the best of our knowledge, no studies have addressed how a product lowers its production rate under the basic period approach. This research is the first paper to discuss this topic. The research develops a simple fixed rate approach that adjusts the production rate of a product under the basic period approach to solve the ELSP. Our numerical example shows our approach can find a better solution than the traditional basic period approach. Our mathematical model that applies the fixed rate approach under the basic period approach can serve as a reference for other related researches.

Keywords: Economic Lot, Basic Period, Genetic Algorithm, Fixed Rate.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1902
1016 Comparison of CPW Fed Microstrip Patch Antennas with Varied Ground Structures for Fixed Satellite Applications

Authors: Deepanshu Kaushal, T. Shanmuganantham

Abstract:

This paper draws a comparison between two microstrip patch antennas having different ground structures. The designs utilize 45 mm x 40 mm x 1.6 mm FR4 epoxy substrate (relative permittivity of 4.4 and dielectric loss tangent of 0.02) and CPW feeding technique. The design 1 uses conducting partial ground plates along the two sides of the radiating X’mas tree shaped patch. The design 2 utilizes an X’mas tree shaped slotted ground structure that features a circular radiating patch. A comparative analysis of results of both designs has been carried. The two designs are intended to serve the fixed satellite applications in X and Ku band respectively.

Keywords: CPW feed, partial ground structures, slotted ground structures, fixed satellite applications.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 720
1015 Design, Analysis and Modeling of Dual Band Microstrip Loop Antenna Using Defective Ground Plane

Authors: R. Bansal, A. Jain, M. Kumar, R. S. Meena

Abstract:

Present wireless communication demands compact and intelligent devices with multitasking capabilities at affordable cost. The focus in the presented paper is on a dual band antenna for wireless communication with the capability of operating at two frequency bands with same structure. Two resonance frequencies are observed with the second operation band at 4.2GHz approximately three times the first resonance frequency at 1.5GHz. Structure is simple loop of microstrip line with characteristic impedance 50 ohms. The proposed antenna is designed using defective ground structure (DGS) and shows the nearly one third reductions in size as compared to without DGS. This antenna was simulated on electromagnetic (EM) simulation software and fabricated using microwave integrated circuit technique on RT-Duroid dielectric substrate (εr= 2.22) of thickness (H=15 mils). The designed antenna was tested on automatic network analyzer and shows the good agreement with simulated results. The proposed structure is modeled into an equivalent electrical circuit and simulated on circuit simulator. Subsequently, theoretical analysis was carried out and simulated. The simulated, measured, equivalent circuit response, and theoretical results shows good resemblance. The bands of operation draw many potential applications in today’s wireless communication.

Keywords: Defective Ground plane, Dual band, Loop Antenna, Microstrip antenna, Resonance frequency.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3727
1014 Circuit Breaker and Transformer Monitoring

Authors: M.Nafar, A.H.Gheisari, A.Alesaadi

Abstract:

Since large power transformers are the most expensive and strategically important components of any power generator and transmission system, their reliability is crucially important for the energy system operation. Also, Circuit breakers are very important elements in the power transmission line so monitoring the events gives a knowledgebase to determine time to the next maintenance. This paper deals with the introduction of the comparative method of the state estimation of transformers and Circuit breakers using continuous monitoring of voltage, current. This paper gives details a new method based on wavelet to apparatus insulation monitoring. In this paper to insulation monitoring of transformer, a new method based on wavelet transformation and neutral point analysis is proposed. Using the EMTP tools, fault in transformer winding and the detailed transformer winding model were simulated. The current of neutral point of winding was analyzed by wavelet transformation. It is shown that the neutral current of the transformer winding has useful information about fault in insulation of the transformer.

Keywords: Wavelet, Power Transformer, EMTP, CircuitBreaker, Monitoring

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2002
1013 CFD Study on the Effect of Primary Air on Combustion of Simulated MSW Process in the Fixed Bed

Authors: Rui Sun, Tamer M. Ismail, Xiaohan Ren, M. Abd El-Salam

Abstract:

Incineration of municipal solid waste (MSW) is one of the key scopes in the global clean energy strategy. A computational fluid dynamics (CFD) model was established in order to reveal these features of the combustion process in a fixed porous bed of MSW. Transporting equations and process rate equations of the waste bed were modeled and set up to describe the incineration process, according to the local thermal conditions and waste property characters. Gas phase turbulence was modeled using k-ε turbulent model and the particle phase was modeled using the kinetic theory of granular flow. The heterogeneous reaction rates were determined using Arrhenius eddy dissipation and the Arrhenius-diffusion reaction rates. The effects of primary air flow rate and temperature in the burning process of simulated MSW are investigated experimentally and numerically. The simulation results in bed are accordant with experimental data well. The model provides detailed information on burning processes in the fixed bed, which is otherwise very difficult to obtain by conventional experimental techniques.

Keywords: Computational Fluid Dynamics (CFD) model, Waste Incineration, Municipal Solid Waste (MSW), Fixed Bed, Primary air.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2670
1012 Versatile Dual-Mode Class-AB Four-Quadrant Analog Multiplier

Authors: Montree Kumngern, Kobchai Dejhan

Abstract:

Versatile dual-mode class-AB CMOS four-quadrant analog multiplier circuit is presented. The dual translinear loops and current mirrors are the basic building blocks in realization scheme. This technique provides; wide dynamic range, wide-bandwidth response and low power consumption. The major advantages of this approach are; its has single ended inputs; since its input is dual translinear loop operate in class-AB mode which make this multiplier configuration interesting for low-power applications; current multiplying, voltage multiplying, or current and voltage multiplying can be obtainable with balanced input. The simulation results of versatile analog multiplier demonstrate a linearity error of 1.2 %, a -3dB bandwidth of about 19MHz, a maximum power consumption of 0.46mW, and temperature compensated. Operation of versatile analog multiplier was also confirmed through an experiment using CMOS transistor array.

Keywords: Class-AB, dual-mode CMOS analog multiplier, CMOS analog integrated circuit, CMOS translinear integrated circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2239
1011 A Fixed Band Hysteresis Current Controller for Voltage Source AC Chopper

Authors: K. Derradji Belloum, A. Moussi

Abstract:

Most high-performance ac drives utilize a current controller. The controller switches a voltage source inverter (VSI) such that the motor current follows a set of reference current waveforms. Fixed-band hysteresis (FBH) current control has been widely used for the PWM inverter. We want to apply the same controller for the PWM AC chopper. The aims of the controller is to optimize the harmonic content at both input and output sides, while maintaining acceptable losses in the ac chopper and to control in wide range the fundamental output voltage. Fixed band controller has been simulated and analyzed for a single-phase AC chopper and are easily extended to three-phase systems. Simulation confirmed the advantages and the excellent performance of the modulation method applied for the AC chopper.

Keywords: AC chopper, Current controller, Distortion factor, Hysteresis, Input Power Factor, PWM.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 3540
1010 A Comprehensive Evaluation of Supervised Machine Learning for the Phase Identification Problem

Authors: Brandon Foggo, Nanpeng Yu

Abstract:

Power distribution circuits undergo frequent network topology changes that are often left undocumented. As a result, the documentation of a circuit’s connectivity becomes inaccurate with time. The lack of reliable circuit connectivity information is one of the biggest obstacles to model, monitor, and control modern distribution systems. To enhance the reliability and efficiency of electric power distribution systems, the circuit’s connectivity information must be updated periodically. This paper focuses on one critical component of a distribution circuit’s topology - the secondary transformer to phase association. This topology component describes the set of phase lines that feed power to a given secondary transformer (and therefore a given group of power consumers). Finding the documentation of this component is call Phase Identification, and is typically performed with physical measurements. These measurements can take time lengths on the order of several months, but with supervised learning, the time length can be reduced significantly. This paper compares several such methods applied to Phase Identification for a large range of real distribution circuits, describes a method of training data selection, describes preprocessing steps unique to the Phase Identification problem, and ultimately describes a method which obtains high accuracy (> 96% in most cases, > 92% in the worst case) using only 5% of the measurements typically used for Phase Identification.

Keywords: Distribution network, machine learning, network topology, phase identification, smart grid.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1008
1009 Power Reduction by Automatic Monitoring and Control System in Active Mode

Authors: Somaye Abdollahi Pour, Mohsen Saneei

Abstract:

This paper describes a novel monitoring scheme to minimize total active power in digital circuits depend on the demand frequency, by adjusting automatically both supply voltage and threshold voltages based on circuit operating conditions such as temperature, process variations, and desirable frequency. The delay monitoring results, will be control and apply so as to be maintained at the minimum value at which the chip is able to operate for a given clock frequency. Design details of power monitor are examined using simulation framework in 32nm BTPM model CMOS process. Experimental results show the overhead of proposed circuit in terms of its power consumption is about 40 μW for 32nm technology; moreover the results show that our proposed circuit design is not far sensitive to the temperature variations and also process variations. Besides, uses the simple blocks which offer good sensitivity, high speed, the continuously feedback loop. This design provides up to 40% reduction in power consumption in active mode.

Keywords: active mode, delay monitor, body biasing, VDD scaling, low power.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1806
1008 Study on the Characteristics of the Measurement System for pH Array Sensors

Authors: Jung-Chuan Chou, Wei-Lun Hsia

Abstract:

A measurement system for pH array sensors is introduced to increase accuracy, and decrease non-ideal effects successfully. An array readout circuit reads eight potentiometric signals at the same time, and obtains an average value. The deviation value or the extreme value is counteracted and the output voltage is a relatively stable value. The errors of measuring pH buffer solutions are decreased obviously with this measurement system, and the non-ideal effects, drift and hysteresis, are lowered to 1.638mV/hr and 1.118mV, respectively. The efficiency and stability are better than single sensor. The whole sensing characteristics are improved.

Keywords: Array sensors, measurement system, non-ideal effects, pH sensor, readout circuit.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1649
1007 Analysis on Modeling and Simulink of DC Motor and its Driving System Used for Wheeled Mobile Robot

Authors: Wai Phyo Aung

Abstract:

Wheeled Mobile Robots (WMRs) are built with their Wheels- drive machine, Motors. Depend on their desire design of WMR, Technicians made used of DC Motors for motion control. In this paper, the author would like to analyze how to choose DC motor to be balance with their applications of especially for WMR. Specification of DC Motor that can be used with desire WMR is to be determined by using MATLAB Simulink model. Therefore, this paper is mainly focus on software application of MATLAB and Control Technology. As the driving system of DC motor, a Peripheral Interface Controller (PIC) based control system is designed including the assembly software technology and H-bridge control circuit. This Driving system is used to drive two DC gear motors which are used to control the motion of WMR. In this analyzing process, the author mainly focus the drive system on driving two DC gear motors that will control with Differential Drive technique to the Wheeled Mobile Robot . For the design analysis of Motor Driving System, PIC16F84A is used and five inputs of sensors detected data are tested with five ON/OFF switches. The outputs of PIC are the commands to drive two DC gear motors, inputs of Hbridge circuit .In this paper, Control techniques of PIC microcontroller and H-bridge circuit, Mechanism assignments of WMR are combined and analyzed by mainly focusing with the “Modeling and Simulink of DC Motor using MATLAB".

Keywords: Control System Design, DC Motors, DifferentialDrive, H-bridge control circuit, MATLAB Simulink model, Peripheral Interface Controller (PIC), Wheeled Mobile Robots.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 11222
1006 Symmetrical Analysis of a Six-Phase Induction Machine Under Fault Conditions

Authors: E. K.Appiah, G. M'boungui, A. A. Jimoh, J. L. Munda, A.S.O. Ogunjuyigbe

Abstract:

The operational behavior of a six-phase squirrel cage induction machine with faulted stator terminals is presented in this paper. The study is carried out using the derived mathematical model of the machine in the arbitrary reference frame. Tests are conducted on a 1 kW experimental machine. Steady-state and dynamic performance are analyzed for the machine unloaded and loaded conditions. The results shows that with one of the stator phases experiencing either an open- circuit or short circuit fault the machine still produces starting torque, albeit the running performance is significantly derated.

Keywords: Performance, fault conditions, six-phase induction machine.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2781
1005 A Direct Down-conversion Receiver for Low-power Wireless Sensor Networks

Authors: Gianluca Cornetta, Abdellah Touhafi, David J. Santos, Jose Manuel Vazquez

Abstract:

A direct downconversion receiver implemented in 0.13 μm 1P8M process is presented. The circuit is formed by a single-end LNA, an active balun for conversion into balanced mode, a quadrature double-balanced passive switch mixer and a quadrature voltage-controlled oscillator. The receiver operates in the 2.4 GHz ISM band and complies with IEEE 802.15.4 (ZigBee) specifications. The circuit exhibits a very low noise figure of only 2.27 dB and dissipates only 14.6 mW with a 1.2 V supply voltage and is hence suitable for low-power applications.

Keywords: LNA, Active Balun, Passive Mixer, VCO, IEEE 802.15.4(ZigBee).

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2301
1004 Electrical Equivalent Analysis of Micro Cantilever Beams for Sensing Applications

Authors: B. G. Sheeparamatti, J. S. Kadadevarmath

Abstract:

Microcantilevers are the basic MEMS devices, which can be used as sensors, actuators and electronics can be easily built into them. The detection principle of microcantilever sensors is based on the measurement of change in cantilever deflection or change in its resonance frequency. The objective of this work is to explore the analogies between mechanical and electrical equivalent of microcantilever beams. Normally scientists and engineers working in MEMS use expensive software like CoventorWare, IntelliSuite, ANSYS/Multiphysics etc. This paper indicates the need of developing electrical equivalent of the MEMS structure and with that, one can have a better insight on important parameters, and their interrelation of the MEMS structure. In this work, considering the mechanical model of microcantilever, equivalent electrical circuit is drawn and using force-voltage analogy, it is analyzed with circuit simulation software. By doing so, one can gain access to powerful set of intellectual tools that have been developed for understanding electrical circuits Later the analysis is performed using ANSYS/Multiphysics - software based on finite element method (FEM). It is observed that both mechanical and electrical domain results for a rectangular microcantlevers are in agreement with each other.

Keywords: Electrical equivalent circuit analogy, FEM analysis, micro cantilevers, micro sensors.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2416
1003 Optimization by Means of Genetic Algorithm of the Equivalent Electrical Circuit Model of Different Order for Li-ion Battery Pack

Authors: V. Pizarro-Carmona, S. Castano-Solis, M. Cortés-Carmona, J. Fraile-Ardanuy, D. Jimenez-Bermejo

Abstract:

The purpose of this article is to optimize the Equivalent Electric Circuit Model (EECM) of different orders to obtain greater precision in the modeling of Li-ion battery packs. Optimization includes considering circuits based on 1RC, 2RC and 3RC networks, with a dependent voltage source and a series resistor. The parameters are obtained experimentally using tests in the time domain and in the frequency domain. Due to the high non-linearity of the behavior of the battery pack, Genetic Algorithm (GA) was used to solve and optimize the parameters of each EECM considered (1RC, 2RC and 3RC). The objective of the estimation is to minimize the mean square error between the measured impedance in the real battery pack and those generated by the simulation of different proposed circuit models. The results have been verified by comparing the Nyquist graphs of the estimation of the complex impedance of the pack. As a result of the optimization, the 2RC and 3RC circuit alternatives are considered as viable to represent the battery behavior. These battery pack models are experimentally validated using a hardware-in-the-loop (HIL) simulation platform that reproduces the well-known New York City cycle (NYCC) and Federal Test Procedure (FTP) driving cycles for electric vehicles. The results show that using GA optimization allows obtaining EECs with 2RC or 3RC networks, with high precision to represent the dynamic behavior of a battery pack in vehicular applications.

Keywords: Li-ion battery packs modeling optimized, EECM, GA, electric vehicle applications.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 485
1002 Positive Solutions of Second-order Singular Differential Equations in Banach Space

Authors: Li Xiguang

Abstract:

In this paper, by constructing a special set and utilizing fixed point index theory, we study the existence of solution for the boundary value problem of second-order singular differential equations in Banach space, which improved and generalize the result of related paper.

Keywords: Banach space, cone, fixed point index, singular equation.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1205
1001 SCR-Based Advanced ESD Protection Device for Low Voltage Application

Authors: Bo Bae Song, Byung Seok Lee, Hyun Young Kim, Chung Kwang Lee, Yong Seo Koo

Abstract:

This paper proposed a silicon controller rectifier (SCR) based ESD protection device to protect low voltage ESD for integrated circuit. The proposed ESD protection device has low trigger voltage and high holding voltage compared with conventional SCR-based ESD protection devices. The proposed ESD protection circuit is verified and compared by TCAD simulation. This paper verified effective low voltage ESD characteristics with low trigger voltage of 5.79V and high holding voltage of 3.5V through optimization depending on design variables (D1, D2, D3 and D4).

Keywords: ESD, SCR, Holding voltage, Latch-up.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2851
1000 Perturbation Based Modelling of Differential Amplifier Circuit

Authors: Rahul Bansal, Sudipta Majumdar

Abstract:

This paper presents the closed form nonlinear expressions of bipolar junction transistor (BJT) differential amplifier (DA) using perturbation method. Circuit equations have been derived using Kirchhoff’s voltage law (KVL) and Kirchhoff’s current law (KCL). The perturbation method has been applied to state variables for obtaining the linear and nonlinear terms. The implementation of the proposed method is simple. The closed form nonlinear expressions provide better insights of physical systems. The derived equations can be used for signal processing applications.

Keywords: Differential amplifier, perturbation method, Taylor series.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 965
999 Accurate Time Domain Method for Simulation of Microstructured Electromagnetic and Photonic Structures

Authors: Vijay Janyani, Trevor M. Benson, Ana Vukovic

Abstract:

A time-domain numerical model within the framework of transmission line modeling (TLM) is developed to simulate electromagnetic pulse propagation inside multiple microcavities forming photonic crystal (PhC) structures. The model developed is quite general and is capable of simulating complex electromagnetic problems accurately. The field quantities can be mapped onto a passive electrical circuit equivalent what ensures that TLM is provably stable and conservative at a local level. Furthermore, the circuit representation allows a high level of hybridization of TLM with other techniques and lumped circuit models of components and devices. A photonic crystal structure formed by rods (or blocks) of high-permittivity dieletric material embedded in a low-dielectric background medium is simulated as an example. The model developed gives vital spatio-temporal information about the signal, and also gives spectral information over a wide frequency range in a single run. The model has wide applications in microwave communication systems, optical waveguides and electromagnetic materials simulations.

Keywords: Computational Electromagnetics, Numerical Simulation, Transmission Line Modeling.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1587
998 Optimizing the Number of Bits/Stage in 10-Bit, 50Ms/Sec Pipelined A/D Converter Considering Area, Speed, Power and Linearity

Authors: P. Prasad Rao, K. Lal Kishore

Abstract:

Pipeline ADCs are becoming popular at high speeds and with high resolution. This paper discusses the options of number of bits/stage conversion techniques in pipelined ADCs and their effect on Area, Speed, Power Dissipation and Linearity. The basic building blocks like op-amp, Sample and Hold Circuit, sub converter, DAC, Residue Amplifier used in every stage is assumed to be identical. The sub converters use flash architectures. The design is implemented using 0.18

Keywords: 1.5 bits/stage, Conversion Frequency, Redundancy Switched Capacitor Sample and Hold Circuit

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1682
997 Positive Solutions for Systems of Nonlinear Third-Order Differential Equations with p-Laplacian

Authors: Li Xiguang

Abstract:

In this paper, by constructing a special set and utilizing fixed point theory, we study the existence and multiplicity of the positive solutions for systems of nonlinear third-order differential equations with p-laplacian, which improve and generalize the result of related paper.

Keywords: p-Laplacian, cone, fixed point theorem, positive solution.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 547
996 A Fault-Tolerant Full Adder in Double Pass CMOS Transistor

Authors: Abdelmonaem Ayachi, Belgacem Hamdi

Abstract:

This paper presents a fault-tolerant implementation for adder schemes using the dual duplication code. To prove the efficiency of the proposed method, the circuit is simulated in double pass transistor CMOS 32nm technology and some transient faults are voluntary injected in the Layout of the circuit. This fully differential implementation requires only 20 transistors which mean that the proposed design involves 28.57% saving in transistor count compared to standard CMOS technology.

Keywords: Semiconductors, digital electronics, double pass transistor technology, Full adder, fault tolerance.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2059
995 Very High Speed Data Driven Dynamic NAND Gate at 22nm High K Metal Gate Strained Silicon Technology Node

Authors: Shobha Sharma, Amita Dev

Abstract:

Data driven dynamic logic is the high speed dynamic circuit with low area. The clock of the dynamic circuit is removed and data drives the circuit instead of clock for precharging purpose. This data driven dynamic nand gate is given static forward substrate biasing of Vsupply/2 as well as the substrate bias is connected to the input data, resulting in dynamic substrate bias. The dynamic substrate bias gives the shortest propagation delay with a penalty on the power dissipation. Propagation delay is reduced by 77.8% compared to the normal reverse substrate bias Data driven dynamic nand. Also dynamic substrate biased D3nand’s propagation delay is reduced by 31.26% compared to data driven dynamic nand gate with static forward substrate biasing of Vdd/2. This data driven dynamic nand gate with dynamic body biasing gives us the highest speed with no area penalty and finds its applications where power penalty is acceptable. Also combination of Dynamic and static Forward body bias can be used with reduced propagation delay compared to static forward biased circuit and with comparable increase in an average power. The simulations were done on hspice simulator with 22nm High-k metal gate strained Si technology HP models of Arizona State University, USA.

Keywords: Data driven nand gate, dynamic substrate biasing, nand gate, static substrate biasing.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1570
994 A Simple and Efficient Method for Accurate Measurement and Control of Power Frequency Deviation

Authors: S. J. Arif

Abstract:

In the presented technique, a simple method is given for accurate measurement and control of power frequency deviation. The sinusoidal signal for which the frequency deviation measurement is required is transformed to a low voltage level and passed through a zero crossing detector to convert it into a pulse train. Another stable square wave signal of 10 KHz is obtained using a crystal oscillator and decade dividing assemblies (DDA). These signals are combined digitally and then passed through decade counters to give a unique combination of pulses or levels, which are further encoded to make them equally suitable for both control applications and display units. The developed circuit using discrete components has a resolution of 0.5 Hz and completes measurement within 20 ms. The realized circuit is simulated and synthesized using Verilog HDL and subsequently implemented on FPGA. The results of measurement on FPGA are observed on a very high resolution logic analyzer. These results accurately match the simulation results as well as the results of same circuit implemented with discrete components. The proposed system is suitable for accurate measurement and control of power frequency deviation.

Keywords: Digital encoder for frequency measurement, frequency deviation measurement, measurement and control systems, power systems.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1395
993 A Local Invariant Generalized Hough Transform Method for Integrated Circuit Visual Positioning

Authors: Fei Long Wei, Hua Yang, Hai Tao Zhang, Zhou Ping Yin

Abstract:

In this study, an local invariant generalized Houghtransform (LI-GHT) method is proposed for integrated circuit (IC) visual positioning. The original generalized Hough transform (GHT) is robust to external noise; however, it is not suitable for visual positioning of IC chips due to the four-dimensionality (4D) of parameter space which leads to the substantial storage requirement and high computational complexity. The proposed LI-GHT method can reduce the dimensionality of parameter space to 2D thanks to the rotational invariance of local invariant geometric feature and it can estimate the accuracy position and rotation angle of IC chips in real-time under noise and blur influence. The experiment results show that the proposed LI-GHT can estimate position and rotation angle of IC chips with high accuracy and fast speed. The proposed LI-GHT algorithm was implemented in IC visual positioning system of radio frequency identification (RFID) packaging equipment.

Keywords: Integrated Circuit Visual Positioning, Generalized Hough Transform, Local invariant Generalized Hough Transform, ICpacking equipment.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 2174
992 Fixed Points of Contractive-Like Operators by a Faster Iterative Process

Authors: Safeer Hussain Khan

Abstract:

In this paper, we prove a strong convergence result using a recently introduced iterative process with contractive-like operators. This improves andgeneralizes corresponding results in the literature in two ways: iterativeprocess is faster, operators are more general. At the end, we indicatethat the results can also be proved with the iterative process witherror terms.

Keywords: Contractive-like operator, iterative process, fixed point, strong convergence.

Procedia APA BibTeX Chicago EndNote Harvard JSON MLA RIS XML ISO 690 PDF Downloads 1674