Search results for: CMOS analog to digital converter
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1352

Search results for: CMOS analog to digital converter

842 A 1.5V,100MS/s,12-bit Current-Mode CMOSS ample-and-Hold Circuit

Authors: O. Hashemipour, S. G. Nabavi

Abstract:

A high-linearity and high-speed current-mode sampleand- hold circuit is designed and simulated using a 0.25μm CMOS technology. This circuit design is based on low voltage and it utilizes a fully differential circuit. Due to the use of only two switches the switch related noise has been reduced. Signal - dependent -error is completely eliminated by a new zero voltage switching technique. The circuit has a linearity error equal to ±0.05μa, i.e. 12-bit accuracy with a ±160 μa differential output - input signal frequency of 5MHZ, and sampling frequency of 100 MHZ. Third harmonic is equal to –78dB.

Keywords: Zero-voltage-technique, MOS-resistor, OTA, Feedback-resistor.

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841 A Process of Forming a Single Competitive Factor in the Digital Camera Industry

Authors: Kiyohiro Yamazaki

Abstract:

This paper considers a forming process of a single competitive factor in the digital camera industry from the viewpoint of product platform. To make product development easier for companies and to increase product introduction ratios, development efforts concentrate on improving and strengthening certain product attributes, and it is born in the process that the product platform is formed continuously. It is pointed out that the formation of this product platform raises product development efficiency of individual companies, but on the other hand, it has a trade-off relationship of causing unification of competitive factors in the whole industry. This research tries to analyze product specification data which were collected from the web page of digital camera companies. Specifically, this research collected all product specification data released in Japan from 1995 to 2003 and analyzed the composition of image sensor and optical lens; and it identified product platforms shared by multiple products and discussed their application. As a result, this research found that the product platformation was born in the development of the standard product for major market segmentation. Every major company has made product platforms of image sensors and optical lenses, and as a result, this research found that the competitive factors were unified in the entire industry throughout product platformation. In other words, this product platformation brought product development efficiency of individual firms; however, it also caused industrial competition factors to be unified in the industry.

Keywords: Digital camera industry, product evolution trajectory, product platform, unification of competitive factors.

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840 An Efficient Clustering Technique for Copy-Paste Attack Detection

Authors: N. Chaitawittanun, M. Munlin

Abstract:

Due to rapid advancement of powerful image processing software, digital images are easy to manipulate and modify by ordinary people. Lots of digital images are edited for a specific purpose and more difficult to distinguish form their original ones. We propose a clustering method to detect a copy-move image forgery of JPEG, BMP, TIFF, and PNG. The process starts with reducing the color of the photos. Then, we use the clustering technique to divide information of measuring data by Hausdorff Distance. The result shows that the purposed methods is capable of inspecting the image file and correctly identify the forgery.

Keywords: Image detection, forgery image, copy-paste.

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839 Influence of the Paint Coating Thickness in Digital Image Correlation Experiments

Authors: Jesús A. Pérez, Sam Coppieters, Dimitri Debruyne

Abstract:

In the past decade, the use of digital image correlation (DIC) techniques has increased significantly in the area of experimental mechanics, especially for materials behavior characterization. This non-contact tool enables full field displacement and strain measurements over a complete region of interest. The DIC algorithm requires a random contrast pattern on the surface of the specimen in order to perform properly. To create this pattern, the specimen is usually first coated using a white matt paint. Next, a black random speckle pattern is applied using any suitable method. If the applied paint coating is too thick, its top surface may not be able to exactly follow the deformation of the specimen, and consequently, the strain measurement might be underestimated. In the present article, a study of the influence of the paint thickness on the strain underestimation is performed for different strain levels. The results are then compared to typical paint coating thicknesses applied by experienced DIC users. A slight strain underestimation was observed for paint coatings thicker than about 30μm. On the other hand, this value was found to be uncommonly high compared to coating thicknesses applied by DIC users.

Keywords: Digital Image Correlation, paint coating thickness, strain.

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838 Limits of Phase Modulated Frequency Shifted Holographic Vibrometry at Low Amplitudes of Vibrations

Authors: Pavel Psota, Vít Lédl, Jan Václavík, Roman Doleček, Pavel Mokrý, Petr Vojtíšek

Abstract:

This paper presents advanced time average digital holography by means of frequency shift and phase modulation. This technique can measure amplitudes of vibrations at ultimate dynamic range while the amplitude distribution evaluation is done independently in every pixel. The main focus of the paper is to gain insight into behavior of the method at low amplitudes of vibrations. In order to reach that, a set of experiments was performed. Results of the experiments together with novel noise suppression show the limit of the method to be below 0.1 nm.

Keywords: Acousto-optical modulator, digital holography, low amplitudes, vibrometry.

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837 Electrical Characteristics of SCR - based ESD Device for I/O and Power Rail Clamp in 0.35um Process

Authors: Yong Seo Koo, Dong Su Kim, Byung Seok Lee, Won Suk Park, Bo Bea Song

Abstract:

This paper presents a SCR-based ESD protection devices for I/O clamp and power rail clamp, respectably. These devices have a low trigger voltage and high holding voltage characteristics than conventional SCR device. These devices are fabricated by using 0.35um BCD (Bipolar-CMOS-DMOS) processes. These devices were validated using a TLP system. From the experimental results, the device for I/O ESD clamp has a trigger voltage of 5.8V. Also, the device for power rail ESD clamp has a holding voltage of 7.7V.

Keywords: ESD (Electro-Static Discharge), ESD protection device, SCR (Silicon Controlled Rectifier), Latch-up

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836 Design of Novel SCR-based ESD Protection Device for I/O Clamp in BCD Process

Authors: Yong-Seo Koo, Jin-Woo Jung, Byung-Seok Lee, Dong-Su Kim, Yil-Suk Yang

Abstract:

In this paper, a novel LVTSCR-based device for electrostatic discharge (ESD) protection of integrated circuits (ICs) is designed, fabricated and characterized. The proposed device is similar to the conventional LVTSCR but it has an embedded PMOSFET in the anode n-well to enhance the turn on speed, the clamping capability and the robustness. This is possible because the embedded PMOSFET provides the sub-path of ESD discharge current. The TLP, HBM and MM testing are carried out to verify the ESD performance of the proposed devices, which are fabricated in 0.35um (Bipolar-CMOS-DMOS) BCDMOS process. The device has the robustness of 70mA/um that is higher about 60mA/um than the LVTSCR, approximately.

Keywords: ESD Protection, grounded gate NMOS (GGNMOS), low trigger voltage SCR (LVTSCR)

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835 Digital Preservation in Nigeria Universities Libraries: A Comparison between University of Nigeria Nsukka and Ahmadu Bello University Zaria

Authors: Suleiman Musa, Shuaibu Sidi Safiyanu

Abstract:

This study examined the digital preservation in Nigeria university libraries. A comparison between the university of Nigeria Nsukka (UNN) and Ahmadu Bello University Zaria (ABU, Zaria). The study utilized primary source of data obtained from two selected institution librarians. Finding revealed varying results in terms of skills acquired by librarians before and after digitization of the two institutions. The study reports that journals publication, text book, CD-ROMS, conference papers and proceedings, theses, dissertations and seminar papers are among the information resources available for digitization. The study further documents that copyright issue, power failure, and unavailability of needed materials are among the challenges facing the digitization of library of the institution. On the basis of the finding, the study concluded that digitization of library enhances efficiency in organization and retrieval of information services. The study therefore recommended that software should be upgraded with backup, training of the librarians on digital process, installation of antivirus and enhancement of technical collaboration between the library and MIS.

Keywords: Digitalization, preservation, libraries, comparison.

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834 Digital Automatic Gain Control Integrated on WLAN Platform

Authors: Emilija Miletic, Milos Krstic, Maxim Piz, Michael Methfessel

Abstract:

In this work we present a solution for DAGC (Digital Automatic Gain Control) in WLAN receivers compatible to IEEE 802.11a/g standard. Those standards define communication in 5/2.4 GHz band using Orthogonal Frequency Division Multiplexing OFDM modulation scheme. WLAN Transceiver that we have used enables gain control over Low Noise Amplifier (LNA) and a Variable Gain Amplifier (VGA). The control over those signals is performed in our digital baseband processor using dedicated hardware block DAGC. DAGC in this process is used to automatically control the VGA and LNA in order to achieve better signal-to-noise ratio, decrease FER (Frame Error Rate) and hold the average power of the baseband signal close to the desired set point. DAGC function in baseband processor is done in few steps: measuring power levels of baseband samples of an RF signal,accumulating the differences between the measured power level and actual gain setting, adjusting a gain factor of the accumulation, and applying the adjusted gain factor the baseband values. Based on the measurement results of RSSI signal dependence to input power we have concluded that this digital AGC can be implemented applying the simple linearization of the RSSI. This solution is very simple but also effective and reduces complexity and power consumption of the DAGC. This DAGC is implemented and tested both in FPGA and in ASIC as a part of our WLAN baseband processor. Finally, we have integrated this circuit in a compact WLAN PCMCIA board based on MAC and baseband ASIC chips designed from us.

Keywords: WLAN, AGC, RSSI, baseband processor

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833 Performance Analysis of Digital Signal Processors Using SMV Benchmark

Authors: Erh-Wen Hu, Cyril S. Ku, Andrew T. Russo, Bogong Su, Jian Wang

Abstract:

Unlike general-purpose processors, digital signal processors (DSP processors) are strongly application-dependent. To meet the needs for diverse applications, a wide variety of DSP processors based on different architectures ranging from the traditional to VLIW have been introduced to the market over the years. The functionality, performance, and cost of these processors vary over a wide range. In order to select a processor that meets the design criteria for an application, processor performance is usually the major concern for digital signal processing (DSP) application developers. Performance data are also essential for the designers of DSP processors to improve their design. Consequently, several DSP performance benchmarks have been proposed over the past decade or so. However, none of these benchmarks seem to have included recent new DSP applications. In this paper, we use a new benchmark that we recently developed to compare the performance of popular DSP processors from Texas Instruments and StarCore. The new benchmark is based on the Selectable Mode Vocoder (SMV), a speech-coding program from the recent third generation (3G) wireless voice applications. All benchmark kernels are compiled by the compilers of the respective DSP processors and run on their simulators. Weighted arithmetic mean of clock cycles and arithmetic mean of code size are used to compare the performance of five DSP processors. In addition, we studied how the performance of a processor is affected by code structure, features of processor architecture and optimization of compiler. The extensive experimental data gathered, analyzed, and presented in this paper should be helpful for DSP processor and compiler designers to meet their specific design goals.

Keywords: digital signal processors, DSP benchmark, instruction level parallelism, modified cyclomatic complexity, performance analysis.

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832 Automatic Detection and Classification of Microcalcification, Mass, Architectural Distortion and Bilateral Asymmetry in Digital Mammogram

Authors: S. Shanthi, V. Muralibhaskaran

Abstract:

Mammography has been one of the most reliable methods for early detection of breast cancer. There are different lesions which are breast cancer characteristic such as microcalcifications, masses, architectural distortions and bilateral asymmetry. One of the major challenges of analysing digital mammogram is how to extract efficient features from it for accurate cancer classification. In this paper we proposed a hybrid feature extraction method to detect and classify all four signs of breast cancer. The proposed method is based on multiscale surrounding region dependence method, Gabor filters, multi fractal analysis, directional and morphological analysis. The extracted features are input to self adaptive resource allocation network (SRAN) classifier for classification. The validity of our approach is extensively demonstrated using the two benchmark data sets Mammographic Image Analysis Society (MIAS) and Digital Database for Screening Mammograph (DDSM) and the results have been proved to be progressive.

Keywords: Feature extraction, fractal analysis, Gabor filters, multiscale surrounding region dependence method, SRAN.

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831 The Use of Knowledge Management Systems and ICT Service Desk Management to Minimize the Digital Divide Experienced in the Museum Sector

Authors: Ruel A. Welch

Abstract:

Since the introduction of ServiceNow, the UK’s Science Museum Group’s (SMG) ICT service desk portal, there has not been an analysis of the tools available to SMG staff for Just-in-time knowledge acquisition (Knowledge Management Systems) and reporting ICT incidents with a focus on an aspect of professional identity namely, gender. Therefore, it is important for SMG to investigate the apparent disparities so that solutions can be derived to minimize this digital divide if one exists. This study is conducted in the milieu of UK museums, galleries, arts, academic, charitable, and cultural heritage sector. It is acknowledged at SMG that there are challenges with keeping up with an ever-changing digital landscape. Subsequently, this entails the rapid upskilling of staff and developing an infrastructure that supports just-in-time technological knowledge acquisition and reporting technology related issues. This problem was addressed by analysing ServiceNow ICT incident reports and reports from knowledge articles from a six-month period from February to July. This study found a statistically significant relationship between gender and reporting an ICT incident. There is also a significant relationship between gender and the priority level of ICT incident. Interestingly, there is no statistically significant relationship between gender and reading knowledge articles. Additionally, there is no statistically significant relationship between gender and reporting an ICT incident related to the knowledge article that was read by staff. The knowledge acquired from this study is useful to service desk management practice as it will help to inform the creation of future knowledge articles and ICT incident reporting processes.

Keywords: digital divide, ICT service desk practice, knowledge management systems, workplace learning

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830 A Low-Voltage Tunable Channel Selection Filter for WiMAX Applications

Authors: Kayvan Ahmadi, Hossein Shamsi

Abstract:

This paper proposes a low-voltage and low-power fully integrated digitally tuned continuous-time channel selection filter for WiMAX applications. A 5th-order elliptic low-pass filter is realized in a Gm-C topology. The bandwidth of the fully differential filter is reconfigurable from 2.5MHz to 20MHz (8x) for different requirements in WiMAX applications. The filter is simulated in a standard 90nm CMOS process. Simulation results show the THD (@Vout =100mVpp) is less than -66dB. The in-band ripple of the filter is about 0.15dB. The filter consumes 1.5mW from a supply voltage of 0.9V.

Keywords: Common-mode feedback, continuous-time, fully differential transconductor, Gm-C topology, low-voltage

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829 The Roles of Community Based Telecenters in Bridging the Digital Divide in Rural Malaysia

Authors: Zulkefli bin Ibrahim, Ainin Sulaiman, Tengku M. Faziharudean

Abstract:

Malaysia is aggressive in promoting the usage of ICT to its mass population through the support by the government policies and programs targeting the general population. However, with the uneven distribution of the basic telecommunication infrastructure between the urban and rural area, cost for being “interconnected" that is considered high among the poorer rural population and the lack of local contents that suit the rural population needs or lifestyles, it is still a challenge for Malaysia to achieve its Vision 2020 Agenda moving the nation towards an information society by the year 2020. Among the existing programs that have been carried out by the government to encourage the usage of ICT by the rural population is “Kedaikom", a community telecenter with the general aim is to engage the community to get exposed and to use the ICT, encouraging the diffusion of the ICT technology to the rural population. The research investigated by using a questionnaire survey of how Kedaikom, as a community telecenter could play a role in encouraging the rural or underserved community to use the ICT. The result from the survey has proven that the community telecenter could bridge the digital divide between the underserved rural population and the well-accessed urban population in Malaysia. More of the rural population, especially from the younger generation and those with higher educational background are using the community telecenter to be connected to the ICT.

Keywords: Digital divide, ICT, telecenters.

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828 SiC Merged PiN and Schottky (MPS) Power Diodes Electrothermal Modeling in SPICE

Authors: A. Lakrim, D. Tahri

Abstract:

This paper sets out a behavioral macro-model of a Merged PiN and Schottky (MPS) diode based on silicon carbide (SiC). This model holds good for both static and dynamic electrothermal simulations for industrial applications. Its parameters have been worked out from datasheets curves by drawing on the optimization method: Simulated Annealing (SA) for the SiC MPS diodes made available in the industry. The model also adopts the Analog Behavioral Model (ABM) of PSPICE in which it has been implemented. The thermal behavior of the devices was also taken into consideration by making use of Foster’ canonical network as figured out from electro-thermal measurement provided by the manufacturer of the device.

Keywords: SiC MPS Diode, electro-thermal, SPICE Model.

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827 Fabrication and Characterization of Poly-Si Vertical Nanowire Thin Film Transistor

Authors: N. Shen, T. T. Le, H. Y. Yu, Z. X. Chen, K. T. Win, N. Singh, G. Q. Lo, D. -L. Kwong

Abstract:

In this paper, we present a vertical nanowire thin film transistor with gate-all-around architecture, fabricated using CMOS compatible processes. A novel method of fabricating polysilicon vertical nanowires of diameter as small as 30 nm using wet-etch is presented. Both n-type and p-type vertical poly-silicon nanowire transistors exhibit superior electrical characteristics as compared to planar devices. On a poly-crystalline nanowire of 30 nm diameter, high Ion/Ioff ratio of 106, low drain-induced barrier lowering (DIBL) of 50 mV/V, and low sub-threshold slope SS~100mV/dec are demonstrated for a device with channel length of 100 nm.

Keywords: Nanowire (NW), Gate-all-around (GAA), polysilicon (poly-Si), thin-film transistor (TFT).

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826 Enhanced Gram-Schmidt Process for Improving the Stability in Signal and Image Processing

Authors: Mario Mastriani, Marcelo Naiouf

Abstract:

The Gram-Schmidt Process (GSP) is used to convert a non-orthogonal basis (a set of linearly independent vectors) into an orthonormal basis (a set of orthogonal, unit-length vectors). The process consists of taking each vector and then subtracting the elements in common with the previous vectors. This paper introduces an Enhanced version of the Gram-Schmidt Process (EGSP) with inverse, which is useful for signal and image processing applications.

Keywords: Digital filters, digital signal and image processing, Gram-Schmidt Process, orthonormalization.

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825 Information Overload, Information Literacy and Use of Technology by Students

Authors: Elena Krelja Kurelović, Jasminka Tomljanović, Vlatka Davidović

Abstract:

The development of web technologies and mobile devices makes creating, accessing, using and sharing information or communicating with each other simpler every day. However, while the amount of information constantly increasing it is becoming harder to effectively organize and find quality information despite the availability of web search engines, filtering and indexing tools. Although digital technologies have overall positive impact on students’ lives, frequent use of these technologies and digital media enriched with dynamic hypertext and hypermedia content, as well as multitasking, distractions caused by notifications, calls or messages; can decrease the attention span, make thinking, memorizing and learning more difficult, which can lead to stress and mental exhaustion. This is referred to as “information overload”, “information glut” or “information anxiety”. Objective of this study is to determine whether students show signs of information overload and to identify the possible predictors. Research was conducted using a questionnaire developed for the purpose of this study. The results show that students frequently use technology (computers, gadgets and digital media), while they show moderate level of information literacy. They have sometimes experienced symptoms of information overload. According to the statistical analysis, higher frequency of technology use and lower level of information literacy are correlated with larger information overload. The multiple regression analysis has confirmed that the combination of these two independent variables has statistically significant predictive capacity for information overload. Therefore, the information science teachers should pay attention to improving the level of students’ information literacy and educate them about the risks of excessive technology use.

Keywords: Information overload, technology use, digital media, information literacy, students.

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824 Design and Layout of Two Stage High Band Width Operational Amplifier

Authors: Yasir Mahmood Qureshi

Abstract:

This paper presents the design and layout of a two stage, high speed operational amplifiers using standard 0.35um CMOS technology. The design procedure involves designing the bias circuit, the differential input pair, and the gain stage using CAD tools. Both schematic and layout of the operational amplifier along with the comparison in the results of the two has been presented. The operational amplifier designed, has a gain of 93.51db at low frequencies. It has a gain bandwidth product of 55.07MHz, phase margin of 51.9º and a slew rate of 22v/us for a load of capacitor of 10pF.

Keywords: Gain bandwidth product, Operational Amplifier, phase margin, slew rate.

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823 High Capacity Spread-Spectrum Watermarking for Telemedicine Applications

Authors: Basant Kumar, Animesh Anand, S.P. Singh, Anand Mohan

Abstract:

This paper presents a new spread-spectrum watermarking algorithm for digital images in discrete wavelet transform (DWT) domain. The algorithm is applied for embedding watermarks like patient identification /source identification or doctors signature in binary image format into host digital radiological image for potential telemedicine applications. Performance of the algorithm is analysed by varying the gain factor, subband decomposition levels, and size of watermark. Simulation results show that the proposed method achieves higher watermarking capacity.

Keywords: Watermarking, spread-spectrum, discrete wavelettransform, telemedicine

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822 Frequency-Domain Design of Fractional-Order FIR Differentiators

Authors: Wei-Der Chang, Dai-Ming Chang, Eri-Wei Chiang, Chia-Hung Lin, Jian-Liung Chen

Abstract:

In this paper, a fractional-order FIR differentiator design method using the differential evolution (DE) algorithm is presented. In the proposed method, the FIR digital filter is designed to meet the frequency response of a desired fractal-order differentiator, which is evaluated in the frequency domain. To verify the design performance, another design method considered in the time-domain is also provided. Simulation results reveal the efficiency of the proposed method.

Keywords: Fractional-order differentiator, FIR digital filter, Differential evolution algorithm.

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821 Battery/Supercapacitor Emulator for Chargers Functionality Testing

Authors: S. Farag, A. Kupeman

Abstract:

In this paper, design of solid-state battery/supercapacitor emulator based on dc-dc boost converter is described. The emulator mimics charging behavior of any storage device based on a predefined behavior set by the user. The device is operated by a two-level control structure: high-level emulating controller and low- level input voltage controller. Simulation and experimental results are shown to demonstrate the emulator operation.

Keywords: Battery, Charger, Energy, Storage, Supercapacitor.

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820 A 16Kb 10T-SRAM with 4x Read-Power Reduction

Authors: Pardeep Singh, Sanjay Sharma, Parvinder S. Sandhu

Abstract:

This work aims to reduce the read power consumption as well as to enhance the stability of the SRAM cell during the read operation. A new 10-transisor cell is proposed with a new read scheme to minimize the power consumption within the memory core. It has separate read and write ports, thus cell read stability is significantly improved. A 16Kb SRAM macro operating at 1V supply voltage is demonstrated in 65 nm CMOS process. Its read power consumption is reduced to 24% of the conventional design. The new cell also has lower leakage current due to its special bit-line pre-charge scheme. As a result, it is suitable for low-power mobile applications where power supply is restricted by the battery.

Keywords: A 16Kb 10T-SRAM, 4x Read-Power Reduction

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819 Air Handling Units Power Consumption Using Generalized Additive Model for Anomaly Detection: A Case Study in a Singapore Campus

Authors: Ju Peng Poh, Jun Yu Charles Lee, Jonathan Chew Hoe Khoo

Abstract:

The emergence of digital twin technology, a digital replica of physical world, has improved the real-time access to data from sensors about the performance of buildings. This digital transformation has opened up many opportunities to improve the management of the building by using the data collected to help monitor consumption patterns and energy leakages. One example is the integration of predictive models for anomaly detection. In this paper, we use the GAM (Generalised Additive Model) for the anomaly detection of Air Handling Units (AHU) power consumption pattern. There is ample research work on the use of GAM for the prediction of power consumption at the office building and nation-wide level. However, there is limited illustration of its anomaly detection capabilities, prescriptive analytics case study, and its integration with the latest development of digital twin technology. In this paper, we applied the general GAM modelling framework on the historical data of the AHU power consumption and cooling load of the building between Jan 2018 to Aug 2019 from an education campus in Singapore to train prediction models that, in turn, yield predicted values and ranges. The historical data are seamlessly extracted from the digital twin for modelling purposes. We enhanced the utility of the GAM model by using it to power a real-time anomaly detection system based on the forward predicted ranges. The magnitude of deviation from the upper and lower bounds of the uncertainty intervals is used to inform and identify anomalous data points, all based on historical data, without explicit intervention from domain experts. Notwithstanding, the domain expert fits in through an optional feedback loop through which iterative data cleansing is performed. After an anomalously high or low level of power consumption detected, a set of rule-based conditions are evaluated in real-time to help determine the next course of action for the facilities manager. The performance of GAM is then compared with other approaches to evaluate its effectiveness. Lastly, we discuss the successfully deployment of this approach for the detection of anomalous power consumption pattern and illustrated with real-world use cases.

Keywords: Anomaly detection, digital twin, Generalised Additive Model, Power Consumption Model.

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818 A Capacitive Sensor Interface Circuit Based on Phase Differential Method

Authors: H. A. Majid, N. Razali, M. S. Sulaiman, A. K. A'ain

Abstract:

A new interface circuit for capacitive sensor is presented. This paper presents the design and simulation of soil moisture capacitive sensor interface circuit based on phase differential technique. The circuit has been designed and fabricated using MIMOS- 0.35"m CMOS technology. Simulation and test results show linear characteristic from 36 – 52 degree phase difference, representing 0 – 100% in soil moisture level. Test result shows the circuit has sensitivity of 0.79mV/0.10 phase difference, translating into resolution of 10% soil moisture level.

Keywords: Capacitive sensor, interface, phase differential.

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817 A Low-Area Fully-Reconfigurable Hardware Design of Fast Fourier Transform System for 3GPP-LTE Standard

Authors: Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou

Abstract:

This paper presents a low-area and fully-reconfigurable Fast Fourier Transform (FFT) hardware design for 3GPP-LTE communication standard. It can fully support 32 different FFT sizes, up to 2048 FFT points. Besides, a special processing element is developed for making reconfigurable computing characteristics possible, while first-in first-out (FIFO) scheduling scheme design technique is proposed for hardware-friendly FIFO resource arranging. In a synthesis chip realization via TSMC 40 nm CMOS technology, the hardware circuit only occupies core area of 0.2325 mm2 and dissipates 233.5 mW at maximal operating frequency of 250 MHz.

Keywords: Reconfigurable, fast Fourier transform, single-path delay feedback, 3GPP-LTE.

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816 Realization of Electronically Tunable Current- Mode Multiphase Sinusoidal Oscillators Using CFTAs

Authors: Prungsak Uttaphut

Abstract:

An implementation of current-mode multiphase sinusoidal oscillators is presented. Using CFTA-based lossy integrators, odd and odd/even phase systems can be realized with following advantages. The condition of oscillation and frequency of oscillation can be orthogonally tuned. The high output impedances facilitate easy driving an external load without additional current buffers. The proposed MSOs provide odd or even phase signals that are equally spaced in phase and equal amplitude. The circuit requires one CFTA, one resistor and one grounded capacitor per phase without additional current amplifier. The results of PSPICE simulations using CMOS CFTA are included to verify theory.

Keywords: multiphase sinusoidal oscillator, current-mode, CFTA, lossy integrator

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815 Steganalysis of Data Hiding via Halftoning and Coordinate Projection

Authors: Woong Hee Kim, Ilhwan Park

Abstract:

Steganography is the art of hiding and transmitting data through apparently innocuous carriers in an effort to conceal the existence of the data. A lot of steganography algorithms have been proposed recently. Many of them use the digital image data as a carrier. In data hiding scheme of halftoning and coordinate projection, still image data is used as a carrier, and the data of carrier image are modified for data embedding. In this paper, we present three features for analysis of data hiding via halftoning and coordinate projection. Also, we present a classifier using the proposed three features.

Keywords: Steganography, steganalysis, digital halftoning, data hiding.

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814 Non-destructive Watermelon Ripeness Determination Using Image Processing and Artificial Neural Network (ANN)

Authors: Shah Rizam M. S. B., Farah Yasmin A.R., Ahmad Ihsan M. Y., Shazana K.

Abstract:

Agriculture products are being more demanding in market today. To increase its productivity, automation to produce these products will be very helpful. The purpose of this work is to measure and determine the ripeness and quality of watermelon. The textures on watermelon skin will be captured using digital camera. These images will be filtered using image processing technique. All these information gathered will be trained using ANN to determine the watermelon ripeness accuracy. Initial results showed that the best model has produced percentage accuracy of 86.51%, when measured at 32 hidden units with a balanced percentage rate of training dataset.

Keywords: Artificial Neural Network (ANN), Digital ImageProcessing, YCbCr Colour Space, Watermelon Ripeness.

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813 A 0.9 V, High-Speed, Low-Power Tunable Gain Current Mirror

Authors: Hassan Faraji Baghtash

Abstract:

A high-speed current mirror with low-power method of adjusting current gain is presented. The current mirror provides continuous gain adjustment; yet, its gain can simply be programmed digitally, as well. The structure features the ever interesting merits of linear-in-dB gain control scheme and low power/voltage operation. The performance of proposed structure is verified through the simulation in TSMC 0.18 µm CMOS Technology. The proposed tunable gain current mirror structure draws only 18 µW from 0.9 V power supply and can operate at high frequencies up to 550 MHz in the worst case condition of maximum gain setting.

Keywords: Current mirror, current mode, low power, low voltage, tunable circuit, variable current amplifier.

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