Search results for: gate leakage
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 551

Search results for: gate leakage

491 Design Ultra Fast Gate Drive Board for Silicon Carbide MOSFET Applications

Authors: Syakirin O. Yong, Nasrudin A. Rahim, Bilal M. Eid, Buray Tankut

Abstract:

The aim of this paper is to develop an ultra-fast gate driver for Silicon Carbide (SiC) based switching device applications such as AC/DC DC/AC converters. Wide bandgap semiconductors such as SiC switches are growing rapidly nowadays due to their numerous capabilities such as faster switching, higher power density and higher voltage level. Wide band-gap switches can work properly on high frequencies such 50-250 kHz which is very useful for many power electronic applications such as solar inverters. Increasing the frequency minimizes the output filter size and system complexity however, this causes huge spike between MOSFET’s drain and source leg which leads to the failure of MOSFET if the voltage rating is exceeded. This paper investigates and concludes the optimum design for a gate drive board for SiC MOSFET switches without causing spikes and noises.

Keywords: PV system, lithium-ion, charger, constant current, constant voltage, renewable energy

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490 A Fast and Cost-Effective Method to Monitor Microplastics in Compost and Soiduration of Enterococcus Faecalis Penetration in Environmentally Exposed Root Canals Obturated With Lateral Condensation Technique

Authors: N. Thawornwisit, P. Pradoo, S. Nuypree, L. Jarukasetrporn, S. Jitpukdeebodintra

Abstract:

Objective: The aim of this study was to evaluate the duration of the Enterococcus faecalis (E. faecalis) penetration into the gap between root canal wall and filling material at a 3 to 6 mm distance from the cementoenamel junction (CEJ) in the dislodged temporary filling, in vitro. Material and methods: Thirty-four single root canal mandibular premolars were divided into two experimental groups (N = 15) and one negative control (N = 4). Root canals were prepared and obturated with gutta-percha using lateral condensation technique, X-ray checked, and sterilized. Leakages were set up using the modified bacterial leakage model, and E. faecalis was used as a microbial marker. Leakages were evaluated at 3 and 7 days by culturing gutta-percha and dentine drilled from a 3-6 mm distance from CEJ. Broth turbidity was recorded and compared. Result: All four negative control and the 3-day experimental group showed no broth turbidity. For the 7-day experimental group, there was 33.3% leakage. Conclusion: Penetration of E. faecalis into the gap between root canal wall and filling material at a 3 to 6 mm distance from CEJ in the dislodged temporary filling were not found at three days. However, at seven days of exposure, bacteria could penetrate into the interface of the root canal and filling materials.

Keywords: coronal leakage, bacterial leakage model, enterococcus faecalis

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489 Stage-Gate Framework Application for Innovation Assessment among Small and Medium-Sized Enterprises

Authors: Indre Brazauskaite, Vilte Auruskeviciene

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The paper explores the Stage-Gate framework application for innovation maturity among small and medium-sized enterprises (SMEs). Innovation management becomes an essential business survival process for all sizes of organizations that can be evaluated and audited systemically. This research systemically defines and assesses the innovation process from the perspective of the company’s top management. Empirical research explores attitudes and existing practices of innovation management in SMEs in Baltic countries. It structurally investigates the current innovation management practices, level of standardization, and potential challenges in the area. Findings allow to structure of existing practices based on an institutionalized model and contribute to a more advanced understanding of the innovation process among SMEs. Practically, findings contribute to advanced decision-making and business planning in the process.

Keywords: innovation measure, innovation process, SMEs, stage-gate framework

Procedia PDF Downloads 74
488 Environmental Impact Assessment of Conventional Tyre Manufacturing Process

Authors: G. S. Dangayach, Gaurav Gaurav, Alok Bihari Singh

Abstract:

The popularity of vehicles in both industrialized and developing economies led to a rise in the production of tyres. People have become increasingly concerned about the tyre industry's possible environmental impact in the last two decades. The life cycle assessment (LCA) methodology was used to assess the environmental impacts of industrial tyres throughout their life cycle, which included four stages: manufacture, transportation, consumption, and end-of-life. The majority of prior studies focused on tyre recycling and disposal. Only a few studies have been conducted on the environmental impact of tyre production process. LCA methodology was employed to determine the environmental impact of tyre manufacture process (gate to gate) at an Indian firm. Comparative analysis was also conducted to identify the environmental hotspots in various stages of tire manufacturing. This study is limited to gate-to-gate analysis of manufacturing processes with the functional unit of a single tyre weighing 50 kg. GaBi software was used to do both qualitative and quantitative analysis. Different environmental impact indicators are measured in terms of CO2, SO2, NOx, GWP (global warming potential), AP (acidification potential), EP (eutrophication potential), POCP (photochemical oxidant formation potential), and HTP (toxic human potential). The results demonstrate that the major contributor to environmental pollution is electricity. The Banbury process has a very high negative environmental impact, which causes respiratory problems to workers and operators.

Keywords: life cycle assessment (LCA), environmental impact indicators, tyre manufacturing process, environmental impact assessment

Procedia PDF Downloads 121
487 2 Stage CMOS Regulated Cascode Distributed Amplifier Design Based On Inductive Coupling Technique in Submicron CMOS Process

Authors: Kittipong Tripetch, Nobuhiko Nakano

Abstract:

This paper proposes one stage and two stage CMOS Complementary Regulated Cascode Distributed Amplifier (CRCDA) design based on Inductive and Transformer coupling techniques. Usually, Distributed amplifier is based on inductor coupling between gate and gate of MOSFET and between drain and drain of MOSFET. But this paper propose some new idea, by coupling with differential primary windings of transformer between gate and gate of MOSFET first stage and second stage of regulated cascade amplifier and by coupling with differential secondary windings transformer of MOSFET between drain and drain of MOSFET first stage and second stage of regulated cascade amplifier. This paper also proposes polynomial modeling of Silicon Transformer passive equivalent circuit from Nanyang Technological University which is used to extract frequency response of transformer. Cadence simulation results are used to verify validity of transformer polynomial modeling which can be used to design distributed amplifier without Cadence. 4 parameters of scattering matrix of 2 port of the propose circuit is derived as a function of 4 parameters of impedance matrix.

Keywords: CMOS regulated cascode distributed amplifier, silicon transformer modeling with polynomial, low power consumption, distribute amplification technique

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486 The Analysis of Defects Prediction in Injection Molding

Authors: Mehdi Moayyedian, Kazem Abhary, Romeo Marian

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This paper presents an evaluation of a plastic defect in injection molding before it occurs in the process; it is known as the short shot defect. The evaluation of different parameters which affect the possibility of short shot defect is the aim of this paper. The analysis of short shot possibility is conducted via SolidWorks Plastics and Taguchi method to determine the most significant parameters. Finite Element Method (FEM) is employed to analyze two circular flat polypropylene plates of 1 mm thickness. Filling time, part cooling time, pressure holding time, melt temperature and gate type are chosen as process and geometric parameters, respectively. A methodology is presented herein to predict the possibility of the short-shot occurrence. The analysis determined melt temperature is the most influential parameter affecting the possibility of short shot defect with a contribution of 74.25%, and filling time with a contribution of 22%, followed by gate type with a contribution of 3.69%. It was also determined the optimum level of each parameter leading to a reduction in the possibility of short shot are gate type at level 1, filling time at level 3 and melt temperature at level 3. Finally, the most significant parameters affecting the possibility of short shot were determined to be melt temperature, filling time, and gate type.

Keywords: injection molding, plastic defects, short shot, Taguchi method

Procedia PDF Downloads 196
485 Deep Reinforcement Learning for Advanced Pressure Management in Water Distribution Networks

Authors: Ahmed Negm, George Aggidis, Xiandong Ma

Abstract:

With the diverse nature of urban cities, customer demand patterns, landscape topologies or even seasonal weather trends; managing our water distribution networks (WDNs) has proved a complex task. These unpredictable circumstances manifest as pipe failures, intermittent supply and burst events thus adding to water loss, energy waste and increased carbon emissions. Whilst these events are unavoidable, advanced pressure management has proved an effective tool to control and mitigate them. Henceforth, water utilities have struggled with developing a real-time control method that is resilient when confronting the challenges of water distribution. In this paper we use deep reinforcement learning (DRL) algorithms as a novel pressure control strategy to minimise pressure violations and leakage under both burst and background leakage conditions. Agents based on asynchronous actor critic (A2C) and recurrent proximal policy optimisation (Recurrent PPO) were trained and compared to benchmarked optimisation algorithms (differential evolution, particle swarm optimisation. A2C manages to minimise leakage by 32.48% under burst conditions and 67.17% under background conditions which was the highest performance in the DRL algorithms. A2C and Recurrent PPO performed well in comparison to the benchmarks with higher processing speed and lower computational effort.

Keywords: deep reinforcement learning, pressure management, water distribution networks, leakage management

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484 Fast High Voltage Solid State Switch Using Insulated Gate Bipolar Transistor for Discharge-Pumped Lasers

Authors: Nur Syarafina Binti Othman, Tsubasa Jindo, Makato Yamada, Miho Tsuyama, Hitoshi Nakano

Abstract:

A novel method to produce a fast high voltage solid states switch using Insulated Gate Bipolar Transistors (IGBTs) is presented for discharge-pumped gas lasers. The IGBTs are connected in series to achieve a high voltage rating. An avalanche transistor is used as the gate driver. The fast pulse generated by the avalanche transistor quickly charges the large input capacitance of the IGBT, resulting in a switch out of a fast high-voltage pulse. The switching characteristic of fast-high voltage solid state switch has been estimated in the multi-stage series-connected IGBT with the applied voltage of several tens of kV. Electrical circuit diagram and the mythology of fast-high voltage solid state switch as well as experimental results obtained are presented.

Keywords: high voltage, IGBT, solid state switch, bipolar transistor

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483 Modeling and Design of E-mode GaN High Electron Mobility Transistors

Authors: Samson Mil'shtein, Dhawal Asthana, Benjamin Sullivan

Abstract:

The wide energy gap of GaN is the major parameter justifying the design and fabrication of high-power electronic components made of this material. However, the existence of a piezo-electrics in nature sheet charge at the AlGaN/GaN interface complicates the control of carrier injection into the intrinsic channel of GaN HEMTs (High Electron Mobility Transistors). As a result, most of the transistors created as R&D prototypes and all of the designs used for mass production are D-mode devices which introduce challenges in the design of integrated circuits. This research presents the design and modeling of an E-mode GaN HEMT with a very low turn-on voltage. The proposed device includes two critical elements allowing the transistor to achieve zero conductance across the channel when Vg = 0V. This is accomplished through the inclusion of an extremely thin, 2.5nm intrinsic Ga₀.₇₄Al₀.₂₆N spacer layer. The added spacer layer does not create piezoelectric strain but rather elastically follows the variations of the crystal structure of the adjacent GaN channel. The second important factor is the design of a gate metal with a high work function. The use of a metal gate with a work function (Ni in this research) greater than 5.3eV positioned on top of n-type doped (Nd=10¹⁷cm⁻³) Ga₀.₇₄Al₀.₂₆N creates the necessary built-in potential, which controls the injection of electrons into the intrinsic channel as the gate voltage is increased. The 5µm long transistor with a 0.18µm long gate and a channel width of 30µm operate at Vd=10V. At Vg =1V, the device reaches the maximum drain current of 0.6mA, which indicates a high current density. The presented device is operational at frequencies greater than 10GHz and exhibits a stable transconductance over the full range of operational gate voltages.

Keywords: compound semiconductors, device modeling, enhancement mode HEMT, gallium nitride

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482 Design of Local Interconnect Network Controller for Automotive Applications

Authors: Jong-Bae Lee, Seongsoo Lee

Abstract:

Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.

Keywords: local interconnect network, controller, transceiver, processor

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481 Arsenic Removal by Membrane Technology, Adsorption and Ion Exchange: An Environmental Lifecycle Assessment

Authors: Karan R. Chavan, Paula Saavalainen, Kumudini V. Marathe, Riitta L. Keiski, Ganapati D. Yadav

Abstract:

Co-contamination of groundwaters by arsenic in different forms is often observed around the globe. Arsenic is introduced into the waters by several mechanisms and different technologies are proposed and practiced for effective removal. The assessment of three prominent technologies, namely, adsorption, ion exchange and nanofiltration was carried out in this study based on lifecycle methodology. The life of the technologies was divided into two stages: cradle to gate (C-G) and gate to gate (G-G), in order to find out the impacts in different categories of environmental burdens, human health and resource consumption. Life cycle inventory was estimated by use of models and design equations concerning with the different technologies. Regeneration was considered for each technology and over the course of its full lifetime. The impact values of adsorption technology for the C-G stage are greater by thousand times (103) and million times (106) compared to ion exchange and nanofiltration technologies, respectively. The impact of G-G stage of the lifecycle is the major contributor of the impact for all the 3 technologies due to electricity consumption during the operation. Overall, the ion Exchange technology fares well in this study of removal of As (V) only.

Keywords: arsenic, nanofiltration, lifecycle assessment, membrane technology

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480 An Evolutionary Multi-Objective Optimization for Airport Gate Assignment Problem

Authors: Seyedmirsajad Mokhtarimousavi, Danial Talebi, Hamidreza Asgari

Abstract:

Gate Assignment Problem (GAP) is one of the most substantial issues in airport operation. In principle, GAP intends to maintain the maximum capacity of the airport through the best possible allocation of the resources (gates) in order to reach the optimum outcome. The problem involves a wide range of dependent and independent resources and their limitations, which add to the complexity of GAP from both theoretical and practical perspective. In this study, GAP was mathematically formulated as a three-objective problem. The preliminary goal of multi-objective formulation was to address a higher number of objectives that can be simultaneously optimized and therefore increase the practical efficiency of the final solution. The problem is solved by applying the second version of Non-dominated Sorting Genetic Algorithm (NSGA-II). Results showed that the proposed mathematical model could address most of major criteria in the decision-making process in airport management in terms of minimizing both airport/airline cost and passenger walking distance time. Moreover, the proposed approach could properly find acceptable possible answers.

Keywords: airport management, gate assignment problem, mathematical modeling, genetic algorithm, NSGA-II

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479 A Multi-Objective Gate Assignment Model Based on Airport Terminal Configuration

Authors: Seyedmirsajad Mokhtarimousavi, Danial Talebi, Hamidreza Asgari

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Assigning aircrafts’ activities to appropriate gates is one the most challenging issues in airport authorities’ multiple criteria decision making. The potential financial loss due to imbalances of demand and supply in congested airports, higher occupation rates of gates, and the existing restrictions to expand facilities provide further evidence for the need for an optimal supply allocation. Passengers walking distance, towing movements, extra fuel consumption (as a result of awaiting longer to taxi when taxi conflicts happen at the apron area), etc. are the major traditional components involved in GAP models. In particular, the total cost associated with gate assignment problem highly depends on the airport terminal layout. The study herein presents a well-elaborated literature review on the topic focusing on major concerns, applicable variables and objectives, as well as proposing a three-objective mathematical model for the gate assignment problem. The model has been tested under different concourse layouts in order to check its performance in different scenarios. Results revealed that terminal layout pattern is a significant parameter in airport and that the proposed model is capable of dealing with key constraints and objectives, which supports its practical usability for future decision making tools. Potential solution techniques were also suggested in this study for future works.

Keywords: airport management, terminal layout, gate assignment problem, mathematical modeling

Procedia PDF Downloads 194
478 SOI-Multi-FinFET: Impact of Fins Number Multiplicity on Corner Effect

Authors: A.N. Moulay Khatir, A. Guen-Bouazza, B. Bouazza

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SOI-Multifin-FET shows excellent transistor characteristics, ideal sub-threshold swing, low drain induced barrier lowering (DIBL) without pocket implantation and negligible body bias dependency. In this work, we analyzed this combination by a three-dimensional numerical device simulator to investigate the influence of fins number on corner effect by analyzing its electrical characteristics and potential distribution in the oxide and the silicon in the section perpendicular to the flow of the current for SOI-single-fin FET, three-fin and five-fin, and we provide a comparison with a Trigate SOI Multi-FinFET structure.

Keywords: SOI, FinFET, corner effect, dual-gate, tri-gate, Multi-Fin FET

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477 Etude 3D Quantum Numerical Simulation of Performance in the HEMT

Authors: A. Boursali, A. Guen-Bouazza

Abstract:

We present a simulation of a HEMT (high electron mobility transistor) structure with and without a field plate. We extract the device characteristics through the analysis of DC, AC and high frequency regimes, as shown in this paper. This work demonstrates the optimal device with a gate length of 15 nm, InAlN/GaN heterostructure and field plate structure, making it superior to modern HEMTs when compared with otherwise equivalent devices. This improves the ability to bear the burden of the current density passes in the channel. We have demonstrated an excellent current density, as high as 2.05 A/m, a peak extrinsic transconductance of 0.59S/m at VDS=2 V, and cutting frequency cutoffs of 638 GHz in the first HEMT and 463 GHz for Field plate HEMT., maximum frequency of 1.7 THz, maximum efficiency of 73%, maximum breakdown voltage of 400 V, leakage current density IFuite=1 x 10-26 A, DIBL=33.52 mV/V and an ON/OFF current density ratio higher than 1 x 1010. These values were determined through the simulation by deriving genetic and Monte Carlo algorithms that optimize the design and the future of this technology.

Keywords: HEMT, silvaco, field plate, genetic algorithm, quantum

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476 Internal Leakage Analysis from Pd to Pc Port Direction in ECV Body Used in External Variable Type A/C Compressor

Authors: M. Iqbal Mahmud, Haeng Muk Cho, Seo Hyun Sang, Wang Wen Hai, Chang Heon Yi, Man Ik Hwang, Dae Hoon Kang

Abstract:

Solenoid operated electromagnetic control valve (ECV) playing an important role for car’s air conditioning control system. ECV is used in external variable displacement swash plate type compressor and controls the entire air conditioning system by means of a pulse width modulation (PWM) input signal supplying from an external source (controller). Complete form of ECV contains number of internal features like valve body, core, valve guide, plunger, guide pin, plunger spring, bellows etc. While designing the ECV; dimensions of different internal items must meet the standard requirements as it is quite challenging. In this research paper, especially the dimensioning of ECV body and its three pressure ports through which the air/refrigerant passes are considered. Here internal leakage test analysis of ECV body is being carried out from its discharge port (Pd) to crankcase port (Pc) when the guide valve is placed inside it. The experiments have made both in ordinary and digital system using different assumptions and thereafter compare the results.

Keywords: electromagnetic control valve (ECV), leakage, pressure port, valve body, valve guide

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475 High Performance Field Programmable Gate Array-Based Stochastic Low-Density Parity-Check Decoder Design for IEEE 802.3an Standard

Authors: Ghania Zerari, Abderrezak Guessoum, Rachid Beguenane

Abstract:

This paper introduces high-performance architecture for fully parallel stochastic Low-Density Parity-Check (LDPC) field programmable gate array (FPGA) based LDPC decoder. The new approach is designed to decrease the decoding latency and to reduce the FPGA logic utilisation. To accomplish the target logic utilisation reduction, the routing of the proposed sub-variable node (VN) internal memory is designed to utilize one slice distributed RAM. Furthermore, a VN initialization, using the channel input probability, is achieved to enhance the decoder convergence, without extra resources and without integrating the output saturated-counters. The Xilinx FPGA implementation, of IEEE 802.3an standard LDPC code, shows that the proposed decoding approach attain high performance along with reduction of FPGA logic utilisation.

Keywords: low-density parity-check (LDPC) decoder, stochastic decoding, field programmable gate array (FPGA), IEEE 802.3an standard

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474 Automatic Integrated Inverter Type Smart Device for Safe Kitchen

Authors: K. M. Jananni, R. Nandini

Abstract:

The proposed wireless, inverter type design of a LPG leakage monitoring system aims to provide a smart and safe kitchen. The system detects the LPG gas leak using Nano-sensors and alerts the concerned individual through GSM system. The system uses two sensors, one attached to the chimney and other to the regulator of the LPG cylinder. Upon a leakage being detected, the sensor at the regulator actuates the system to cut off the gas supply immediately using a solenoid control valve. The sensor at the chimney checks for the permissible level of LPG mix in the air and when the level exceeds the threshold, the system sends an automatic SMS to the numbers saved. Further the sensor actuates the mini suction system fixed at the chimney within 20 seconds of a leakage to suck out the gas until the level falls well below the threshold. As a safety measure, an automatic window opening and alarm feature is also incorporated into the system. The key feature of this design is that the system is provided with a special inverter designed to make the device function effectively even during power failures. In this paper, utilization of sensors in the kitchen area is discussed and this gives the proposed architecture for real time field monitoring with a PIC Micro-controller.

Keywords: nano sensors, global system for mobile communication, GSM, micro controller, inverter

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473 An Adder with Novel PMOS and NMOS for Ultra Low Power Applications in Deep Submicron Technology

Authors: Ch. Ashok Babu, J. V. R. Ravindra, K. Lalkishore

Abstract:

Power has became a burning issue in modern VLSI design. As the technology advances especially below 45nm, technology of leakage power became a big problem apart of the dynamic power. This paper presents a full adder with novel PMOS and NMOS which consume less power compare to conventional full adder, DTMOS full adder. This paper shows different types of adders and their power consumption, area, and delay. All the experiments have been carried out using Cadence® Virtuoso® design lay out editor which shows power consumption of different types of adders.

Keywords: average power, leakage power, delay, DTMOS, PDP

Procedia PDF Downloads 364
472 Fabrication and Analysis of Vertical Double-Diffused Metal Oxide Semiconductor (VDMOS)

Authors: Deepika Sharma, Bal Krishan

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In this paper, the structure of N-channel VDMOS was designed and analyzed using Silvaco TCAD tools by varying N+ source doping concentration, P-Body doping concentration, gate oxide thickness and the diffuse time. VDMOS is considered to be ideal power switches due to its high input impedance and fast switching speed. The performance of the device was analyzed from the Ids vs Vgs curve. The electrical characteristics such as threshold voltage, gate oxide thickness and breakdown voltage for the proposed device structures were extarcted. Effect of epitaxial layer on various parameters is also observed.

Keywords: on-resistance, threshold voltage, epitaxial layer, breakdown voltage

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471 A Qualitative Study of Children's Growth in Creative Dance: An Example of Cloud Gate Dance School in Taiwan

Authors: Chingwen Yeh, Yu Ru Chen

Abstract:

This paper aims to explore the growth and development of children in the creative dance class of Cloud Gate Dance School in Taichung Taiwan. Professor Chingwen Yeh’s qualitative research method was applied in this study. First of all, application of Dalcroze Eurhythmic teaching materials such as music, teaching aids, speaking language through classroom situation was collected and exam. Second, the in-class observation on the participation of the young children's learning situation was recorded both by words and on video screen as the research data. Finally, data analysis was categorized into the following aspects: children's body movement coordination, children’s mind concentration and imagination and children’s verbal expression. Through the in-depth interviews with the in-class teachers, parents of participating children and other in class observers were conducted from time to time; this research found the children's body rhythm, language skills, and social learning growth were improved in certain degree through the creative dance training. These authors hope the study can contribute as the further research reference on the related topic.

Keywords: Cloud Gate Dance School, creative dance, Dalcroze, Eurhythmic

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470 Equivalent Electrical Model of a Shielded Pulse Planar Transformer in Isolated Gate Drivers for SiC MOSFETs

Authors: Loreine Makki, Marc Anthony Mannah, Christophe Batard, Nicolas Ginot, Julien Weckbrodt

Abstract:

Planar transformers are extensively utilized in high-frequency, high power density power electronic converters. The breakthrough of wide-bandgap technology compelled power electronic system miniaturization while inducing pivotal effects on system modeling and manufacturing within the power electronics industry. A significant consideration to simulate and model the unanticipated parasitic parameters emerges with the requirement to mitigate electromagnetic disturbances. This paper will present an equivalent circuit model of a shielded pulse planar transformer quantifying leakage inductance and resistance in addition to the interwinding capacitance of the primary and secondary windings. ANSYS Q3D Extractor was utilized to model and simulate the transformer, intending to study the immunity of the simulated equivalent model to high dv/dt occurrences. A convenient correlation between simulation and experimental results is presented.

Keywords: Planar transformers, wide-band gap, equivalent circuit model, shielded, ANSYS Q3D Extractor, dv/dt

Procedia PDF Downloads 177
469 Parameter and Lose Effect Analysis of Beta Stirling Cycle Refrigerating Machine

Authors: Muluken Z. Getie, Francois Lanzetta, Sylvie Begot, Bimrew T. Admassu

Abstract:

This study is aimed at the numerical analysis of the effects of phase angle and losses (shuttle heat loss and gas leakage to the crankcase) that could have an impact on the pressure and temperature of working fluid for a β-type Stirling cycle refrigerating machine. First, the developed numerical model incorporates into the ideal adiabatic analysis, the shuttle heat transfer (heat loss from compression space to expansion space), and gas leakage from the working space to the buffer space into the crankcase. The other losses that may not have a direct effect on the temperature and pressure of working fluid are simply incorporated in a simple analysis. The model is then validated by reversing the model to the engine model and compared with other literature results using (GPU-3) engine. After validating the model with other engine model and experiment results, analysis of the effect of phase angle, shuttle heat lose and gas leakage on temperature, pressure, and performance (power requirement, cooling capacity and coefficient of performance) of refrigerating machine considering the FEMTO 60 Stirling engine as a case study have been conducted. Shuttle heat loss has a greater effect on the temperature of working gas; gas leakage to the crankcase has more effect on the pressure of working spaces and hence both have a considerable impact on the performance of the Stirling cycle refrigerating machine. The optimum coefficient of performance exists between phase angles of 900-950, and optimum cooling capacity could be found between phase angles of 950-980.

Keywords: beta configuration, engine model, moderate cooling, stirling refrigerator, and validation

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468 Stage-Gate Based Integrated Project Management Methodology for New Product Development

Authors: Mert Kıranç, Ekrem Duman, Murat Özbilen

Abstract:

In order to achieve new product development (NPD) activities on time and within budgetary constraints, the NPD managers need a well-designed methodology. This study intends to create an integrated project management methodology for the ones who focus on new product development projects. In the scope of the study, four different management systems are combined. These systems are called as 'Schedule-oriented Stage-Gate Method, Risk Management, Change Management and Earned Value Management'. New product development term is quite common in many different industries such as defense industry, construction, health care/dental, higher education, fast moving consumer goods, white goods, electronic devices, marketing and advertising and software development. All product manufacturers run against each other’s for introducing a new product to the market. In order to achieve to produce a more competitive product in the market, an optimum project management methodology is chosen, and this methodology is adapted to company culture. The right methodology helps the company to present perfect product to the customers at the right time. The benefits of proposed methodology are discussed as an application by a company. As a result, how the integrated methodology improves the efficiency and how it achieves the success of the project are unfolded.

Keywords: project, project management, management methodology, new product development, risk management, change management, earned value, stage-gate

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467 The Concentration Analysis of CO2 Using ALOHA Code for Kuosheng Nuclear Power Plant

Authors: W. S. Hsu, Y. Chiang, H. C. Chen, J. R. Wang, S. W. Chen, J. H. Yang, C. Shih

Abstract:

Not only radiation materials, but also the normal chemical material stored in the power plant can cause a risk to the residents. In this research, the ALOHA code was used to perform the concentration analysis under the CO2 storage burst or leakage conditions for Kuosheng nuclear power plant (NPP). The Final Safety Analysis Report (FSAR) and data were used in this study. Additionally, the analysis results of ALOHA code were compared with the R.G. 1.78 failure criteria in order to confirm the control room habitability. The comparison results show that the ALOHA result for burst case was 0.923 g/m3 which was below the criteria. However, the ALOHA results for leakage case was 11.3 g/m3.

Keywords: BWR, ALOHA, habitability, Kuosheng

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466 Bed Evolution under One-Episode Flushing in a Truck Sewer in Paris, France

Authors: Gashin Shahsavari, Gilles Arnaud-Fassetta, Alberto Campisano, Roberto Bertilotti, Fabien Riou

Abstract:

Sewer deposits have been identified as a major cause of dysfunctions in combined sewer systems regarding sewer management, which induces different negative consequents resulting in poor hydraulic conveyance, environmental damages as well as worker’s health. In order to overcome the problematics of sedimentation, flushing has been considered as the most operative and cost-effective way to minimize the sediments impacts and prevent such challenges. Flushing, by prompting turbulent wave effects, can modify the bed form depending on the hydraulic properties and geometrical characteristics of the conduit. So far, the dynamics of the bed-load during high-flow events in combined sewer systems as a complex environment is not well understood, mostly due to lack of measuring devices capable to work in the “hostile” in combined sewer system correctly. In this regards, a one-episode flushing issue from an opening gate valve with weir function was carried out in a trunk sewer in Paris to understanding its cleansing efficiency on the sediments (thickness: 0-30 cm). During more than 1h of flushing within 5 m distance in downstream of this flushing device, a maximum flowrate and a maximum level of water have been recorded at 5 m in downstream of the gate as 4.1 m3/s and 2.1 m respectively. This paper is aimed to evaluate the efficiency of this type of gate for around 1.1 km (from the point -50 m to +1050 m in downstream from the gate) by (i) determining bed grain-size distribution and sediments evolution through the sewer channel, as well as their organic matter content, and (ii) identifying sections that exhibit more changes in their texture after the flush. For the first one, two series of sampling were taken from the sewer length and then analyzed in laboratory, one before flushing and second after, at same points among the sewer channel. Hence, a non-intrusive sampling instrument has undertaken to extract the sediments smaller than the fine gravels. The comparison between sediments texture after the flush operation and the initial state, revealed the most modified zones by the flush effect, regarding the sewer invert slope and hydraulic parameters in the zone up to 400 m from the gate. At this distance, despite the increase of sediment grain-size rages, D50 (median grain-size) varies between 0.6 mm and 1.1 mm compared to 0.8 mm and 10 mm before and after flushing, respectively. Overall, regarding the sewer channel invert slope, results indicate that grains smaller than sands (< 2 mm) are more transported to downstream along about 400 m from the gate: in average 69% before against 38% after the flush with more dispersion of grain-sizes distributions. Furthermore, high effect of the channel bed irregularities on the bed material evolution has been observed after the flush.

Keywords: bed-load evolution, combined sewer systems, flushing efficiency, sediments transport

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465 Power HEMTs Transistors for Radar Applications

Authors: A. boursali, A. Guen Bouazza, M. Khaouani, Z. Kourdi, B. Bouazza

Abstract:

This paper presents the design, development and characterization of the devices simulation for X-Band Radar applications. The effect of an InAlN/GaN structure on the RF performance High Electron Mobility Transistor (HEMT) device. Systematic investigations on the small signal as well as power performance as functions of the drain biases are presented. Were improved for X-band applications. The Power Added Efficiency (PAE) was achieved over 23% for X-band. The developed devices combine two InAlN/GaN HEMTs of 30nm gate periphery and exhibited the output power of over 50W. An InAlN/GaN HEMT with 30nm gate periphery was developed and exhibited the output power of over 120W.

Keywords: InAlN/GaN, HEMT, RF analyses, PAE, X-Band, radar

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464 Field-Programmable Gate Array Based Tester for Protective Relay

Authors: H. Bentarzi, A. Zitouni

Abstract:

The reliability of the power grid depends on the successful operation of thousands of protective relays. The failure of one relay to operate as intended may lead the entire power grid to blackout. In fact, major power system failures during transient disturbances may be caused by unnecessary protective relay tripping rather than by the failure of a relay to operate. Adequate relay testing provides a first defense against false trips of the relay and hence improves power grid stability and prevents catastrophic bulk power system failures. The goal of this research project is to design and enhance the relay tester using a technology such as Field Programmable Gate Array (FPGA) card NI 7851. A PC based tester framework has been developed using Simulink power system model for generating signals under different conditions (faults or transient disturbances) and LabVIEW for developing the graphical user interface and configuring the FPGA. Besides, the interface system has been developed for outputting and amplifying the signals without distortion. These signals should be like the generated ones by the real power system and large enough for testing the relay’s functionality. The signals generated that have been displayed on the scope are satisfactory. Furthermore, the proposed testing system can be used for improving the performance of protective relay.

Keywords: amplifier class D, field-programmable gate array (FPGA), protective relay, tester

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463 The Design of PFM Mode DC-DC Converter with DT-CMOS Switch

Authors: Jae-Chang Kwak, Yong-Seo Koo

Abstract:

The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter

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462 Pelvic Floor Training in Elite Athletes: Fact or Fiction

Authors: Maria Barbano Acevedo-Gomez, Elena Sonsoles Rodriguez-Lopez, Sofia Olivia Calvo-Moreno, Angel Basas-Garcia, Cristophe Ramirez

Abstract:

Introduction: Urinary incontinence (UI) is defined as the involuntary leakage of urine. In persons who practice sport, its prevalence is 36.1% (95% CI 26.5%-46.8%) and varies as it seems to depend on the intensity of exercise, movements, and impact on the ground. Such high impact sports are likely to generate higher intra-abdominal pressures and leading to pelvic floor muscle weakness. Even though the emphasis of this research is on female athletes, all women should perform pelvic floor muscle exercises as a part of their general physical exercise. Pelvic floor exercises are generally considered the first treatment against urinary incontinence. Objective: The main objective of the present study was to determine the knowledge of the pelvic floor and of the UI in elite athletes and know if they incorporate pelvic floor strengthening in their training. Methods: This was an observational study conducted on 754 elite athletes. After collecting questions about the pelvic floor, UI, and sport-related data, participants completed the questionnaire International Consultation on Incontinence Questionnaire-UI Short-Form (ICIQ-SF). Results: 57.3% of the athletes reflect not having knowledge of their pelvic floor, 48.3% do not know what strengthening exercises are, and around 90% have never practiced them. 78.1% (n=589) of all elite athletes do not include pelvic floor exercises in their training. Of the elite athletes surveyed, 33% had UI according to ICIQ-SF (mean age 23.75 ± 7.74 years). In response to the question 'Do you think you have or have had UI?', Only 9% of the 754 elite athletes admitted they presently had UI, and 13.3% indicated they had had UI at some time. However, 22.7% (n=171) reported they had experienced urine leakage while training. Of the athletes who indicated they did not have UI in the ICIQ-SF, 25.7% stated they did experience urine leakage during training (χ² [1] = 265.56; p < 0.001). Further, 12.3% of the athletes who considered they did not have UI and 60% of those who admitted they had had UI on some occasion stated they had suffered some urine leakage in the past 3 months (χ² [1] = 287.59; p < 0.001). Conclusions: There is a lack of knowledge about UI in sport. Through the use of validated questionnaires, we observed a UI prevalence of 33%, and 22.7% reported they experienced urine leakage while training. These figures contrast with only 9% of athletes who reported they had or had in the past had UI. This discrepancy could reflect the great lack of knowledge about UI in sports and that sometimes an athlete may consider that urine leakage is normal and a consequence of the demands of training. These data support the idea that coaches, physiotherapists, and other professionals involved in maximizing the performance of athletes should include pelvic floor muscle exercises in their training programs. Measures such as this could help to prevent UI during training and could be a starting point for future studies designed to develop adequate prevention and treatment strategies for this embarrassing problem affecting young athletes, both male and female.

Keywords: athletes, pelvic floor, performance, prevalence, sport, training, urinary incontinence

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