Search results for: fixed ΔT circuit

Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal

Abstract:

In the era of technological advancement, use of computer technology has become inevitable. Hence it has become the need of the hour to integrate software methods in engineering curriculum as a part to boost pedagogy techniques. Simulations software is a great help to graduates of disciplines such as electrical engineering. Since electrical engineering deals with high voltages and heavy instruments, extra care must be taken while operating with them. The viable solution would be to have appropriate control. The appropriate control could be well designed if engineers have knowledge of kind of waveforms associated with the system. Though these waveforms can be plotted manually, but it consumes a lot of time. Hence aid of simulation helps to understand steady state of system and resulting in better performance. In this paper computer, aided teaching of transformer is carried out using MATLAB/Simulink. The test carried out on a transformer includes open circuit test and short circuit respectively. The respective parameters of transformer are then calculated using the values obtained from open circuit and short circuit test respectively using Simulink.

Keywords: computer aided teaching, open circuit test, short circuit test, simulink, transformer

Procedia PDF Downloads 342

Authors: Adhinarayanan Venkatasubramanian

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For design of high speed digital circuit wave pipeline is the best approach this can be operated at higher operating frequencies by adjusting clock periods and skews so as latch the o/p of combinational logic circuit at the stable period. In this paper, there are two methods are proposed in automation task one is BIST (Built in self test) and second method is Reconfigurable technique. For the above two approaches dedicated AND gate (multiplier) by applying wave pipeline technique. BIST approach is implemented by Xilinx Spartan-II device. In reconfigurable technique done by ASIC. From the results, wave pipeline circuits are faster than nonpipeline circuit and area, power dissipation are reduced by reconfigurable technique.

Keywords: SOC, wave-pipelining, FPGA, self-testing, reconfigurable, ASIC

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Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

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In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor

Procedia PDF Downloads 250

Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

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In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

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Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

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This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver

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Authors: Zhiguo Shi, Cheng Ning Loong, Jiazeng Shan, Weichao Wu

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This study proposes an equivalent circuit model to simulate the eddy current damping force with shaking table tests and finite element modeling. The model is firstly proposed and applied to a simple eddy current damper, which is modelled in ANSYS, indicating that the proposed model can simulate the eddy current damping force under different types of excitations. Then, a non-contact and friction-free eddy current damper is designed and tested, and the proposed model can reproduce the experimental observations. The excellent agreement between the simulated results and the experimental data validates the accuracy and reliability of the equivalent circuit model. Furthermore, a more complicated model is performed in ANSYS to verify the feasibility of the equivalent circuit model in complex eddy current damper, and the higher-order fractional model and viscous model are adopted for comparison.

Keywords: equivalent circuit model, eddy current damping, finite element model, shake table test

Procedia PDF Downloads 154

Authors: Jun-Geol Park, Kyoung-Il Do, Min-Ju Kwon, Kyung-Hyun Park, Yong-Seo Koo

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In this paper, we proposed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for latch-up immunity. The proposed circuit has a lower trigger voltage and a higher holding voltage characteristic by using the zener diode structure. These characteristics prevent latch-up problem in normal operating conditions. The proposed circuit was analyzed to figure out the electrical characteristics by the variations of design parameters D1, D2 and stack technology to obtain the n-fold electrical characteristics. The simulations are accomplished by using the Synopsys TCAD simulator. When using the stack technology, 2-stack has the holding voltage of 6.9V and 3-stack has the holding voltage of 10.9V.

Keywords: ESD, SCR, trigger voltage, holding voltage

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Authors: Amit Kumar Sinha

Abstract:

A coal preparation plant typically operates with multiple beneficiation circuits to process individual size fractions of coal obtained from mine so that the targeted overall plant efficiency in terms of yield and ash is achieved. Conventional coal beneficiation plant in India or overseas operates generally in two methods of processing; coarse beneficiation with treatment in dense medium cyclones or in baths and fines beneficiation with treatment in flotation cell. This paper seeks to address the proven application of intermediate circuit along with coarse and fines circuit in Jamadoba New Coal Preparation Plant of capacity 2 Mt/y to treat -0.5 mm+0.25 mm size particles in reflux classifier. Previously this size of particles was treated directly in Flotation cell which had operational and metallurgical limitations which will be discussed in brief in this paper. The paper also details test work results performed on the representative samples of TSL coal washeries to determine the top size of intermediate and fines circuit and discusses about the overlapping process of intermediate circuit and how it is process wise suitable to beneficiate misplaced particles from coarse circuit and fines circuit. This paper also compares the separation efficiency (Ep) of various intermediate circuit process equipment and tries to validate the use of reflux classifier over fine coal DMC or spirals. An overview of Modern coal preparation plant treating Indian coal especially Washery Grade IV coal with reference to Jamadoba New Coal Preparation Plant which was commissioned in 2018 with basis of selection of equipment and plant profile, application of reflux classifier in intermediate circuit and process design criteria is also outlined in this paper.

Keywords: intermediate circuit, overlapping process, reflux classifier

Procedia PDF Downloads 107

Authors: Ali Mustafa Elshawesh, Mohamed Abdulali

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The paper presents an approach to dimension circuit switched networks and find the relationship between the parameters of the circuit switched networks on the condition of specific probability of call blocking. Our work is creating a Simulation code based on Erlang (B) formula to draw graphs which show two curves for each graph; one of simulation and the other of calculated. These curves represent the relationships between average number of calls and average call duration with the probability of call blocking. This simulation code facilitates to select the appropriate parameters for circuit switched networks.

Keywords: Erlang B formula, call blocking, telephone system dimension, Markov model, link capacity

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Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: high gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra series

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Authors: Xiaolai Zhang, Haitao Zhang, Qiwen Sun, Weixin Qian, Weiyong Ying

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High temperature Fischer-Tropsch synthesis process use fixed fluidized bed as a reactor. In order to understand the flow behavior in the fluidized bed better, the research of how the radial velocity affect the entire flow field is necessary. Laser Doppler Velocimetry (LDV) was used to study the radial velocity distribution along the diameter direction of the cross-section of the particle in a fixed fluidized bed. The velocity in the cross-section is fluctuating within a small range. The direction of the speed is a random phenomenon. In addition to r/R is 1, the axial velocity are more than 6 times of the radial velocity, the radial velocity has little impact on the axial velocity in a fixed fluidized bed.

Keywords: Fischer-Tropsch synthesis, Fixed fluidized bed, LDV, Velocity

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Authors: A. Kojah, A. Nacaroğlu

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Single phase transmission lines are used to transfer data or energy between two users. Transient conditions such as switching operations and short circuit faults cause the generation of the fluctuation on the waveform to be transmitted. Spatial voltage distribution on the single phase transmission line may change owing to the position and duration of the short circuit fault in the system. In this paper, the state space representation of the single phase transmission line for short circuit fault and for various types of terminations is given. Since the transmission line is modeled in time domain using distributed parametric elements, the mathematical representation of the event is given in state space (time domain) differential equation form. It also makes easy to solve the problem because of the time and space dependent characteristics of the voltage variations on the distributed parametrically modeled transmission line.

Keywords: energy transmission, transient effects, transmission line, transient voltage, RLC short circuit, single phase

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Authors: Mesbah Tarek, Kelaiaia Samia, Chiheb Sofien, Kelaiaia Mounia Samira, Labar Hocine

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Short circuit causes important damage in power systems. The aim of this paper is the investigation of the effect of short circuit at the AC side inverter in HVDC transmission line. The cutoff of HVDC transmission line implies important economic losses. In this paper it is proposed an efficient procedure which can protect and eliminate the fault quickly. The theoretical development and simulation are well detailed and illustrated.

Keywords: AC inverter, HVDC, short circuit, switcher gate, power system

Procedia PDF Downloads 535

Authors: Arijit Basuray

Abstract:

It is well known that if an electrical insulation system is stressed under high voltage then discharge may occur in various form and if the system is made of composite dielectric having interfaces of materials having different dielectric constant discharge may occur due to gross mismatch of dielectric constant causing intense local field in the interfaces. Here author has studied, firstly, behavior of discharges in gaseous dielectric circuit under AC and DC voltages. A gaseous dielectric circuit is made such that a pair of electrode of typical geometry is used to make the discharges occur under application of AC and DC voltages. Later on, composite insulation system with air gap is also studied. Discharge response of the dielectric circuit is measured across a typically designed impedance. The time evolution of the discharge characteristics showed some interesting chaotic behavior. Author here proposed some analysis of such behavior of the discharge pattern and discussed about the possibility of presence of such discharge circuit in lumped electric circuit.

Keywords: electrical insulation system, EIS, composite dielectric, discharge, chaos

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Authors: Debabrata Das

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This paper explains how to design a regulation loop for a power supply circuit. It also discusses the need of a regulation loop and the improvement of a circuit with regulation loop. A sample design is used to demonstrate how to use PSpice to design feedback loop to control output voltage of a power supply and how to check if the power supply is stable or oscillatory. A sample design is made using a specific Integrated Circuit (IC) available in the PSpice library. A designer can experiment feedback loop design using Cadence Pspice tool. PSpice is easy to use, reliable, and convenient. To test a feedback loop, generally, engineers use trial and error method with the hardware which takes a lot of time and manpower. Moreover, it is expensive because component and Printed Circuit Board (PCB) may go bad. PSpice can be used by designers to test their loop designs without using hardware circuits. A designer can save time, cost, manpower and simulate his/her power supply circuit accurately before making a real hardware using this software package.

Keywords: power electronics, feedback loop, regulation, stability, pole, zero, oscillation

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Authors: Chih-Chiang Hua, Yi-Hsiung Fang, Yuan-Jhen Siao

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A bridgeless boost (BLB) power factor correction (PFC) rectifier with hold-up time extension circuit is proposed in this paper. A full bridge rectifier is widely used in the front end of the ac/dc converter. Since the shortcomings of the full bridge rectifier, the bridgeless rectifier is developed. A BLB rectifier topology is utilized with the hold-up time extension circuit. Unlike the traditional hold-up time extension circuit, the proposed extension scheme uses fewer active switches to achieve a longer hold-up time. Simulation results are presented to verify the converter performance.

Keywords: bridgeless boost (BLB), boost converter, power factor correction (PFC), hold-up time

Procedia PDF Downloads 383

Authors: Mesbah Tarek, Kelaiaia Samia, Chiheb Sofien, Kelaiaia Mounia Samira, Labar Hocine

Abstract:

As every power systems short circuit failure can occur for HVDC at the DC link. So, the power devices should be protected against over heath produced by this over-current. This can be achieved through the power switchers or fast breaker. After short circuit the system is unable to restart, only after a time delay, because of the potential distribution along the DC link line. An appropriate fast and safety control is proposed and tested successfully. The detailed development and discussion of these faults is presented in this paper.

Keywords: HVDC, DC link, switchers, short circuit, faults

Procedia PDF Downloads 545

Authors: Liew Hui Fang, Syed Idris Syed Hassan, Mohd Fareq Abd. Malek, Yufridin Wahab, Norshafinash Saudin

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The paper implementation new approach method applied into transforming lumped element circuit into microstrip line form for Butterworth low pass filter which is operating at LC band. The filter’s lumped element circuits and microstrip line form were first designed and simulated using Advanced Design Software (ADS) to obtain the best filter characteristic based on S-parameter and implemented on FR4 substrate for order N=3,4,5,6,7,8 and 9. The importance of a new approach of transforming method as a correction factor has been considered into designed microstrip line. From ADS simulation results proved that the response of microstrip line circuit of Butterworth low pass filter with fringing correction factor has an excellent agreement with its lumped circuit. This shows that the new approach of transforming lumped element circuit into microstrip line is able to solve the conventional design of complexity size of circuit of Butterworth low pass filter (LPF) into microstrip line.

Keywords: Butterworth low pass filter, number of order, microstrip line, microwave filter, maximally flat

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Authors: M. Khouil, N. Saber, M. Mestari

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In this paper, a different architecture of a collision detection neural network (DCNN) is developed. This network, which has been particularly reviewed, has enabled us to solve with a new approach the problem of collision detection between two convex polyhedra in a fixed time (O (1) time). We used two types of neurons, linear and threshold logic, which simplified the actual implementation of all the networks proposed. The study of the collision detection is divided into two sections, the collision between a point and a polyhedron and then the collision between two convex polyhedra. The aim of this research is to determine through the AMAXNET network a mini maximum point in a fixed time, which allows us to detect the presence of a potential collision.

Keywords: collision identification, fixed time, convex polyhedra, neural network, AMAXNET

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Authors: Omar Eldenali, Ahmed M. Bufares

Abstract:

There are primarily two types of Unmanned Aerial Vehicle (UAVs), namely, multirotor and fixed wing. Each type has its own advantages. This study introduces a design of a fixed wing vertical take-off and landing (VTOL) UAV. The design is classified as ready-to-fly (RTF) fixed wing UAV. This means that the UAV is capable of not only taking off, landing, or hovering like a multirotor aircraft but also cruising like a fixed wing UAV. In this study, the conceptual design of 15 kg takeoff weight twin-tail boom configuration FW-VTOL plane is carried out, the initial sizing of the plane is conducted, and both the horizontal and vertical tail configurations are estimated. Moreover, the power required for each stage of flight is determined. Finally, the stability analysis of the plane based on this design is performed, the results shows that this design based on the suggested flight mission is stable and can be utilized.

Keywords: FW-VTOL, initial sizing, constrain analysis, stability

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Authors: Wirat Sonchan, Pratoom Moungmee, Anek Sootmongkol

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This study aimed to examine the effects of a circuit training program on muscle strength, agility, anaerobic performance and cardiovascular endurance. The study involved 24 freshmen (age 18.87+0.68 yr.) male students of the Faculty of Sport Science, Burapha University. They sample study were randomly divided into two groups: Circuit Training group (CT; n=12) and a Control group (C; n=12). Baseline data on height, weight, muscle strength (hand grip dynamometer and leg strength dynamometer), agility (agility T-Test), and anaerobic performance (Running-based Anaerobic Sprint Test) and cardiovascular endurance (20 m Endurance Shuttle Run Test) were collected. The circuit training program included one circuit of eight stations of 30/60 seconds of work/rest interval with two cycles in Week 1-4, and 60/90 seconds of work/rest interval with three cycles in Week 5-8, performed three times per week. Data were analyzed using paired t-tests and independent sample t-test. Statistically significance level was set at 0.05. The results show that after 8 weeks of a training program, muscle strength, agility, anaerobic capacity and cardiovascular endurance increased significantly in the CT Group (p < 0.05), while significant increase was not observed in the C Group (p < 0.05). The results of this study suggest that the circuit training program improved muscle strength, agility, anaerobic capacity and cardiovascular endurance of the study subjects. This program may be used as a guideline for selecting a set of exercise to improve physical fitness.

Keywords: circuit training, physical fitness, cardiovascular endurance, anaerobic performance

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Authors: Po-Hui Yang, Jing-Min Chen, Po-Yu Kuo, Chia-Chun Wu

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This paper proposed a high resolution Vernier Delay Line (VDL) measurement circuit with coarse and fine detection mechanism, which improved the trade-off problem between high resolution and less delay cells in traditional VDL circuits. And the measuring time of proposed measurement circuit is also under the high resolution requests. At first, the testing range of input signal which proposed high resolution delay line is detected by coarse detection VDL. Moreover, the delayed input signal is transmitted to fine detection VDL for measuring value with better accuracy. This paper is implemented at 0.18μm process, operating frequency is 100 MHz, and the resolution achieved 2.0 ps with only 16-stage delay cells. The test range is 170ps wide, and 17% stages saved compare with traditional single delay line circuit.

Keywords: vernier delay line, D-type flip-flop, DFF, metastable phenomenon

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Authors: A. Aarabzadeh, R. Hizaji

Abstract:

Reinforced Concrete (RC) deep beams are a special type of beams due to their geometry, boundary conditions, and behavior compared to ordinary shallow beams. For example, assumption of a linear strain-stress distribution in the cross section is not valid. Little study has been dedicated to fixed-end RC deep beams. Also, most experimental studies are carried out on simply supported deep beams. Regarding recent tendency for application of deep beams, possibility of using fixed-ended deep beams has been widely increased in structures. Therefore, it seems necessary to investigate the aforementioned structural element in more details. In addition to experimental investigation of a concrete deep beam under cyclic load, different failure mechanisms of fixed-ended deep beams under this type of loading have been evaluated in the present study. The results show that failure mechanisms of deep beams under cyclic loads are quite different from monotonic loads.

Keywords: deep beam, cyclic load, reinforced concrete, fixed-ended

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Authors: Paschal A. Ochang, Emmanuel C. Oji

Abstract:

The Duffing’s Equation is a second order system that is very important because they are fundamental to the behaviour of higher order systems and they have applications in almost all fields of science and engineering. In the biological area, it is useful in plant stem dependence and natural frequency and model of the Brain Crash Analysis (BCA). In Engineering, it is useful in the study of Damping indoor construction and Traffic lights and to the meteorologist it is used in the prediction of weather conditions. However, most Problems in real life that occur are non-linear in nature and may not have analytical solutions except approximations or simulations, so trying to find an exact explicit solution may in general be complicated and sometimes impossible. Therefore we aim to find out if it is possible to obtain one analytical fixed point to the non-linear ordinary equation using fixed point analytical method. We started by exposing the scope of the Duffing’s equation and other related works on it. With a major focus on the fixed point and fixed point iterative scheme, we tried different iterative schemes on the Duffing’s Equation. We were able to identify that one can only see the fixed points to a Damped Duffing’s Equation and not to the Undamped Duffing’s Equation. This is because the cubic nonlinearity term is the determining factor to the Duffing’s Equation. We finally came to the results where we identified the stability of an equation that is damped, forced and second order in nature. Generally, in this research, we approximate the solution of Duffing’s Equation by converting it to a system of First and Second Order Ordinary Differential Equation and using Fixed Point Iterative approach. This approach shows that for different versions of Duffing’s Equations (damped), we find fixed points, therefore the order of computations and running time of applied software in all fields using the Duffing’s equation will be reduced.

Keywords: damping, Duffing's equation, fixed point analysis, second order differential, stability analysis

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Authors: D. Touil, L. Ouadah

Abstract:

An industrial model of cement grinding circuit is proposed on the basis of sampling surveys undertaken in the Meftah cement plant in Algiers, Algeria. The ball mill is described by a series of equal fully mixed stages that incorporates the effect of air sweeping. The kinetic parameters of this material in the energy normalized form obtained using the data of batch dry ball milling are taken into account in developing the present scale-up procedure. The dynamic separator is represented by the air classifier selectivity equation corrected by empirical factors. The model is incorporated in computer program that predict full size distributions and mass flow rates for all streams in a circuit under a particular set of operating conditions.

Keywords: grinding circuit, clinker, cement, modeling, population balance, energy

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Authors: Shoeb Ahmed Adeel, Vivek Paul, K. Prajwal, Michael Fenelon

Abstract:

Techniques have been used to tether and stabilize a multi-rotor MAV but carrying out the same process to a fixed wing MAV is a novel method which can be utilized in order to reduce damage occurring to the fixed wing MAVs while conducting flight test trials and PID tuning. A few sensors and on board controller is required to carry out this experiment in horizontal and vertical plane of the vehicle. Here we will be discussing issues such as sensitivity of the air vehicle, endurance and external load of the string acting on the vehicle.

Keywords: MAV, PID tuning, tethered flight, UAV

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Authors: Madina Hamiane

Abstract:

Modelling and simulation of an analogy function generator is presented based on a polynomial expansion model. The proposed function generator model is based on a 10th order polynomial approximation of any of the required functions. The polynomial approximations of these functions can then be implemented using basic CMOS circuit blocks. In this paper, a circuit model is proposed that can simultaneously generate many different mathematical functions. The circuit model is designed and simulated with HSPICE and its performance is demonstrated through the simulation of a number of non-linear functions.

Keywords: modelling and simulation, analog function generator, polynomial approximation, CMOS transistors

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Authors: Maryam Moosavi, Hadi Khatibzadeh

Abstract:

The main purpose of this paper is to study the proximal point algorithm for quasi-nonexpansive mappings in Hadamard spaces. △-convergence and strong convergence of cyclic resolvents for a finite family of quasi-nonexpansive mappings one to a fixed point of the mappings are established

Keywords: Fixed point, Hadamard space, Proximal point algorithm, Quasi-nonexpansive sequence of mappings, Resolvent

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Authors: Florian Kleber, Martin Kampel

Abstract:

The increasing demand of gallium, indium and rare-earth elements for the production of electronics, e.g. solid state-lighting, photovoltaics, integrated circuits, and liquid crystal displays, will exceed the world-wide supply according to current forecasts. Recycling systems to reclaim these materials are not yet in place, which challenges the sustainability of these technologies. This paper proposes a multispectral imaging system as a basis for a vision based recognition system for valuable components of electronics waste. Multispectral images intend to enhance the contrast of images of printed circuit boards (single components, as well as labels) for further analysis, such as optical character recognition and entire printed circuit board recognition. The results show that a higher contrast is achieved in the near infrared compared to ultraviolet and visible light.

Keywords: electronics waste, multispectral imaging, printed circuit boards, rare-earth elements

Procedia PDF Downloads 390

Authors: Yasunori Kobori, Li Quan, Shu Wu, Nizam Mohyar, Zachary Nosker, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

Abstract:

This paper proposes an electrolytic capacitor-less transformer-less AC-DC LED driver with a current ripple canceller. The proposed LED driver includes a diode bridge, a buck-boost converter, a negative feedback controller and a current ripple cancellation circuit. The current ripple canceller works as a bi-directional current converter using a sub-inductor, a sub-capacitor and two switches for controlling current flow. LED voltage is controlled in order to regulate LED current by the negative feedback controller using a current sense resistor. There are two capacitors which capacitance of 5 uF. We describe circuit topologies, operation principles and simulation results for our proposed circuit. In addition, we show the line regulation for input voltage variation from 85V to 130V. The output voltage ripple is 2V and the LED current ripple is 65 mA which is less than 20% of the typical current of 350 mA. We are now making the proposed circuit on a universal board in order to measure the experimental characteristics.

Keywords: LED driver, electrolytic, capacitor-less, AC-DC converter, buck-boost converter, current ripple canceller

Procedia PDF Downloads 440