Search results for: high voltage

Authors: Mykhailo Moskalets, Pablo Burset, Benjamin Roussel, Christian Flindt

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The single-particle injection from the Andreev level and how such injection is simulated using a voltage pulse are discussed. Recently, high-speed quantum-coherent electron sources injecting one- to few-particle excitations into the Fermi sea have been experimentally realized. The main obstacle to using these excitations as flying qubits for quantum-information processing purposes is decoherence due to the long-range Coulomb interaction. An obvious way to get around this difficulty is to employ electrically neutral excitations. Here it is discussed how such excitations can be generated on-demand using the same injection principles as in existing electron sources. Namely, with the help of a voltage pulse of a certain shape applied to the Fermi sea or using a driven quantum dot with superconducting correlations. The advantage of the latter approach is the possibility of varying the electron-hole content in the excitation and the possibility of creating a charge-neutral but spin-dipole excitation.

Keywords: Andreev level, on-demand, single-electron, spin-dipole

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Authors: Hassan Jassim Motlak

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A novel design technique employing CMOS Current Feedback Operational Amplifier (CFOA) is presented. The feature of consumption whivh has a very low power in designing pseudo-OTA is used to decreasing the total power consumption of the proposed CFOA. This design approach applies pseudo-OTA as input stage cascaded with buffer stage. Moreover, the DC input offset voltage and harmonic distortion (HD) of the proposed CFOA are very low values compared with the conventional CMOS CFOA due to symmetrical input stage. P-Spice simulation results using 0.18µm MIETEC CMOS process parameters using supply voltage of ±1.2V and 50μA biasing current. The P-Spice simulation shows excellent improvement of the proposed CFOA over existing CMOS CFOA. Some of these performance parameters, for example, are DC gain of 62. dB, open-loop gain-bandwidth product of 108 MHz, slew rate (SR+) of +71.2V/µS, THD of -63dB and DC consumption power (PC) of 2mW.

Keywords: pseudo-OTA used CMOS CFOA, low power CFOA, high-performance CFOA, novel CFOA

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Authors: Seyed Hossein Hosseini, Seyed Majid Hashemzadeh

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Solar energy is one of the remarkable renewable energy sources that have particular characteristics such as unlimited, no environmental pollution, and free access. Generally, solar energy can be used in thermal and photovoltaic (PV) types. The cost of installation of the PV system is very high. Additionally, due to dependence on environmental situations such as solar radiation and ambient temperature, electrical power generation of this system is unpredictable and without power electronics devices, there is no guarantee to maximum power delivery at the output of this system. Maximum power point tracking (MPPT) should be used to achieve the maximum power of a PV string. MPPT is one of the essential parts of the PV system which without this section, it would be impossible to reach the maximum amount of the PV string power and high losses are caused in the PV system. One of the noticeable challenges in the problem of MPPT is the partial shading conditions (PSC). In PSC, the output photocurrent of the PV module under the shadow is less than the PV string current. The difference between the mentioned currents passes from the module's internal parallel resistance and creates a large negative voltage across shaded modules. This significant negative voltage damages the PV module under the shadow. This condition is called hot-spot phenomenon. An anti-paralleled diode is inserted across the PV module to prevent the happening of this phenomenon. This diode is known as the bypass diode. Due to the performance of the bypass diode under PSC, the P-V curve of the PV string has several peaks. One of the P-V curve peaks that makes the maximum available power is the global peak. Model-based Global MPPT (GMPPT) methods can estimate the optimal point with higher speed than other GMPPT approaches. Centralized, modular, and interleaved DC-DC converter topologies are the significant structures that can be used for GMPPT at a PV string. there are some problems in the centralized structure such as current mismatch losses at PV sting, loss of power of the shaded modules because of bypassing by bypass diodes under PSC, needing to series connection of many PV modules to reach the desired voltage level. In the modular structure, each PV module is connected to a DC-DC converter. In this structure, by increasing the amount of demanded power from the PV string, the number of DC-DC converters that are used at the PV system will increase. As a result, the cost of the modular structure is very high. We can implement the model-based GMPPT through the multi-input interleaved boost DC-DC converter to increase the power extraction from the PV string and reduce hot-spot and current mismatch error in a PV string under different environmental condition and variable load circumstances. The interleaved boost DC-DC converter has many privileges than other mentioned structures, such as high reliability and efficiency, better regulation of DC voltage at DC link, overcome the notable errors such as module's current mismatch and hot spot phenomenon, and power switches voltage stress reduction.

Keywords: solar energy, photovoltaic systems, interleaved boost converter, maximum power point tracking, model-based method, partial shading conditions

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Authors: Wei Zha, Jingzeng Zhang, Chen Zhao, Ran Cai, Xueyuan Nie

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Cathodic plasma electrolysis (CPE) is used to create surface textures on cast iron samples for improving the tribological properties. Micro craters with confined size distribution were successfully formed by CPE process. These craters can generate extra hydrodynamic pressure that separates two sliding surfaces, increase the oil film thickness and accelerate the transition from boundary to mixed lubrication. It was found that the optimal crater size was 1.7 μm, at which the maximum lubrication efficiency was achieved. The Taguchi method was used to optimize the process parameters (voltage and roughness) for CPE surface texturing. The orthogonal array and the signal-to-noise ratio were employed to study the effect of each process parameter on the coefficient of friction. The results showed that with higher voltage and lower roughness, the lower friction coefficient can be obtained, and thus the lubrication can be more efficiently used for friction reduction.

Keywords: cathodic plasma electrolysis, friction, lubrication, plasma surface texturing

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Authors: Jaimala Ghambir, Tilak Thakur, Puneet Chawla

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As per the statistical data, the Doubly-fed Induction Generator (DFIG) based wind turbine with variable speed and variable pitch control is the most common wind turbine in the growing wind market. This machine is usually used on the grid connected wind energy conversion system to satisfy grid code requirements such as grid stability, fault ride through (FRT), power quality improvement, grid synchronization and power control etc. Though the requirements are not fulfilled directly by the machine, the control strategy is used in both the stator as well as rotor side along with power electronic converters to fulfil the requirements stated above. To satisfy the grid code requirements of wind turbine, usually grid side converter is playing a major role. So in order to improve the operation capacity of wind turbine under critical situation, the intensive study of both machine side converter control and grid side converter control is necessary In this paper DFIG is modeled using power components as variables and the performance of the DFIG system is analysed under grid voltage fluctuations. The voltage fluctuations are made by lowering and raising the voltage values in the utility grid intentionally for the purpose of simulation keeping in view of different grid disturbances.

Keywords: DFIG, dynamic modeling, DPC, sag, swell, voltage fluctuations, FRT

Procedia PDF Downloads 462

Authors: Bachir Belmadani, Rachid Taleb, M’hamed Helaimi

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Multilevel inverters are well used in high power electronic applications because of their ability to generate a very good quality of waveforms, reducing switching frequency, and their low voltage stress across the power devices. This paper presents the hybrid pulse-width modulation (HPWM) strategy of a uniform step asymmetrical cascaded H-bridge nine-level Inverter (USACHB9LI). The HPWM approach is compared to the well-known sinusoidal pulse-width modulation (SPWM) strategy. Simulation results demonstrate the better performances and technical advantages of the HPWM controller in feeding a high power induction motor.

Keywords: uniform step asymmetrical cascaded h-bridge high-level inverter, hybrid pwm, sinusoidal pwm, high power induction motor

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Authors: Sumana Kumar, Abha Misra

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Micro-supercapacitors hold great attention as one of the promising energy storage devices satisfying the increasing quest for miniaturized and portable devices. Despite having impressive power density, superior cyclic lifetime, and high charge-discharge rates, micro-supercapacitors still suffer from low energy density, which limits their practical application. The energy density (E=1/2CV²) can be increased either by increasing specific capacitance (C) or voltage range (V). Asymmetric micro-supercapacitors have attracted great attention by using two different electrode materials to expand the voltage window and thus increase the energy density. Currently, versatile fabrication technologies such as inkjet printing, lithography, laser scribing, etc., are used to directly or indirectly pattern the electrode material; these techniques still suffer from scalable production and cost inefficiency. Here, we demonstrate the scalable production of a three-dimensional (3D) carbon foam (CF) based asymmetric micro-supercapacitor by spray printing technique on an array of interdigital electrodes. The solid-state asymmetric micro-supercapacitor comprised of CF-MnO positive electrode and CF-Fe₂O₃ negative electrode achieves a high areal capacitance of 18.4 mF/cm² (2326.8 mF/cm³) at 5 mV/s and a wider potential window of 1.4 V. Consequently, a superior energy density of 5 µWh/cm² is obtained, and high cyclic stability is confirmed with retention of the initial capacitance by 86.1% after 10000 electrochemical cycles. The optimized decoration of pseudocapacitive metal oxides in the 3D carbon network helps in high electrochemical utilization of materials where the 3D interconnected network of carbon provides overall electrical conductivity and structural integrity. The research provides a simple and scalable spray printing method to fabricate an asymmetric micro-supercapacitor using a custom-made mask that can be integrated on a large scale.

Keywords: asymmetric micro-supercapacitors, high energy-density, hybrid materials, three-dimensional carbon-foam

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Authors: Clara Oliver, Oibar Martinez

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This paper is intended to reveal the severity of electrostatic discharge (ESD) effects in electronic and optoelectronic devices by performing sensitivity tests based on Human Body Model (HBM) standard. We explain here the HBM standard in detail together with the typical failure modes associated with electrostatic discharges. In addition, a prototype of electrostatic charge generator has been designed, fabricated, and verified to stress electronic devices, which features a compact high voltage source. This prototype is inexpensive and enables one to do a battery of pre-compliance tests aimed at detecting unexpected weaknesses to static discharges at the component level. Some tests with different devices were performed to illustrate the behavior of the proposed generator. A set of discharges was applied according to the HBM standard to commercially available bipolar transistors, complementary metal-oxide-semiconductor transistors and light emitting diodes. It is observed that high current and voltage ratings in electronic devices not necessarily provide a guarantee that the device will withstand high levels of electrostatic discharges. We have also compared the result obtained by performing the sensitivity tests based on HBM with a real discharge generated by a human. For this purpose, the charge accumulated in the person is monitored, and a direct discharge against the devices is generated by touching them. Every test has been performed under controlled relative humidity conditions. It is believed that this paper can be of interest for research teams involved in the development of electronic and optoelectronic devices which need to verify the reliability of their devices in terms of robustness to electrostatic discharges.

Keywords: human body model, electrostatic discharge, sensitivity tests, static charge monitoring

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Authors: Ajay Kumar, Neha Gupta

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This work presents the sensitivity assessment of Gallium Nitride (GaN) material-based FinFET by dielectric modulation in the nanocavity gap for label-free biosensing applications. The significant deflection is observed in the electrical characteristics such as drain current (ID), transconductance (gm), surface potential, energy band profile, electric field, sub-threshold slope (SS), and threshold voltage (Vth) in the presence of biomolecules owing to GaN material. Further, the device sensitivity is evaluated to identify the effectiveness of the proposed biosensor and its capability to detect the biomolecules with high precision or accuracy. Higher sensitivity is observed for Gelatin (k=12) in terms of on-current (SION), threshold voltage (SVth), and switching ratio (SSR) by 104.88%, 82.12%, and 119.73%, respectively. This work is performed using a powerful tool 3D Sentaurus TCAD using a well-calibrated structure. All the results pave the way for GaN-FinFET as a viable candidate for label-free dielectric modulated biosensor applications.

Keywords: biosensor, biomolecules, FinFET, sensitivity

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Authors: Sani M. Lawal, Idris Musa, Aliyu D. Usman

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The Pareto approach of optimal solutions in a search space that evolved in multi-objective optimization problems is adopted in this paper, which stands for a set of solutions in the search space. This paper aims at presenting an optimal placement of Distributed Generation (DG) in radial distribution networks with an optimal size for minimization of power loss and voltage deviation as well as maximizing voltage profile of the networks. And these problems are formulated using particle swarm optimization (PSO) as a constraint nonlinear optimization problem with both locations and sizes of DG being continuous. The objective functions adopted are the total active power loss function and voltage deviation function. The multiple nature of the problem, made it necessary to form a multi-objective function in search of the solution that consists of both the DG location and size. The proposed PSO algorithm is used to determine optimal placement and size of DG in a distribution network. The output indicates that PSO algorithm technique shows an edge over other types of search methods due to its effectiveness and computational efficiency. The proposed method is tested on the standard IEEE 34-bus and validated with 33-bus test systems distribution networks. Results indicate that the sizing and location of DG are system dependent and should be optimally selected before installing the distributed generators in the system and also an improvement in the voltage profile and power loss reduction have been achieved.

Keywords: distributed generation, pareto, particle swarm optimization, power loss, voltage deviation

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Authors: Rachid Taleb, M’hamed Helaimi, Djilali Benyoucef, Ahmed Derrouazin

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Multilevel inverters are well used in high power electronic applications because of their ability to generate a very good quality of waveforms, reducing switching frequency, and their low voltage stress across the power devices. This paper presents the Optimal Minimization of the Total Harmonic Distortion (OMTHD) strategy of a uniform step asymmetrical seven-level inverter (USA7LI). The OMTHD approach is compared to the well-known sinusoidal pulse-width modulation (SPWM) strategy. Simulation results demonstrate the better performances and technical advantages of the OMTHD controller in feeding a High Power Induction Motor (HPIM).

Keywords: uniform step asymmetrical seven-level inverter (USA7LI), optimal minimization of the THD (OMTHD), sinusoidal PWM (SPWM), high power induction motor (HPIM)

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Authors: Mohamed E. Harb, Enas Moustafa, Shaker Ebrahim, Moataz Soliman

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In this paper pressure detectors were synthesized and characterized using hybrid perovskite/PVDF composites as an active layer. Methylammonium lead iodide (MAPbI₃) was synthesized from methylammonium iodide (MAI) (CH₃NH₃I) and lead iodide (PbI₂). Composites of perovskite/PVDF using different weight ratio were prepared as the active material. PVDF with weights percentages of 6%, 8%, and 10% was used. All prepared materials were investigated by x-ray diffraction (XRD), Fourier transforms infrared spectrum (FTIR) and scanning electron microscopy (SEM). A Versastat 4 Potentiostat Galvanostat instrument was used to perform the current-voltage characteristics of the fabricated sensors. The pressure sensors exhibited a voltage increase with applying different forces. Also, the current-voltage characteristics (CV) showed different effects with applying forces. So, the results showed a good pressure sensing performance.

Keywords: perovskite semiconductor, hybrid perovskite, PVDF, Pressure sensing

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Authors: Toushik Maiti, Saibal Chatterjee, Kamaljyoti Gogoi, Arijit Basuray

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Eastern Regional(ER) Grid and North Eastern Regional (NER) Grid are two major grids of Eastern Part of India. Both of the grid consists of voltage level 765kV, 400 kV, 220 kV and numerous buses at lower voltage range. Eastern Regional Grid and North Eastern Regional Grid are not only connected among themselves but are also connected to various other grids of India. ER and NER Grid having various HVDC lines or back to back systems which form the total network. The studied system comprises of 340 buses of different voltage levels and transmission lines running over a length of 32089 km. The validation of load flow has been done using IEEE STANDARD 30 bus system. The power flow simulation analysis has been performed after synchronizing both the Eastern Grid and North-Eastern Regional Grid of India using Power System Simulators for Engineering (PSS®E) Important inferences has been drawn from the study.

Keywords: HVDC, load flow, PSS®E, unsymmetrical and symmetrical faults

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Authors: Adedayo Ajayi, Patrick Luk, Liyun Lao

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This paper studies the supportive needs for the electrical infrastructure of the green airport. In particular, the core objective revolves around the choice of electric grid configuration required to meet the expected electrified loads, i.e., the taxiing and charging loads of hybrid /pure electric aircraft in the airport. Further, reliability and resilience are critical aspects of a newly proposed grid; the concept of mobile energy storage as energy as a service (EAAS) for grid support in the proposed green airport is investigated using an autonomous electric taxiing robot (A-ETR) at a case study (Cranfield Airport). The performance of the model is verified and validated through DigSILENT power factory simulation software to compare the networks in terms of power quality, short circuit fault levels, system voltage profile, and power losses. Contingency and reliability index analysis are further carried out to show the potential of EAAS on the grid. The results demonstrate that the low voltage a.c network ( LVAC) architecture gives better performance with adequate compensation than the low voltage d.c (LVDC) microgrid architecture for future green airport electrification integration. And A-ETR can deliver energy as a service (EaaS) to improve the airport's electrical power system resilience and energy supply.

Keywords: reliability, voltage profile, flightpath 2050, green airport

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Authors: Tariku Nefo Duke

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Herein, we synthesized three PIs/h-boron nitride composite films for corrosion resistance of mild steel material. The structures of these three polyimide/h-boron nitride composite films were confirmed using (FTIR, 1H NMR, 13C NMR, and 2D NMR) spectroscopy techniques. The synthesized PIs composite films have high mechanical properties, thermal stability, high glass-transition temperature (Tg), and insulating properties. It has been shown that the presence of electroactive TiO2, SiO2, and h-BN, in polymer coatings effectively inhibits corrosion. The h-BN displays an admirable anti-corrosion barrier for the 6F-OD and BT-OD films. PI/ h-BN composite films of 6F-OD exhibited better resistance to water vapor, high corrosion resistance, and positive corrosion voltage. Only four wt. percentage of h-BN in the composite is adequate.

Keywords: polyimide, corrosion resistance, electroactive, Tg

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Authors: Anil Kumar Pandey

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Power plane noise is the most significant source of signal integrity (SI) issues in a high-speed digital design. In this paper, power integrity (PI) analysis of multiple power planes in a power delivery system of a 12-layer high-speed FPGA board is presented. All 10 power planes of HSD board are analyzed separately by using 3D Electromagnetic based PI solver, then the transient simulation is performed on combined PI data of all planes along with voltage regulator modules (VRMs) and 70 current drawing chips to get the board level power noise coupling on different high-speed signals. De-coupling capacitors are placed between power planes and ground to reduce power noise coupling with signals.

Keywords: power integrity, power-aware signal integrity analysis, electromagnetic simulation, channel simulation

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Authors: Rahil Bahrami, Kaveh Ashenayi

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This paper presents a systematic classification and comparative analysis of non-isolated bi-directional DC-DC converters. The increasing demand for efficient energy conversion in diverse applications has spurred the development of various converter topologies. In this study, we categorize bi-directional converters into three distinct classes: Inverting, Non-Inverting, and Interleaved. Each category is characterized by its unique operational characteristics and benefits. Furthermore, a practical comparison is conducted by evaluating the results of simulation of each bi-directional converter. BDCs can be classified into isolated and non-isolated topologies. Non-isolated converters share a common ground between input and output, making them suitable for applications with minimal voltage change. They are easy to integrate, lightweight, and cost-effective but have limitations like limited voltage gain, switching losses, and no protection against high voltages. Isolated converters use transformers to separate input and output, offering safety benefits, high voltage gain, and noise reduction. They are larger and more costly but are essential for automotive designs where safety is crucial. The paper focuses on non-isolated systems.The paper discusses the classification of non-isolated bidirectional converters based on several criteria. Common factors used for classification include topology, voltage conversion, control strategy, power capacity, voltage range, and application. These factors serve as a foundation for categorizing converters, although the specific scheme might vary depending on contextual, application, or system-specific requirements. The paper presents a three-category classification for non-isolated bi-directional DC-DC converters: inverting, non-inverting, and interleaved. In the inverting category, converters produce an output voltage with reversed polarity compared to the input voltage, achieved through specific circuit configurations and control strategies. This is valuable in applications such as motor control and grid-tied solar systems. The non-inverting category consists of converters maintaining the same voltage polarity, useful in scenarios like battery equalization. Lastly, the interleaved category employs parallel converter stages to enhance power delivery and reduce current ripple. This classification framework enhances comprehension and analysis of non-isolated bi-directional DC-DC converters. The findings contribute to a deeper understanding of the trade-offs and merits associated with different converter types. As a result, this work aids researchers, practitioners, and engineers in selecting appropriate bi-directional converter solutions for specific energy conversion requirements. The proposed classification framework and experimental assessment collectively enhance the comprehension of non-isolated bi-directional DC-DC converters, fostering advancements in efficient power management and utilization.The simulation process involves the utilization of PSIM to model and simulate non-isolated bi-directional converter from both inverted and non-inverted category. The aim is to conduct a comprehensive comparative analysis of these converters, considering key performance indicators such as rise time, efficiency, ripple factor, and maximum error. This systematic evaluation provides valuable insights into the dynamic response, energy efficiency, output stability, and overall precision of the converters. The results of this comparison facilitate informed decision-making and potential optimizations, ensuring that the chosen converter configuration aligns effectively with the designated operational criteria and performance goals.

Keywords: bi-directional, DC-DC converter, non-isolated, energy conversion

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Authors: Christos Konstantopoulos, Thomas Ussmueller

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Digital low drop-out regulators, in contrast to analog counterparts, provide an architecture of sub-1 V regulation with low power consumption, high power efficiency, and system integration. Towards an optimized integration in the ultra-low-power system-on-chip Internet of Things architecture that is operated through a radio frequency energy harvesting scheme, the D-LDO regulator should constitute the main regulator that operates the master-clock and rest loads of the SoC. In this context, we present a D-LDO with linear search coarse regulation and asynchronous fine regulation, which incorporates an in-regulator clock generation unit that provides an autonomous, self-start-up, and power-efficient D-LDO design. In contrast to contemporary D-LDO designs that employ ring-oscillator architecture which start-up time is dependent on the frequency, this work presents a fast start-up burst oscillator based on a high-gain stage with wake-up time independent of coarse regulation frequency. The design is implemented in a 55-nm Global Foundries CMOS process. With the purpose to validate the self-start-up capability of the presented D-LDO in the presence of ultra-low input power, an on-chip test-bench with an RF rectifier is implemented as well, which provides the RF to DC operation and feeds the D-LDO. Power efficiency and load regulation curves of the D-LDO are presented as extracted from the RF to regulated DC operation. The D-LDO regulator presents 83.6 % power efficiency during the RF to DC operation with a 3.65 uA load current and voltage regulator referred input power of -27 dBm. It succeeds 486 nA maximum quiescent current with CL 75 pF, the maximum current efficiency of 99.2%, and 1.16x power efficiency improvement compared to analog voltage regulator counterpart oriented to SoC IoT loads. Complementary, the transient performance of the D-LDO is evaluated under the transient droop test, and the achieved figure-of-merit is compared with state-of-art implementations.

Keywords: D-LDO, Internet of Things, RF energy harvesting, voltage regulators

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Authors: Abhimanyu Kumar, Chirag Gupta

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This work presents a comprehensive study on the employment of Model Predictive Control (MPC) for a three-phase voltage-source inverter to regulate the output voltage efficiently. The inverter is modeled via the Clarke Transformation, considering a scenario where the load is unknown. An LC filter model is developed, demonstrating its efficacy in Total Harmonic Distortion (THD) reduction. The system, when implemented with fault-tolerant multilevel inverter topologies, ensures reliable operation even under fault conditions, a requirement that is paramount with the increasing dependence on renewable energy sources. The research also integrates a Fuzzy Logic based fault tolerance system which identifies and manages faults, ensuring consistent inverter performance. The efficacy of the proposed methodology is substantiated through rigorous simulations and comparative results, shedding light on the voltage prediction efficiency and the robustness of the model even under fault conditions.

Keywords: total harmonic distortion, fuzzy logic, renewable energy sources, MLI

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Authors: T. Sattarpour, D. Nazarpour

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This paper investigates the effect of simultaneous placement of DGs and smart meters (SMs), on voltage profile improvement in active distribution networks (ADNs). A substantial center of attention has recently been on responsive loads initiated in power system problem studies such as distributed generations (DGs). Existence of responsive loads in active distribution networks (ADNs) would have undeniable effect on sizing and siting of DGs. For this reason, an optimal framework is proposed for sizing and siting of DGs and SMs in ADNs. SMs are taken into consideration for the sake of successful implementing of demand response programs (DRPs) such as direct load control (DLC) with end-side consumers. Looking for voltage profile improvement, the optimization procedure is solved by genetic algorithm (GA) and tested on IEEE 33-bus distribution test system. Different scenarios with variations in the number of DG units, individual or simultaneous placing of DGs and SMs, and adaptive power factor (APF) mode for DGs to support reactive power have been established. The obtained results confirm the significant effect of DRPs and APF mode in determining the optimal size and site of DGs to be connected in ADN resulting to the improvement of voltage profile as well.

Keywords: active distribution network (ADN), distributed generations (DGs), smart meters (SMs), demand response programs (DRPs), adaptive power factor (APF)

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Authors: Alain Rousseau, Alfred Aragones, Gilles Rougier

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The study is based on lightning and surge standards mainly the EN series 62305 for facility protection, EN series 61643 for Low Voltage Surge Protective Devices, High Voltage surge arrester standard en 60099-4 and the traction arrester standards namely EN 50526-1 and 50526-1 dealing respectively with railway applications fixed installations D.C. surge arresters and voltage limiting devices. The more severe stress for tramways installations is caused by direct lightning on the catenary line. In such case, the surge current propagates towards the various poles and sparkover the insulators leading to a lower stress. If the impact point is near enough, a significant surge current will flow towards the traction surge arrester that is installed on the catenary at the location the substation is connected. Another surge arrester can be installed at the entrance of the substation or even inside the rectifier to avoid insulation damages. In addition, surge arresters can be installed between + and – to avoid damaging sensitive circuits. Based on disturbances encountered in a substation following a lighting event, the engineering department of RATP has decided to investigate the cause of such damage and more generally to question the efficiency of the various possible protection means. Based on the example of a recent tramway line the paper present the result of a lightning study based on direct lightning strikes. As a matter of fact, the induced surges on the catenary are much more frequent but much less damaging. First, a lightning risk assessment is performed for the substations that takes into account direct lightning and induced lightning both on the substation and its connected lines such as the catenary. Then the paper deals with efficiency of the various surge arresters is discussed based on field experience and calculations. The efficiency of the earthing system used at the bottom of the pole is also addressed based on high frequency earthing measurement. As a conclusion, the paper is making recommendations for an enhanced efficiency of existing protection means.

Keywords: surge arrester, traction, lightning, risk, surge protective device

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Authors: Rihab Hamdi, Amel Hadri Hamida, Ouafae Bennis, Sakina Zerouali

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This paper features a performance analysis and robustness assessment of a digitally controlled DC-DC three-cell buck converter associated in parallel, operating in continuous conduction mode (CCM), facing feeding parameters variation and loads disturbance. The control strategy relies on the continuous-time with an averaged modeling technique for high-frequency switching converter. The methodology is to modulate the complete design procedure, in regard to the existence of an instantaneous current operating point for designing the digital closed-loop, to the same continuous-time domain. Moreover, the adopted approach is to include a digital voltage control (DVC) technique, taking an account for digital control delays and sampling effects, which aims at improving efficiency and dynamic response and preventing generally undesired phenomena. The results obtained under load change, input change, and reference change clearly demonstrates an excellent dynamic response of the proposed technique, also as provide stability in any operating conditions, the effectiveness is fast with a smooth tracking of the specified output voltage. Simulations studies in MATLAB/Simulink environment are performed to verify the concept.

Keywords: continuous conduction mode, digital control, parallel multi-cells converter, performance analysis, power electronics

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Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Guillaume Soubeyran, Fabrice Micoud, Benoit Morin, Jean-Philippe Poirot-Crouvezier, Magali Reytier

Abstract:

Proton Exchange Membrane Fuel Cell (PEMFC) technology is considered as a solution for the reduction of CO2 emissions. However, this technology still meets several challenges for high-scale industrialization. In this context, the increase of durability remains a critical aspect for competitiveness of this technology. Fortunately, performance degradations in nominal operating conditions is partially reversible, meaning that if specific conditions are applied, a partial recovery of fuel cell performance can be achieved, while irreversible degradations can only be mitigated. Thus, it is worth studying the optimal conditions to rejuvenate these reversible degradations and assessing the long-term impact of such procedures on the performance of the cell. Reversible degradations consist mainly of anode Pt active sites poisoning by carbon monoxide at the anode, heterogeneities in water management during use, and oxidation/deactivation of Pt active sites at the cathode. The latter is identified as a major source of reversible performance loss caused by the presence oxygen, high temperature and high cathode potential that favor platinum oxidation, especially in high efficiency operating points. Hence, we studied here a recovery procedure aiming at reducing the platinum oxides by decreasing cathode potential during operation. Indeed, the application of short air starvation phase leads to a drop of cathode potential. Cell performances are temporarily increased afterwards. Nevertheless, local temperature and current heterogeneities within the cells are favored and shall be minimized. The consumption of fuel during the recovery phase shall also be considered to evaluate the global efficiency. Consequently, the purpose of this work is to find an optimal compromise between the recovery of reversible degradations by air starvation, the increase of global cell efficiency and the mitigation of irreversible degradations effects. Different operating parameters have first been studied such as cell voltage, temperature and humidity in single cell set-up. Considering the global PEMFC system efficiency, tests showed that reducing duration of recovery phase and reducing cell voltage was the key to ensure an efficient recovery. Recovery phase frequency was a major factor as well. A specific method was established to find the optimal frequency depending on the duration and voltage of the recovery phase. Then, long-term degradations have also been studied by applying FC-DLC cycles based on NEDC cycles on a 4-cell short stack by alternating test sequences with and without recovery phases. Depending on recovery phase timing, cell efficiency during the cycle was increased up to 2% thanks to a mean voltage increase of 10 mV during test sequences with recovery phases. However, cyclic voltammetry tests results suggest that the implementation of recovery phases causes an acceleration of the decrease of platinum active areas that could be due to the high potential variations applied to the cathode electrode during operation.

Keywords: durability, PEMFC, recovery procedure, reversible degradation

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Authors: Mansa Radhakrishnan, Anwar Ali, Muhammad Rizwan Mughal

Abstract:

Many universities around the world are working on modular and low budget architecture of small spacecraft to reduce the development cost of the overall system. This paper focuses on the design of a modular solar power harvesting system for a hexagonal-shaped small satellite. The designed solar power harvesting systems are composed of solar panels and power converter subsystems. The solar panel is composed of solar cells mounted on the external face of the printed circuit board (PCB), while the electronic components of power conversion are mounted on the interior side of the same PCB. The solar panel with dimensions 16.5cm × 99cm is composed of 36 solar cells (each solar cell is 4cm × 7cm) divided into four parallel banks where each bank consists of 9 solar cells. The output voltage of a single solar cell is 2.14V, and the combined output voltage of 9 series connected solar cells is around 19.3V. The output voltage of the solar panel is boosted to the satellite power distribution bus voltage level (28V) by a boost converter working on a constant voltage maximum power point tracking (MPPT) technique. The solar panel module is an eight-layer PCB having embedded coil in 4 internal layers. This coil is used to control the attitude of the spacecraft, which consumes power to generate a magnetic field and rotate the spacecraft. As power converter and distribution subsystem components are mounted on the PCB internal layer, therefore it is mandatory to do thermal analysis in order to ensure that the overall module temperature is within thermal safety limits. The main focus of the overall design is on compactness, miniaturization, and efficiency enhancement.

Keywords: small satellites, power subsystem, efficiency, MPPT

Procedia PDF Downloads 74

Authors: Frimpong Kyeremeh, Albert Y. Appiah, Ben B. K. Ayawli

Abstract:

Energy storage system (ESS) is an essential part of a microgrid (MG) because of its immense benefits to the economics and the stability of MG. For a direct current (DC) MG (DCMG) in which the generating units are mostly variable renewable energy generators, DC bus voltage fluctuation is inevitable; hence ESS is vital in managing the mismatch between load demand and generation. Besides, to accrue the maximum benefits of ESS in the microgrid, there is the need for proper sizing and location of the ESSs. In this paper, a performance comparison is made between two configurations of ESS; distributed battery energy storage system (D-BESS) and an aggregated (centralized) battery energy storage system (A-BESS), on the basis of stability and operational cost for a DCMG. The configuration consists of four households with rooftop PV panels and a wind turbine. The objective is to evaluate and analyze the technical efficiencies, cost effectiveness as well as controllability of each configuration. The MG is first modelled with MATLAB Simulink then, a mathematical model is used to determine the optimal size of the BESS that minimizes the total operational cost of the MG. The performance of the two configurations would be tested with simulations. The two configurations are expected to reduce DC bus voltage fluctuations, but in the cases of voltage stability and optimal cost, the best configuration performance will be determined at the end of the research. The work is in progress, and the result would help MG designers and operators to make the best decision on the use of BESS for DCMG configurations.

Keywords: aggregated energy storage system, DC bus voltage, DC microgrid, distributed battery energy storage, stability

Procedia PDF Downloads 157

Authors: S. K. Mohapatra, K. Ramanujam, S. Sankararaman

Abstract:

Redox flow battery (RFB) is a preferred energy storage option for grid stabilisation and energy arbitrage as it offers energy and power decoupling. In contrast to aqueous RFBs (ARFBs), nonaqueous RFBs (NARFBs) could offer high energy densities due to the wider electrochemical window of the solvents used, which could handle high and low voltage organic redox couples without undergoing electrolysis. In this study, a RFB based on benzyl viologen hexafluorophosphate [BV(PF6)2] as anolyte and N-hexyl phenothiazine [HPT] as catholyte demonstrated. A cell operated with mixed electrolyte (1:1) containing 0.2 M [BV(PF₆)₂] and 0.2 M [HPT] delivered a coulombic efficiency (CE) of 95.3 % and energy efficiency (EE) 53%, with nearly 68.9% material utilisation at 40 mA cm-2 current density.

Keywords: non-aqueous redox flow battery, benzyl viologen, N-hexyl phenothiazine, mixed electrolyte

Procedia PDF Downloads 76

Authors: Hassan Mohammad Karimi, Ali Salehzade Nobari, Hosein Shahverdi

Abstract:

With the advancement of technology and the decreasing weight of aerial structures, there is a growing demand for alternative energy sources. Structural vibrations can now be utilized to power low-power sensors for monitoring structural health and charging small batteries in drones. Research on extracting energy from flutter using piezoelectric has been extensive in recent years. This article specifically examines the use of a single-jointed beam with a free surface attached to its free end and a bimorph piezoelectric patch connected to the joint, providing two degrees of torsional and bending freedom. The study investigates the voltage harvested at various wind speeds and bending and twisting stiffness in a wind tunnel. The results indicate that as flutter speed increases, the output voltage also increases to some extent. However, at high wind speeds, the limited cycle created becomes unstable, negatively impacting the harvester's performance. These findings align with other research published in reputable scientific journals.

Keywords: energy harvesting, piezoelectric, flutter, wind tunnel

Procedia PDF Downloads 65

Authors: M. Fadlallah, G. Ghibaudo, C. G. Theodorou

Abstract:

The dynamic variation in memory devices such as the Static Random Access Memory can give errors in read or write operations. In this paper, the effect of low-frequency and random telegraph noise on the dynamic variation of one SRAM cell is detailed. The effect on circuit noise, speed, and length of time of processing is examined, using the Supply Read Retention Voltage and the Read Static Noise Margin. New test run methods are also developed. The obtained results simulation shows the importance of noise caused by dynamic variation, and the impact of Random Telegraph noise on SRAM variability is examined by evaluating the statistical distributions of Random Telegraph noise amplitude in the pull-up, pull-down. The threshold voltage mismatch between neighboring cell transistors due to intrinsic fluctuations typically contributes to larger reductions in static noise margin. Also the contribution of each of the SRAM transistor to total dynamic variation has been identified.

Keywords: low-frequency noise, random telegraph noise, dynamic variation, SRRV

Procedia PDF Downloads 176

Authors: Clara Oliver, Oibar Martinez, Jose Miguel Miranda

Abstract:

Ensuring a safe environment for sensitive electronics boards in places with high limitations in size poses two major difficulties: the control of charge accumulation in floating floors and the prevention of excess charge generation due to air cooling flows. In this paper, we discuss these mechanisms and possible solutions to prevent them. An experiment was made in the control room of a Cherenkov Telescope, where six racks of 2x1x1 m size and independent cooling units are located. The room is 10x4x2.5 m, and the electronics include high-speed digitizers, trigger circuits, etc. The floor used in this room was antistatic, but it was a raised floor mounted in floating design to facilitate the handling of the cables and maintenance. The tests were made by measuring the contact voltage acquired by a person who was walking along the room with different footwear qualities. In addition, we took some measurements of the voltage accumulated in a person in other situations like running or sitting up and down on an office chair. The voltages were taken in real time with an electrostatic voltage meter and dedicated control software. It is shown that peak voltages as high as 5 kV were measured with ambient humidity of more than 30%, which are within the range of a class 3A according to the HBM standard. In order to complete the results, we have made the same experiment in different spaces with alternative types of the floor like synthetic floor and earthenware floor obtaining peak voltages much lower than the ones measured with the floating synthetic floor. The grounding quality one achieves with this kind of floors can hardly beat the one typically encountered in standard floors glued directly on a solid substrate. On the other hand, the air ventilation used to prevent the overheating of the boards probably contributed in a significant way to the charge accumulated in the room. During the assessment of the quality of the static charge control, it is necessary to guarantee that the tests are made under repeatable conditions. One of the major difficulties which one encounters during these assessments is the fact the electrostatic voltmeters might provide different values depending on the humidity conditions and ground resistance quality. In addition, the use of certified antistatic footwear might mask deficiencies in the charge control. In this paper, we show how we defined protocols to guarantee that electrostatic readings are reliable. We believe that this can be helpful not only to qualify the static charge control in a laboratory but also to asses any procedure oriented to minimize the risk of electrostatic discharge events.

Keywords: electrostatics, ESD protocols, HBM, static charge control

Procedia PDF Downloads 129