Search results for: Ian D. Gates

Authors: B. Manikandan, A. Vijayaprabhu

Abstract:

The conservative reversible gates are used to designed reversible sequential circuits. The sequential circuits are flip-flops and latches. The conservative logic gates are Feynman, Toffoli, and Fredkin. The design of two vectors testable sequential circuits based on conservative logic gates. All sequential circuit based on conservative logic gates can be tested for classical unidirectional stuck-at faults using only two test vectors. The two test vectors are all 1s, and all 0s. The designs of two vectors testable latches, master-slave flip-flops and double edge triggered (DET) flip-flops are presented. We also showed the application of the proposed approach toward 100% fault coverage for single missing/additional cell defect in the quantum- dot cellular automata (QCA) layout of the Fredkin gate. The conservative logic gates are in terms of complexity, speed, and area.

Keywords: DET, QCA, reversible logic gates, POS, SOP, latches, flip flops

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Authors: Mohammed A. Zidan, Alaa Sagheer, Nasser Metwally

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Real-time learning is an important goal that most of artificial intelligence researches try to achieve it. There are a lot of problems and applications which require low cost learning such as learn a robot to be able to classify and recognize patterns in real time and real-time recall. In this contribution, we suggest a model of quantum competitive learning based on a series of quantum gates and additional operator. The proposed model enables to recognize any incomplete patterns, where we can increase the probability of recognizing the pattern at the expense of the undesired ones. Moreover, these undesired ones could be utilized as new patterns for the system. The proposed model is much better compared with classical approaches and more powerful than the current quantum competitive learning approaches.

Keywords: competitive learning, quantum gates, quantum gates, winner-take-all

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Authors: A. S. Cheliyan, S. K. Bhattacharyya

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Dynamic Positioning System (DPS) is employed in marine vessels of the offshore oil and gas industry. It is a computer controlled system to automatically maintain a ship’s position and heading by using its own thrusters. Reliability assessment of the same can be analyzed through conventional fault tree. However, the complex behaviour like sequence failure, redundancy management and priority of failing of events cannot be analyzed by the conventional fault trees. The Dynamic Fault Tree (DFT) addresses these shortcomings of conventional Fault Tree by defining additional gates called dynamic gates. Monte Carlo based simulation approach has been adopted for the dynamic gates. This method of realistic modeling of DPS gives meaningful insight into the system reliability and the ability to improve the same.

Keywords: dynamic positioning system, dynamic fault tree, Monte Carlo simulation, reliability assessment

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Authors: Mojtaba Valinataj

Abstract:

Reversible logic as a new favorable design domain can be used for various fields especially creating quantum computers because of its speed and intangible power consumption. However, its susceptibility to a variety of environmental effects may lead to yield the incorrect results. In this paper, because of the importance of multiplication operation in various computing systems, some novel reversible logic array multipliers are proposed with error detection capability by incorporating the parity-preserving gates. The new designs are presented for two main parts of array multipliers, partial product generation and multi-operand addition, by exploiting the new arrangements of existing gates, which results in two signed parity-preserving array multipliers. The experimental results reveal that the best proposed 4×4 multiplier in this paper reaches 12%, 24%, and 26% enhancements in the number of constant inputs, number of required gates, and quantum cost, respectively, compared to previous design. Moreover, the best proposed design is generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: array multipliers, Baugh-Wooley method, error detection, parity-preserving gates, quantum computers, reversible logic

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Authors: P. Monginaud, J. C. Baudey

Abstract:

The synchronous, low-voltage command for JFET Rectifiers has many applications: indeed, replacing the traditional diodes by these components allows enhanced performances in gain, linearity and phase shift. We introduce here a new bridge, including JFET associated with pull-down, bipolar command systems, and double-purpose logic gates.

Keywords: synchronous, rectifier, MOSFET, JFET, bipolar command system, push-pull circuits, double-purpose logic gates

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Authors: Mojtaba Valinataj

Abstract:

Nowadays reversible logic has received many attentions as one of the new fields for reducing the power consumption. On the other hand, the processing systems have weaknesses against different external effects. In this paper, some error detecting reversible logic serial multipliers are proposed by incorporating the parity-preserving gates. This way, the new designs are presented for signed parity-preserving serial multipliers based on the Booth's algorithm by exploiting the new arrangements of existing gates. The experimental results show that the proposed 4×4 multipliers in this paper reach up to 20%, 35%, and 41% enhancements in the number of constant inputs, quantum cost, and gate count, respectively, as the reversible logic criteria, compared to previous designs. Furthermore, all the proposed designs have been generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: Booth’s algorithm, error detection, multiplication, parity-preserving gates, quantum computers, reversible logic

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Authors: Mahendrapal Singh Pachlaniya, Laxmi Kumre

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The AOI (AND – OR- INVERTER) based design of XOR gate is proposed in this paper with less number of gates. This new XOR gate required four basic gates and basic gate include only AND, OR, Inverter (AOI). Conventional XOR gate required five basic gates. Ripple Carry Adder (RCA) used in parallel addition but propagation delay time is large. RCA replaced with Carry Select Adder (CSLA) to reduce propagation delay time. CSLA design with dual RCA considering carry = ‘0’ and carry = ‘1’, so it is not an area efficient adder. To make area efficient, modified CSLA is designed with single RCA considering carry = ‘0’ and another RCA considering carry = ‘1’ replaced with Binary to Excess 1 Converter (BEC). Now replacement of conventional XOR gate by new design of XOR gate in modified CSLA reduces much area compared to regular CSLA and modified CSLA.

Keywords: CSLA, BEC, XOR gate, area efficient

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Authors: Nizar Caraka Trihanasia, Suparwoko

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The purpose of this paper is to analyze the design model of city gates on arterial roads as Yogyakarta’s “Istimewa” (special) identity. City marketing has become a trend among cities in the past few years. It began to compete with each other in promoting their identity to the world. One of the easiest ways to recognize the identity is by knowing the image of the city which can be seen through architectural buildings or urban elements. The idea is to recognize how the image of the city can represent Yogyakarta’s identity, which is limited to the contribution of the city gates distinctiveness on Yogyakarta urban area. This study has concentrated on the aspect of city gates as built environment that provides a diversity, configuration and scale of development that promotes a sense of place and community. The visual analysis will be conducted to interpreted the existing Yogyakarta city gates (as built environment) focussing on some variables of 1) character and pattern, 2) circulation system establishment, and 3) open space utilisation. Literature review and site survey are also conducted to understand the relationship between the built environment and the sense of place in the community. This study suggests that visually the Yogyakarta city gate model has strong visual characters and pattern by using the concept of a sense of place of Yogyakarta community value.

Keywords: visual analysis, model, Yogyakarta “Istimewa”, citygates

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Authors: Spyridon Nikolaidis

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A modeling approach for CMOS gates is presented based on the use of the equivalent inverter. A new model for the inverter has been developed using a simplified transistor current model which incorporates the nanoscale effects for the planar technology. Parametric expressions for the output voltage are provided as well as the values of the output and supply current to be compatible with the CCS technology. The model is parametric according the input signal slew, output load, transistor widths, supply voltage, temperature and process. The transistor widths of the equivalent inverter are determined by HSPICE simulations and parametric expressions are developed for that using a fitting procedure. Results for the NAND gate shows that the proposed approach offers sufficient accuracy with an average error in propagation delay about 5%.

Keywords: CMOS gate modeling, inverter modeling, transistor current mode, timing model

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Authors: Poonam A. Trambadia, Ashish V. Trambadia

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The architecture of sultanate period of Ahmedabad had evolved just before the establishment of Mughal rule in North India. After shifting the capital of the kingdom from Patan to Ahmedabad, when the buildings and structures were being built, an interesting cultural blend happened in architecture. Many sultanate buildings in Ahmedabad historic city have resemblance with Patan including the names. Outer fortification walls and Gates were built during the rule of the third ruler in the late 15th century. All the gates had sandstone slabs supported by three arched entrance in sandstone with wooden shutter. A restoration project of Khanpur Gate was initiated in 2016. The paper identifies some evidences and some hidden layers of structures as important elements of cultural interchange while some were just forgotten in the process. The recycling of pre-existing elements of structures are examined and compared. There were layers uncovered that were hidden behind later repairs using traditional brick arch, which was taken out in the process. As the gate had partially collapsed, the restoration included piece by piece dismantling and restoring in the same sequence wherever required. The recycled materials found in the process were recorded and provided the basis for this study. The gate after this discovery sets a new example of fortification Gate built in Sultanate era. The comparison excludes Maratha and British Period Gates to avoid further confusion and focuses on 15th – 16th century sultanate architecture of Ahmedabad.

Keywords: Ahmedabad World Heritage, fortification, Indo-Islamic style, Sultanate architecture, cultural interchange

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Authors: Ali Heidari, Hany Saleem

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The tailwater requirements are important criteria in the design of the stilling basins as energy dissipation of the spillways. The adequate tailwater level that ensures the hydraulic jump inside the basin should be fulfilled by the river's natural water level and the apron depth downstream of the chute. The requirements of the hydraulic jump should mainly be checked for the design flood, however, the drawn jump condition should not be critical in the discharges lesser than the design flood. The tailwater requirement is not met in Almatti dam, built in 2005 in India, and the jump sweep out from the basin, resulting in significant scour in the apron and end sill of the basin. This paper discusses different hydraulic solutions as sustainable solutions for the rehabilitation program. The deep apron alternative is proposed for the fewer bays of the spillway as the most cost-effective, sustainable solution. The apron level of 15 gates out of 26 gates should decrease by 5.4 m compared to the existing design to ensure a safe hydraulic jump up to the discharge of 10,000 m3/s i.e. 30% of the updated PMF.

Keywords: dam, spillway, stilling basin, Almatti

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Authors: Man Li, Wanting Zhou, Lei Li

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Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of the combinational logic circuit. The existing research on soft error rates (SER) of the combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rate evaluation method based on LET. In this paper, the authors analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on the LET. Based on this model, the error rate of test circuit ISCAS'85 is calculated. The effectiveness of the model is proved by comparing it with previous experiments.

Keywords: communication satellite, pulse width, soft error rates, LET

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Authors: Maricarmen Herrera, Pierre Chymkowitch, Joe Robertson, Jens Eriksson, Jorrit Enserink

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tRNA genes are transcribed by RNA polymerase III. During recent years, it has become clear that tDNA transcription fluctuates during the cell cycle. However, the mechanism by which the cell cycle controls the amplitude of tDNA transcription remains unknown. We found that the cyclin Clb5 recruits the cyclin dependent kinase Cdk1 to tRNA genes to sharply increase tRNA synthesis during a brief interval in the cell cycle. We show that Cdk1 promotes the interaction of TFIIIB with TFIIIC, that it stimulates the recruitment of TFIIIC to tRNA genes, that it prevents the formation of an overly stable TFIIIB-tDNA complex and that it augments the dynamics of RNA polymerase III. Furthermore, we identify Bdp1 as a novel Cdk1 substrate, and phosphorylation of Bdp1 is required for the cell cycle-dependent increase in tDNA transcription. In addition, we show that phosphorylation of the Cdk1 substrate Nup60 mediates formation of a Nup60-Nup2 complex at tRNA genes, which is also required for cell cycle-dependent tDNA transcription. Together, our findings indicate that Cdk1 activity gates tRNA synthesis by regulating the dynamics of the TFIIIB-TFIIIC-RNAPIII complex, and that it may promote the formation of a nuclear pore microenvironment conducive to efficient tDNA transcription.

Keywords: Cdk1, cell cycle, RNAPIII machinery, tRNA

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Authors: Hamid Yasinian

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Random epistemologies and hash tables have garnered minimal interest from both security experts and experts in the last several years. In fact, few information theorists would disagree with the evaluation of expert systems. In our research, we discover how flip-flop gates can be applied to the study of superpages. Though such a hypothesis at first glance seems perverse, it is derived from known results.

Keywords: synthesis, multi-processors, interactive model, moor’s law

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Authors: Seyedmirsajad Mokhtarimousavi, Danial Talebi, Hamidreza Asgari

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Assigning aircrafts’ activities to appropriate gates is one the most challenging issues in airport authorities’ multiple criteria decision making. The potential financial loss due to imbalances of demand and supply in congested airports, higher occupation rates of gates, and the existing restrictions to expand facilities provide further evidence for the need for an optimal supply allocation. Passengers walking distance, towing movements, extra fuel consumption (as a result of awaiting longer to taxi when taxi conflicts happen at the apron area), etc. are the major traditional components involved in GAP models. In particular, the total cost associated with gate assignment problem highly depends on the airport terminal layout. The study herein presents a well-elaborated literature review on the topic focusing on major concerns, applicable variables and objectives, as well as proposing a three-objective mathematical model for the gate assignment problem. The model has been tested under different concourse layouts in order to check its performance in different scenarios. Results revealed that terminal layout pattern is a significant parameter in airport and that the proposed model is capable of dealing with key constraints and objectives, which supports its practical usability for future decision making tools. Potential solution techniques were also suggested in this study for future works.

Keywords: airport management, terminal layout, gate assignment problem, mathematical modeling

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Authors: M. Abbasi

Abstract:

A spillway structure is used to pass excess water and floods from upstream or upstream to downstream or tributary. The spillway is considered one of the most key members of the dam, and the failure of many dams is attributed to the inefficiency of their spillway. Weirs should be selected as strong, reliable and high-performance structures, and weirs should be ready for use in all conditions and able to drain the flood so that we do not witness many casualties and financial losses when a flood occurs. The purpose of this study is to simulate the flow pattern passing over the peak spillway in order to optimize and adjust the height of the spillway walls. In this research, the effect of the shape of the side wings on the flow pattern over the peak spillways of the Gotvand reservoir dam was simulated and modelled using Flow3D software. In this research, side wings with rounded walls with six different approach angles were used. In addition, the different value of H/Hd was used to check the effect of the tank head. The results showed that with the constant H/Hd ratio and the increase of the approach angle of the side wing, the flow depth first decreases and then increases. These changes were the opposite regarding the depth average speed of the flow and the depth average concentration of the air entering the flow. At the same time, with the constant angle of approach of the side wing and with the increase of H/Hd ratio, the flow depth increases. In general, a correct understanding of the operation of overflows and a correct design can significantly reduce construction costs and solve flooding problems.

Keywords: effect of the shape, gotvand reservoir dam, narrowing coefficients, supports of the gates

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Authors: David M. Lucas, Charles W. Jarrett

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In the culture of Thailand, the Yak serve as a mediated icon representing strength, power, and mystical protection not only for the Buddha, but for population of worshipers. Originating from the forests of China, the Yak continue to stand guard at the gates of Buddhist temples. The Yak represents Thai culture in the hearts of Thai people. This paper presents a qualitative study regarding the curious mix of media, culture, and religion that projects the Yak of Thailand as a larger than life message throughout the political, cultural, and religious spheres. The gate guardians, or gods as they are sometimes called, appear throughout the religious temples of Asian cultures. However, the Asian cultures demonstrate differences in artistic renditions (or presentations) of such sentinels. Thailand gate guards (the Yak) stand in front of many Buddhist temples, and these iconic figures display unique features with varied symbolic significance. The temple (or wat), plays a vital role in every community; and, for many people, Thailand’s temples are the country’s most endearing sights. The authors applied folk-nography as a methodology to illustrate the importance of the Thai Yak in serving as meaningful icons that transcend not only time, but the culture, religion, and mass media. The Yak represent mythical, religious, artistic, cultural, and militaristic significance for the Thai people. Data collection included interviews, focus groups, and natural observations. This paper summarizes the perceptions of the Thai people concerning their gate sentries and the relationship, communication, connection, and the enduring respect that Thai people hold for their guardians of the gates.

Keywords: communication, culture, folknography, icon, image, media, protection, religion, yak

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Authors: Alfonso Ippolito, Cristiana Bartolomei

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A growing demand is felt today for realistic 3D models enabling the cognition and popularization of historical-artistic heritage. Evaluation and preservation of Cultural Heritage is inextricably connected with the innovative processes of gaining, managing, and using knowledge. The development and perfecting of techniques for acquiring and elaborating photorealistic 3D models, made them pivotal elements for popularizing information of objects on the scale of architectonic structures.

Keywords: cultural heritage, databases, non-contact survey, 2D-3D models

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Authors: Bsma Adel Bany Mohammad

Abstract:

The University campuses are a small city containing basic city functions such as educational spaces, accommodations, services and transportation. They are spaces of functional and social life with different activities, different occupants. The campus designed and transformed like cities so both experienced and memorized in same way. Campus memory is the ability of individuals to maintain and reveal the spatial components of designed physical spaces, which form the understandings, experiences, sensations of the environment in all. ‘Cognitive mapping’ is used to decode the physical interaction and emotional relationship between individuals and the city; Cognitive maps are created graphically using geometric and verbal elements on paper by remembering the images of the Urban Environment. In this study, to determine the emotional urban identity belonging to Jordan University of science and technology Campus, architecture students Asked to identify the areas they interact with in the campus by drawing a cognitive map. ‘Campus memory items’ are identified by analyzing the cognitive maps of the campus, then the spatial identity result of such data. The analysis based on the five basic elements of Lynch: paths, districts, edges, nodes, and landmarks. As a result of this analysis, it found that Spatial Identity constructed by the shared elements of the maps. The memory of most students listed the gates structure- which is a large desirable structure, located at the main entrances within the campus defined as major landmarks, then the square spaces defined as nodes, in addition to both stairs and corridors defined as paths. Finally, the districts, edges of educational buildings and service spaces are listed correspondingly in cognitive maps. Findings suggest that the spatial identity of the campus design is related mainly to the gates structures, squares and stairs.

Keywords: cognitive maps, university campus, urban memory, identity

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Authors: Yun Zuo, Wenju Li

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Shenzhen is one of China’s gates to the world. What was once a fishing village is now a metropolis of more than 10 million people. Because of its unprecedented pace of development, it also brings a serious of issues, such as the self-renewal of the city. In the paper, we use Sungang-Quingshuihe(SQ) as an example. SQ is one of the oldest districts in the east of Shenzhen. Nowadays, SQ faces many challenges. This is because once the logistics area has been slowly disappear, the new identity will be replaced. As a result, we are to minimize damages to the city in transforming process by seeking for a new design strategy. In the meantime, we think that each district in a city has its own role forming the whole city together. Therefore, a district transformation is functionally-oriented and for improving city quality in focus.

Keywords: old district, renewal strategy, public space, sustainable development

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Authors: Christina Eleftheria Tzeliou, Demeter Tzeli

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Introduction: Molecular Logic Gates (MLGs) are molecular machines that can perform complex work, such as solving logic operations. Molecular switches, which are molecules that can experience chemical changes are examples of successful types of MLGs. Recently, Quintana-Romero and Ariza-Castolo studied experimentally six stable pseudo-hemi-indigo-derived MLGs capable of solving complex logic operations. The MLG design relies on a molecular switch that experiences Z and E isomerism, thus the molecular switch's axis has to be a double bond. The hemi-indigo structure was preferred for the assembly of molecular switches due to its interaction with visible light. Z and E pseudo-hemi-indigo isomers can also be utilized for selective isomerization as they have distinct absorption spectra. Methodology: Here, the photophysical properties of pseudo-hemi-indigo derivatives are examined, i.e., derivatives of molecule 1 with anthracene, naphthalene, phenanthrene, pyrene, and pyrrole. In conjunction with some trials that were conducted, the level of theory mentioned subsequently was determined. The structures under study were optimized in both cis and trans conformations at the PBE0/6-31G(d,p) level of theory. The absorption spectra of the structures were calculated at PBE0/DEF2TZVP. In all cases, the absorption spectra of the studied systems were calculated including up to 50 singlet- and triplet-spin excited electronic states. Transition states (cis → cis, cis → trans, and trans → trans) were obtained in cases where it was possible, with PBE0/6-31G(d,p) for the optimization of the transition states and PBE0/DEF2TZVP for the respective absorption spectra. Emission spectra were obtained for the first singlet state of each molecule in cis both and trans conformations in PBE0/DEF2TZVP as well. All studies were performed in chloroform solvent that was added as a dielectric constant and the polarizable continuum model was also employed. Findings: Shifts of up to 25 nm are observed in the absorption spectra due to cis-trans isomerization, while the transition state is shifted up to about 150 nm. The electron density distribution is also examined, where charge transfer and electron transfer phenomena are observed regarding the three excitations of interest, i.e., H-1 → L, H → L and H → L+1. Emission spectra calculations were also carried out at PBE0/DEF2TZVP for the complete investigation of these molecules. Using protonation as input, selected molecules act as MLGs. Conclusion: Theoretical data so far indicate that both cis-trans isomerization, and cis-cis and trans-trans conformer isomerization affect the UV-visible absorption and emission spectra. Specifically, shifts of up to 30 nm are observed, while the transition state is shifted up to about 150 nm in cis-cis isomerization. The computational data obtained are in agreement with available experimental data, which have predicted that the pyrrole derivative is a MLG at 445 nm and 400 nm using protonation as input, while the anthracene derivative is a MLG that operates at 445 nm using protonation as input. Finally, it was found that selected molecules are candidates as MLG using protonation and light as inputs. These MLGs could be used as chemical sensors or as particular intracellular indicators, among several other applications. Acknowledgements: The author acknowledges the Hellenic Foundation for Research and Innovation for the financial support of this project (Fellowship Number: 21006).

Keywords: absorption spectra, DFT calculations, isomerization, molecular logic gates

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Authors: Enji E. Alzamzami, Kholod A. Almwallad, Rahaf J. Alwafi, Roaa H. Alansari, Shatha S. Alshehri, Aeshah A. Alsiyami

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This paper demonstrates a system that helps solve the congestion problem at the entrance gates and limits the spread of viruses among people in crowded environments, such as COVID-19, using the IoT (Internet of Things). This system may assist in organizing the campus entry process efficiently by developing a smart card application supported by NFC (Near Field Communication) technology through which users' information could be sent to a reader to share it with the server and allow the server to perform its tasks and send a confirmation response for the request either by acceptance or rejection.

Keywords: COVID-19, IoT, NFC technology, smart card

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Authors: Jong-Bae Lee, Seongsoo Lee

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Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.

Keywords: local interconnect network, controller, transceiver, processor

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Authors: Sohaib Khaliq

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This paper pursues a systematic analysis of the broad range of theories and studies relevant to Islam and democracy, in general and as they have been developed from and applied to the Indonesian and Pakistani cases. The analysis finds that an Islamic society’s potential to assimilate democratic political institutions is contingent on either an unconstrained 'political participation' or its ability to 'reinterpret' religious text. Drawing on a comparison of Indonesia and Pakistan, the present study favors a route that passes through the religious gates of theoretical reinterpretation. In doing so, the study brings Muslim reformation theory into focus by clarifying the mechanism by which reformation takes place.

Keywords: Islam, democratization, political Islam, reformation

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Authors: Roumaissa Derdour, Lebbal Mohamed Redha

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We present a study of the transmission of the all-optical logic gate using a structure connected with a triangular photonic crystal lattice that is improved. The proposed logic gate consists of a photonic crystal nano-resonator formed by changing the size of the air holes. In addition to the simplicity, the response time is very short, and the designed nano-resonator increases the bit rate of the logic gate. The two-dimensional finite difference time domain (2DFDTD) method is used to simulate the structure; the transmission obtained is about 98% with very negligible losses. The proposed photonic crystal AND logic gate is widely used in future integrated optical microelectronics.

Keywords: logic gates, photonic crystals, optical integrated circuits, resonant cavities

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Authors: S. Arun Prakash, V. Malathi, M. S. Mani Rajan

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The analytical bright two soliton solution of the 3-coupled nonlinear Schrödinger equations with variable coefficients in birefringent optical fiber is obtained by Darboux transformation method. To the design of ultra-speed optical devices, Soliton interaction and control in birefringence fiber is investigated. Lax pair is constructed for N coupled NLS system through AKNS method. Using two soliton solution, we demonstrate different interaction behaviors of solitons in birefringent fiber depending on the choice of control parameters. Our results shows that interactions of optical solitons have some specific applications such as construction of logic gates, optical computing, soliton switching, and soliton amplification in wavelength division multiplexing (WDM) system.

Keywords: optical soliton, soliton interaction, soliton switching, WDM

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Authors: Bruna G. M. Araújo, Pedro M. M. Q. Cruz

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In this letter, we review the literature of the major concepts that govern Gaussian quantum information. As we work with quantum information and computation with continuous variables, Gaussian states are needed to better describe these systems. Analyzing a single ion locked in a Paul trap we use the interaction picture to obtain a toolbox of Gaussian operations with the ion-laser interaction Hamiltionian. This is achieved exciting the ion through the combination of two lasers of distinct frequencies corresponding to different sidebands of the external degrees of freedom. First we study the case of a trap with 1 mode and then the case with 2 modes. In this way, we achieve different continuous variables gates just by changing the external degrees of freedom of the trap and combining the Hamiltonians of blue and red sidebands.

Keywords: Paul trap, ion-laser interaction, Gaussian operations

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Authors: Yiqiang Ni, Xuanlong Chen, Enliang Li, Linting Zheng, Shizheng Yang

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Bipolar ICs are playing an important role in military applications, mainly used in logic gates, such as inverter and NAND gate. The defect of metal break located on the step is one of the main failure mechanisms of bipolar ICs, resulting in open-circuit or functional failure. In this situation, general failure localization methods like optical beam-induced resistance change (OBIRCH) and photon emission microscopy (PEM) might not be fully effective. However, active voltage contrast (AVC) can be used as a voltage probe, which may pinpoint the incorrect potential and thus locate the failure position. Two case studies will be present in this paper on how to implement AVC for failure localization, and the detailed failure mechanism will be discussed.

Keywords: bipolar IC, failure localization, metal break, open failure, voltage contrast

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Authors: Genevieve Pugh, Johnathan Burns, Stefan Howorka

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Single-molecule sensing via protein nanopores has achieved a step-change in portable and label-free DNA sequencing. However, protein pores of both natural or engineered origin are not able to produce the tunable diameters needed for effective protein sensing. Here, we describe a generic strategy to build synthetic DNA nanopores that are wide enough to accommodate folded protein. The pores are composed of interlinked DNA duplexes and carry lipid anchors to achieve the required membrane insertion. Our demonstrator pore has a contiguous cross-sectional channel area of 50 nm2 which is 6-times larger than the largest protein pore. Consequently, transport of folded protein across bilayers is possible. The modular design is amenable for different pore dimensions and can be adapted for protein sensing or to create molecular gates in synthetic biology.

Keywords: biosensing, DNA nanotechnology, DNA origami, nanopore sensing

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Authors: Biswarup Mukherjee, Aniruddha Ghoshal

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In this paper, we propose a new technique for implementing a low power high speed full adder using 8 transistors. Full adder circuits are used comprehensively in Application Specific Integrated Circuits (ASICs). Thus it is desirable to have high speed operation for the sub components. The explored method of implementation achieves a high speed low power design for the full adder. Simulated results indicate the superior performance of the proposed technique over conventional 28 transistor CMOS full adder. Detailed comparison of simulated results for the conventional and present method of implementation is presented.

Keywords: high speed low power full adder, 2-T MUX, 3-T XOR, 8-T FA, pass transistor logic, CMOS (complementary metal oxide semiconductor)

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