Search results for: reversible logic gates

Authors: B. Manikandan, A. Vijayaprabhu

Abstract:

The conservative reversible gates are used to designed reversible sequential circuits. The sequential circuits are flip-flops and latches. The conservative logic gates are Feynman, Toffoli, and Fredkin. The design of two vectors testable sequential circuits based on conservative logic gates. All sequential circuit based on conservative logic gates can be tested for classical unidirectional stuck-at faults using only two test vectors. The two test vectors are all 1s, and all 0s. The designs of two vectors testable latches, master-slave flip-flops and double edge triggered (DET) flip-flops are presented. We also showed the application of the proposed approach toward 100% fault coverage for single missing/additional cell defect in the quantum- dot cellular automata (QCA) layout of the Fredkin gate. The conservative logic gates are in terms of complexity, speed, and area.

Keywords: DET, QCA, reversible logic gates, POS, SOP, latches, flip flops

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Authors: Mojtaba Valinataj

Abstract:

Nowadays reversible logic has received many attentions as one of the new fields for reducing the power consumption. On the other hand, the processing systems have weaknesses against different external effects. In this paper, some error detecting reversible logic serial multipliers are proposed by incorporating the parity-preserving gates. This way, the new designs are presented for signed parity-preserving serial multipliers based on the Booth's algorithm by exploiting the new arrangements of existing gates. The experimental results show that the proposed 4×4 multipliers in this paper reach up to 20%, 35%, and 41% enhancements in the number of constant inputs, quantum cost, and gate count, respectively, as the reversible logic criteria, compared to previous designs. Furthermore, all the proposed designs have been generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: Booth’s algorithm, error detection, multiplication, parity-preserving gates, quantum computers, reversible logic

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Authors: Mojtaba Valinataj

Abstract:

Reversible logic as a new favorable design domain can be used for various fields especially creating quantum computers because of its speed and intangible power consumption. However, its susceptibility to a variety of environmental effects may lead to yield the incorrect results. In this paper, because of the importance of multiplication operation in various computing systems, some novel reversible logic array multipliers are proposed with error detection capability by incorporating the parity-preserving gates. The new designs are presented for two main parts of array multipliers, partial product generation and multi-operand addition, by exploiting the new arrangements of existing gates, which results in two signed parity-preserving array multipliers. The experimental results reveal that the best proposed 4×4 multiplier in this paper reaches 12%, 24%, and 26% enhancements in the number of constant inputs, number of required gates, and quantum cost, respectively, compared to previous design. Moreover, the best proposed design is generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: array multipliers, Baugh-Wooley method, error detection, parity-preserving gates, quantum computers, reversible logic

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Authors: Vishal Pareek, Shubham Gupta, Sushil Chandra Jain

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With increasing high-speed computation demand the power consumption, heat dissipation and chip size issues are posing challenges for logic design with conventional technologies. Recovery of bit loss and bit errors is other issues that require reversibility and fault tolerance in the computation. The reversible computing is emerging as an alternative to conventional technologies to overcome the above problems and helpful in a diverse area such as low-power design, nanotechnology, quantum computing. Bit loss issue can be solved through unique input-output mapping which require reversibility and bit error issue require the capability of fault tolerance in design. In order to incorporate reversibility a number of combinational reversible logic based circuits have been developed. However, very few sequential reversible circuits have been reported in the literature. To make the circuit fault tolerant, a number of fault model and test approaches have been proposed for reversible logic. In this paper, we have attempted to incorporate fault tolerance in sequential reversible building blocks such as D flip-flop, T flip-flop, JK flip-flop, R-S flip-flop, Master-Slave D flip-flop, and double edge triggered D flip-flop by making them parity preserving. The importance of this proposed work lies in the fact that it provides the design of reversible sequential circuits completely testable for any stuck-at fault and single bit fault. In our opinion our design of reversible building blocks is superior to existing designs in term of quantum cost, hardware complexity, constant input, garbage output, number of gates and design of online testable D flip-flop have been proposed for the first time. We hope our work can be extended for building complex reversible sequential circuits.

Keywords: parity preserving gate, quantum computing, fault tolerance, flip-flop, sequential reversible logic

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Authors: P. Monginaud, J. C. Baudey

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The synchronous, low-voltage command for JFET Rectifiers has many applications: indeed, replacing the traditional diodes by these components allows enhanced performances in gain, linearity and phase shift. We introduce here a new bridge, including JFET associated with pull-down, bipolar command systems, and double-purpose logic gates.

Keywords: synchronous, rectifier, MOSFET, JFET, bipolar command system, push-pull circuits, double-purpose logic gates

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Authors: Man Li, Wanting Zhou, Lei Li

Abstract:

Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of the combinational logic circuit. The existing research on soft error rates (SER) of the combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rate evaluation method based on LET. In this paper, the authors analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on the LET. Based on this model, the error rate of test circuit ISCAS'85 is calculated. The effectiveness of the model is proved by comparing it with previous experiments.

Keywords: communication satellite, pulse width, soft error rates, LET

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Authors: Roumaissa Derdour, Lebbal Mohamed Redha

Abstract:

We present a study of the transmission of the all-optical logic gate using a structure connected with a triangular photonic crystal lattice that is improved. The proposed logic gate consists of a photonic crystal nano-resonator formed by changing the size of the air holes. In addition to the simplicity, the response time is very short, and the designed nano-resonator increases the bit rate of the logic gate. The two-dimensional finite difference time domain (2DFDTD) method is used to simulate the structure; the transmission obtained is about 98% with very negligible losses. The proposed photonic crystal AND logic gate is widely used in future integrated optical microelectronics.

Keywords: logic gates, photonic crystals, optical integrated circuits, resonant cavities

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Authors: S. Padmapriya, V. Lakshmi Prabha

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In this paper, an efficient reconfigurable fixed-point Least Mean Square Adaptive FIR filter is proposed. The proposed architecture has two methods of operation: one is area efficient design and the other is optimized power. Pipelining of the adder blocks and partial product generator are used to achieve low area and reversible logic is used to obtain low power design. Depending upon the input samples and filter coefficients, one of the techniques is chosen. Least-Mean-Square adaptation is performed to update the weights. The architecture is coded using Verilog and synthesized in cadence encounter 0.18μm technology. The synthesized results show that the area reduction ratio of the proposed when compared with conventional technique is about 1.2%.

Keywords: adaptive filter, carry select adder, least mean square algorithm, reversible logic

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Authors: Morteza Khorrami

Abstract:

The logic as an intellectual infrastructure plays an essential role in the Islamic sciences. Hence, there are a few of the verses of the Holy Quran that their interpretation is not possible due to lack of proper logic. In many verses in the Quran, argument and the respondent has requested from the audience that shows the logic rule is in the Quran. The paper which use a descriptive and analytic method, tries to show the role of logic in understanding of the Quran reasoning methods and display some of Quranic statements with mathematical symbols and point that we can help these symbols for interesting and interpretation and answering to some questions and doubts. In this paper, this problem has been mentioned that the Quran did not use two-valued logic (Aristotelian) in all cases, but the fuzzy logic can also be searched in the Quran.

Keywords: aristotelian logic, fuzzy logic, interpretation, Holy Quran

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Authors: Hae-Yeoun Lee

Abstract:

Reversible watermarking that not only protects the copyright but also preserve the original quality of the digital content have been intensively studied. In particular, the demand for reversible watermarking has increased. In this paper, we propose a reversible watermarking scheme based on interpolation-error shifting and error precompensation. The intensity of a pixel is interpolated from the intensities of neighbouring pixels, and the difference histogram between the interpolated and the original intensities is obtained and modified to embed the watermark message. By restoring the difference histogram, the embedded watermark is extracted and the original image is recovered by compensating for the interpolation error. The overflow and underflow are prevented by error precompensation. To show the performance of the method, the proposed algorithm is compared with other methods using various test images.

Keywords: reversible watermarking, high capacity, high quality, interpolated error shifting, error precompensation

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Authors: Suparman

Abstract:

This paper addresses the problem of the signal segmentation within a Bayesian framework by using reversible jump MCMC algorithm. The signal is modelled by piecewise constant Moving-Average (MA) model where the numbers of segments, the position of change-point, the order and the coefficient of the MA model for each segment are unknown. The reversible jump MCMC algorithm is then used to generate samples distributed according to the joint posterior distribution of the unknown parameters. These samples allow calculating some interesting features of the posterior distribution. The performance of the methodology is illustrated via several simulation results.

Keywords: piecewise, moving-average model, reversible jump MCMC, signal segmentation

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Authors: Hamdi Belgacem, Fradi Aymen

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In this paper we present a low power, low cost differential logic unit (LU). The proposed LU receives dual-rail inputs and generates dual-rail outputs. The proposed circuit can be used in Arithmetic and Logic Units (ALU) of processor. It can be also dedicated for self-checking applications based on dual duplication code. Four logic functions as well as their inverses are implemented within a single Logic Unit. The hardware overhead for the implementation of the proposed LU is lower than the hardware overhead required for standard LU implemented with standard CMOS logic style. This new implementation is attractive as fewer transistors are required to implement important logic functions. The proposed differential logic unit can perform 8 Boolean logical operations by using only 16 transistors. Spice simulations using a 32 nm technology was utilized to evaluate the performance of the proposed circuit and to prove its acceptable electrical behaviour.

Keywords: differential logic unit, double pass transistor logic, low power CMOS design, low cost CMOS design

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Authors: Mohammed A. Zidan, Alaa Sagheer, Nasser Metwally

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Real-time learning is an important goal that most of artificial intelligence researches try to achieve it. There are a lot of problems and applications which require low cost learning such as learn a robot to be able to classify and recognize patterns in real time and real-time recall. In this contribution, we suggest a model of quantum competitive learning based on a series of quantum gates and additional operator. The proposed model enables to recognize any incomplete patterns, where we can increase the probability of recognizing the pattern at the expense of the undesired ones. Moreover, these undesired ones could be utilized as new patterns for the system. The proposed model is much better compared with classical approaches and more powerful than the current quantum competitive learning approaches.

Keywords: competitive learning, quantum gates, quantum gates, winner-take-all

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Authors: Suparman

Abstract:

Piecewise linear regression models are very flexible models for modeling the data. If the piecewise linear regression models are matched against the data, then the parameters are generally not known. This paper studies the problem of parameter estimation of piecewise linear regression models. The method used to estimate the parameters of picewise linear regression models is Bayesian method. But the Bayes estimator can not be found analytically. To overcome these problems, the reversible jump MCMC algorithm is proposed. Reversible jump MCMC algorithm generates the Markov chain converges to the limit distribution of the posterior distribution of the parameters of picewise linear regression models. The resulting Markov chain is used to calculate the Bayes estimator for the parameters of picewise linear regression models.

Keywords: regression, piecewise, Bayesian, reversible Jump MCMC

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Authors: Pei Li, Chunyi Zhi

Abstract:

Conversion-type lithium-ion batteries show great potential as high-energy-density, low-cost and sustainable alternatives to current transition-metal-based intercalation cells. Li-Cl₂/Li⁻I₂ conversion batteries, based on anionic redox reactions of Cl⁻/Cl⁰ or I⁻/I⁰, are highly attractive due to their superior voltage and capacity. However, a redox-active and reversible chlorine cathode has not been developed in organic electrolytes. And thermodynamic instability and shuttling issues of iodine cathodes have plagued the active iodine loading, capacity retention and cyclability. By reversible chemical bonds, we develop reversible chlorine redox reactions in organic electrolytes with interhalogen bonds between I and Cl for Li-I₂ batteries and develop a highly thermally stable I/I₃--bonded organic salts with iodine content up to 80% as cathode materials for the rechargeable Li-I₂ batteries. The demonstration of reversible chemical bonds enabled rechargeable Li-halogen batteries opens a new avenue to develop halogen compound cathodes.

Keywords: conversion-type, chlorine, halogen cathode, high energy density, iodine, interhalogen bond, lithium-ion batteries

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Authors: A. S. Cheliyan, S. K. Bhattacharyya

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Dynamic Positioning System (DPS) is employed in marine vessels of the offshore oil and gas industry. It is a computer controlled system to automatically maintain a ship’s position and heading by using its own thrusters. Reliability assessment of the same can be analyzed through conventional fault tree. However, the complex behaviour like sequence failure, redundancy management and priority of failing of events cannot be analyzed by the conventional fault trees. The Dynamic Fault Tree (DFT) addresses these shortcomings of conventional Fault Tree by defining additional gates called dynamic gates. Monte Carlo based simulation approach has been adopted for the dynamic gates. This method of realistic modeling of DPS gives meaningful insight into the system reliability and the ability to improve the same.

Keywords: dynamic positioning system, dynamic fault tree, Monte Carlo simulation, reliability assessment

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Authors: Suparman

Abstract:

Piecewise polynomial regression model is very flexible model for modeling the data. If the piecewise polynomial regression model is matched against the data, its parameters are not generally known. This paper studies the parameter estimation problem of piecewise polynomial regression model. The method which is used to estimate the parameters of the piecewise polynomial regression model is Bayesian method. Unfortunately, the Bayes estimator cannot be found analytically. Reversible jump MCMC algorithm is proposed to solve this problem. Reversible jump MCMC algorithm generates the Markov chain that converges to the limit distribution of the posterior distribution of piecewise polynomial regression model parameter. The resulting Markov chain is used to calculate the Bayes estimator for the parameters of piecewise polynomial regression model.

Keywords: piecewise regression, bayesian, reversible jump MCMC, segmentation

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Authors: Umar Sheikh Tahir

Abstract:

Before al-Ghazālī, Islamic scholars perceived logic as an intrusive knowledge. The knowledge therefore, did not receive ample attention among scholars on how it should be adapted into Islamic sciences. General scholarship in that period rejects logic as an instrumental knowledge. This attitude became unquestionable to the scholars from different perspectives with diversification of suggestions in the pre-al-Ghazālī’s period. However, al-Ghazālī proclaimed with new perspective that transform Logic from ‘intrusive knowledge’ to a useful tool for Islamic sciences. This study explores the contributions of al-Ghazālī to epistemology regarding the use and the relevance of Logic. The study applies qualitative research methodology dealing strictly with secondary data from medieval age and contemporary sources. The study concludes that al-Ghazālī’s contributions which supported the transformation of Logic to useful tool in the Muslim world were drawn from his experience within Islamic tradition. He succeeded in reconciling Islamic tradition with the wisdom of Greek sciences.

Keywords: Al-Ghazālī, classical logic, epistemology, Islamdom and Islamic sciences

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Authors: Khalid Obaed Mahmod, Mesut Cevik

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The term smart city has appeared recently and was accompanied by many definitions and concepts, but as a simplified and clear definition, it can be said that the smart city is a geographical location that has gained efficiency and flexibility in providing public services to citizens through its use of technological and communication technologies, and this is what distinguishes it from other cities. Smart cities connect the various components of the city through the main and sub-networks in addition to a set of applications and thus be able to collect data that is the basis for providing technological solutions to manage resources and provide services. The basis of the work of the smart city is the use of artificial intelligence and the technology of the Internet of Things. The work presents the concept of smart cities, the pillars, standards, and evaluation indicators on which smart cities depend, and the reasons that prompted the world to move towards its establishment. It also provides a simplified hypothetical way to measure the ideal smart city model by defining some indicators and key pillars, simulating them with logic circuits, and testing them to determine if the city can be considered an ideal smart city or not.

Keywords: factors, indicators, logic gates, pillars, smart city

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Authors: Andrew Lock, Alastair Allen

Abstract:

Fragile watermarking has been proposed as a means of adding additional security or functionality to biometric systems, particularly for authentication and tamper detection. In this paper we describe an experimental study on the effect of watermarking iris images with a particular class of fragile algorithm, reversible algorithms, and the ability to correctly perform iris recognition. We investigate two scenarios, matching watermarked images to unmodified images, and matching watermarked images to watermarked images. We show that different watermarking schemes give very different results for a given capacity, highlighting the importance of investigation. At high embedding rates most algorithms cause significant reduction in recognition performance. However, in many cases, for low embedding rates, recognition accuracy is improved by the watermarking process.

Keywords: biometrics, iris recognition, reversible watermarking, vision engineering

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Authors: Mohamed Amine Haraoubia, Abdelaziz Hamzaoui, Najib Essounbouli

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The pursuit of the MPPT has led to the development of many kinds of controllers, one of which is the Fuzzy Logic Controller, which has proven its worth. To further tune this controller this paper will discuss and analyze the use of Genetic Algorithms to tune the Fuzzy Logic Controller. It will provide an introduction to both systems, and test their compatibility and performance.

Keywords: fuzzy logic controller, fuzzy logic, genetic algorithm, maximum power point, maximum power point tracking

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Authors: Mahendrapal Singh Pachlaniya, Laxmi Kumre

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The AOI (AND – OR- INVERTER) based design of XOR gate is proposed in this paper with less number of gates. This new XOR gate required four basic gates and basic gate include only AND, OR, Inverter (AOI). Conventional XOR gate required five basic gates. Ripple Carry Adder (RCA) used in parallel addition but propagation delay time is large. RCA replaced with Carry Select Adder (CSLA) to reduce propagation delay time. CSLA design with dual RCA considering carry = ‘0’ and carry = ‘1’, so it is not an area efficient adder. To make area efficient, modified CSLA is designed with single RCA considering carry = ‘0’ and another RCA considering carry = ‘1’ replaced with Binary to Excess 1 Converter (BEC). Now replacement of conventional XOR gate by new design of XOR gate in modified CSLA reduces much area compared to regular CSLA and modified CSLA.

Keywords: CSLA, BEC, XOR gate, area efficient

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Authors: Nizar Caraka Trihanasia, Suparwoko

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The purpose of this paper is to analyze the design model of city gates on arterial roads as Yogyakarta’s “Istimewa” (special) identity. City marketing has become a trend among cities in the past few years. It began to compete with each other in promoting their identity to the world. One of the easiest ways to recognize the identity is by knowing the image of the city which can be seen through architectural buildings or urban elements. The idea is to recognize how the image of the city can represent Yogyakarta’s identity, which is limited to the contribution of the city gates distinctiveness on Yogyakarta urban area. This study has concentrated on the aspect of city gates as built environment that provides a diversity, configuration and scale of development that promotes a sense of place and community. The visual analysis will be conducted to interpreted the existing Yogyakarta city gates (as built environment) focussing on some variables of 1) character and pattern, 2) circulation system establishment, and 3) open space utilisation. Literature review and site survey are also conducted to understand the relationship between the built environment and the sense of place in the community. This study suggests that visually the Yogyakarta city gate model has strong visual characters and pattern by using the concept of a sense of place of Yogyakarta community value.

Keywords: visual analysis, model, Yogyakarta “Istimewa”, citygates

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Authors: Mujde Turkkan, Nurkan Yagiz

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In this study an active controller is presented for vibration suppression of a full-bus model. The bus is modelled having seven degrees of freedom. Using the achieved model via Lagrange Equations the system equations of motion are derived. The suspensions of the bus model include air springs with two auxiliary chambers are used. Fuzzy logic controller is used to improve the ride comfort. The numerical results, verifies that the presented fuzzy logic controller improves the ride comfort.

Keywords: ride comfort, air spring, bus, fuzzy logic controller

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Authors: Nisar Ahmed Memon

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A new medical image watermarking scheme delivering high embedding capacity is presented in this paper. Integer Wavelet Transform (IWT), Companding technique and adaptive thresholding are used in this scheme. The proposed scheme implants, recovers the hidden information and restores the input image to its pristine state at the receiving end. Magnetic Resonance Imaging (MRI) images are used for experimental purposes. The scheme first segment the MRI medical image into non-overlapping blocks and then inserts watermark into wavelet coefficients having a high frequency of each block. The scheme uses block-based watermarking adopting iterative optimization of threshold for companding in order to avoid the histogram pre and post processing. Results show that proposed scheme performs better than other reversible medical image watermarking schemes available in literature for MRI medical images.

Keywords: adaptive thresholding, companding technique, data authentication, reversible watermarking

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Authors: Parisi L., Hamili D., Azlan N.

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The aim of this study was to design and simulate a particular type of Asynchronous State Machine (ASM), namely a ‘traffic light controller’ (TLC), operated at a frequency of 0.5 Hz. The design task involved two main stages: firstly, designing a 4-bit binary counter using J-K flip flops as the timing signal and subsequently, attaining the digital logic by deploying ASM design process. The TLC was designed such that it showed a sequence of three different colours, i.e. red, yellow and green, corresponding to set thresholds by deploying the least number of AND, OR and NOT gates possible. The software Multisim was deployed to design such circuit and simulate it for circuit troubleshooting in order for it to display the output sequence of the three different colours on the traffic light in the correct order. A clock signal, an asynchronous 4-bit binary counter that was designed through the use of J-K flip flops along with an ASM were used to complete this sequence, which was programmed to be repeated indefinitely. Eventually, the circuit was debugged and optimized, thus displaying the correct waveforms of the three outputs through the logic analyzer. However, hazards occurred when the frequency was increased to 10 MHz. This was attributed to delays in the feedback being too high.

Keywords: asynchronous state machine, traffic light controller, circuit design, digital electronics

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Authors: Toshanlal Meenpal, Ankita Meenpal

Abstract:

A very important technique in reversible data hiding field is Difference expansion. Secret message as well as the cover image may be completely recovered without any distortion after data extraction process due to reversibility feature. In general, in any difference expansion scheme embedding is performed by integer transform in the difference image acquired by grouping two neighboring pixel values. This paper proposes an improved reversible difference expansion embedding scheme. We mainly consider edge direction for embedding by modifying the difference of two neighboring pixels values. In general, the larger difference tends to bring a degraded stego image quality than the smaller difference. Image quality in the range of 0.5 to 3.7 dB in average is achieved by the proposed scheme, which is shown through the experimental results. However payload wise it achieves almost similar capacity in comparisons with previous method.

Keywords: information hiding, wedge direction, difference expansion, integer transform

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Authors: Hajara Abdulkarim Aliyu, Abdulbasid Ismail Isa

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This research paper studies electrohydraulic system for its role in position and motion control system and develops as mathematical model describing the behaviour of the system. The research further proposes Fuzzy logic and conventional PID controllers in order to achieve both accurate positioning of the payload and overall improvement of the system performance. The simulation result shows Fuzzy logic controller has a superior tracking performance and high disturbance rejection efficiency for its shorter settling time, less overshoot, smaller values of integral of absolute and deviation errors over the conventional PID controller at all the testing conditions.

Keywords: electrohydraulic, fuzzy logic, modelling, NZ-PID

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Authors: Pejman Hosseinioun, Abolghasem Ghasempour, Elham Gholami, Hamed Sarbazi

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Considering the development in global semiconductor technology, it is anticipated that gadgets such as diodes and resonant transistor tunnels (RTD/RTT), Single electron transistors (SET) and quantum cellular automata (QCA) will substitute CMOS (Complementary Metallic Oxide Semiconductor) gadgets in many applications. Unfortunately, these new technologies cannot disembark the common Boolean logic efficiently and are only appropriate for liminal logic. Therefor there is no doubt that with the development of these new gadgets it is necessary to find new MacDraw technologies which are compatible with them. Resonant transistor tunnels (RTD/RTT) and circuit MacDraw with enhanced computing abilities are candida for accumulating Nano criterion in the future. Quantum cellular automata (QCA) are also advent Nano technological gadgets for electrical circuits. Advantages of these gadgets such as higher speed, smaller dimensions, and lower consumption loss are of great consideration. QCA are basic gadgets in manufacturing gates, fuses and memories. Regarding the complex Nano criterion physical entity, circuit designers can focus on logical and constructional design to decrease complication in MacDraw. Moreover Single electron technology (SET) is another noteworthy gadget considered in Nano technology. This article is a survey in future of Nano technology in digital MacDraw.

Keywords: nano technology, resonant transistor tunnels, quantum cellular automata, semiconductor

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Authors: Te-Jen Chang, I-Hui Pan, Kuang-Hsiung Tan, Shan-Jen Cheng, Chien-Wu Lan, Chih-Chan Hu

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With the event of multimedia age in order to protect data not to be tampered, damaged, and faked, information hiding technologies are proposed. Information hiding means important secret information is hidden into cover multimedia and then camouflaged media is produced. This camouflaged media has the characteristic of natural protection. Under the undoubted situation, important secret information is transmitted out.Reversible information hiding technologies for high capacity is proposed in this paper. The gray images are as cover media in this technology. We compress gray images and compare with the original image to produce the estimated differences. By using the estimated differences, expression information hiding is used, and higher information capacity can be achieved. According to experimental results, the proposed technology can be approved. For these experiments, the whole capacity of information payload and image quality can be satisfied.

Keywords: cover media, camouflaged media, reversible information hiding, gray image

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