Search results for: flash memory
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 496

Search results for: flash memory

466 WormHex: A Volatile Memory Analysis Tool for Retrieval of Social Media Evidence

Authors: Norah Almubairik, Wadha Almattar, Amani Alqarni

Abstract:

Social media applications are increasingly being used in our everyday communications. These applications utilise end-to-end encryption mechanisms which make them suitable tools for criminals to exchange messages. These messages are preserved in the volatile memory until the device is restarted. Therefore, volatile forensics has become an important branch of digital forensics. In this study, the WormHex tool was developed to inspect the memory dump files for Windows and Mac based workstations. The tool supports digital investigators by enabling them to extract valuable data written in Arabic and English through web-based WhatsApp and Twitter applications. The results confirm that social media applications write their data into the memory, regardless of the operating system running the application, with there being no major differences between Windows and Mac.

Keywords: Volatile memory, REGEX, digital forensics, memory acquisition

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465 Memory Types in Hemodialysis Patients: A Study Based on Hemodialysis Duration, Zahedan, South East of Iran

Authors: B. Sabayan, A. Alidadi, S. Ebrahimi, N. M. Bakhshani

Abstract:

Neuropsychological problems are more common in hemodialysis (HD) patients than in healthy individuals. The aim of this study was to investigate the effect of long term HD on memory types of HD patients. To assess the different type of memory, we used memory parts of the Persian Papers and Pencil Cognitive assessment package (PCAP) and Addenbrooke's Cognitive Examination (ACE-R). Our study included 80 HD patients of whom 39 had less than six months of HD and 41 patients and another group which had a history of HD more than six months. The population had a mean age of 51.60 years old and 27.5% of them were female. The scores of patients who have been hemodialyzed for a long time (median time of HD was up to 4 years) had lower score in anterograde, explicit, visual, recall and recognition memory (5.44±1.07, 9.49±3.472, 22.805±6.6913, 5.59±10.435, 11.02±3.190 score) than the HD patients who underwent HD for a shorter term, where the median time was 3 to 5 months (P<0.01). The regression result shows that, by increasing the HD duration, all memory types are reduced (R2=0.600, P<0.01). The present study demonstrated that HD patients who were under HD for a long time had significantly lower scores in the different types of memory. However, additional researches are needed in this area.

Keywords: Hemodialysis patients, duration of hemodialysis, memory types, Zahedan.

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464 Autobiographical Memory and Flexible Remembering: Gender Differences

Authors: A. Aizpurua, W. Koutstaal

Abstract:

In this study, we examined gender differences in: (1) a flexible remembering task, that asked for episodic memory decisions at an item-specific versus category-based level, and (2) the retrieval specificity of autobiographical memory during free recall. Differences favouring women were found on both measures. Furthermore, a significant association was observed, across gender groups, between level of specificity in the autobiographical memory interview and sensitivity to gist on the flexible remembering task. These results suggest that similar cognitive processes may partially contribute to both the ability for specific autobiographical recall and the capacity for inhibition of gist-information on the flexible remembering task.

Keywords: autobiographical memory, flexible remembering, gender, specificity.

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463 Thermal Post-buckling of Shape Memory Alloy Composite Plates under Non-uniform Temperature Distribution

Authors: Z.A. Rasid, R. Zahari, A. Ayob, D.L. Majid, A.S.M. Rafie

Abstract:

Aerospace vehicles are subjected to non-uniform thermal loading that may cause thermal buckling. A study was conducted on the thermal post-buckling of shape memory alloy composite plates subjected to the non-uniform tent-like temperature field. The shape memory alloy wires were embedded within the laminated composite plates to add recovery stress to the plates. The non-linear finite element model that considered the recovery stress of the shape memory alloy and temperature dependent properties of the shape memory alloy and composite matrix along with its source codes were developed. It was found that the post-buckling paths of the shape memory alloy composite plates subjected to various tentlike temperature fields were stable within the studied temperature range. The addition of shape memory alloy wires to the composite plates was found to significantly improve the post-buckling behavior of laminated composite plates under non-uniform temperature distribution.

Keywords: Post-buckling, shape memory alloy, temperaturedependent property, tent-like temperature distribution

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462 Bandwidth, Area Efficient and Target Device Independent DDR SDRAM Controller

Authors: T. Mladenov, F. Mujahid, E. Jung, D. Har

Abstract:

The application of the synchronous dynamic random access memory (SDRAM) has gone beyond the scope of personal computers for quite a long time. It comes into hand whenever a big amount of low price and still high speed memory is needed. Most of the newly developed stand alone embedded devices in the field of image, video and sound processing take more and more use of it. The big amount of low price memory has its trade off – the speed. In order to take use of the full potential of the memory, an efficient controller is needed. Efficient stands for maximum random accesses to the memory both for reading and writing and less area after implementation. This paper proposes a target device independent DDR SDRAM pipelined controller and provides performance comparison with available solutions.

Keywords: DDR SDRAM, controller, effective implementation

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461 Behavioral Modeling Accuracy for RF Power Amplifier with Memory Effects

Authors: Chokri Jebali, Noureddine Boulejfen, Ali Gharsallah, Fadhel M. Ghannouchi

Abstract:

In this paper, a system level behavioural model for RF power amplifier, which exhibits memory effects, and based on multibranch system is proposed. When higher order terms are included, the memory polynomial model (MPM) exhibits numerical instabilities. A set of memory orthogonal polynomial model (OMPM) is introduced to alleviate the numerical instability problem associated to MPM model. A data scaling and centring algorithm was applied to improve the power amplifier modeling accuracy. Simulation results prove that the numerical instability can be greatly reduced, as well as the model precision improved with nonlinear model.

Keywords: power amplifier, orthogonal model, polynomialmodel , memory effects.

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460 The Relationship between Representational Conflicts, Generalization, and Encoding Requirements in an Instance Memory Network

Authors: Mathew Wakefield, Matthew Mitchell, Lisa Wise, Christopher McCarthy

Abstract:

This paper aims to provide an interpretation of artificial neural networks (ANNs) and explore some of its implications. The interpretation views ANNs as a memory which encodes instances of experience. An experiment explores the behavior of encoding and retrieval of instances from memory. A localised representation ANN is created that allows control over encoding and retrieved memory sample size and is experimented with using the MNIST digits dataset. The relationship between input familiarity, conflict within retrieved samples, and error rates is described and demonstrated to be an effective driver for memory encoding. Results indicate that selective encoding and retrieval samples that allow detection of memory conflicts produce optimal performance, and that error rates are normally distributed with input familiarity and conflict. By using input familiarity and sample consistency to guide memory encoding, the number of encoding trials on the dataset were reduced to 18.33% of the training data while maintaining good recognition performance on the test data.

Keywords: Artificial Neural Networks, ANNs, representation, memory, conflict monitoring, confidence.

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459 Developing NAND Flash-Memory SSD-Based File System Design

Authors: Jaechun No

Abstract:

This paper focuses on I/O optimizations of N-hybrid (New-Form of hybrid), which provides a hybrid file system space constructed on SSD and HDD. Although the promising potentials of SSD, such as the absence of mechanical moving overhead and high random I/O throughput, have drawn a lot of attentions from IT enterprises, its high ratio of cost/capacity makes it less desirable to build a large-scale data storage subsystem composed of only SSDs. In this paper, we present N-hybrid that attempts to integrate the strengths of SSD and HDD, to offer a single, large hybrid file system space. Several experiments were conducted to verify the performance of N-hybrid.

Keywords: SSD, data section, I/O optimizations.

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458 Testing Loaded Programs Using Fault Injection Technique

Authors: S. Manaseer, F. A. Masooud, A. A. Sharieh

Abstract:

Fault tolerance is critical in many of today's large computer systems. This paper focuses on improving fault tolerance through testing. Moreover, it concentrates on the memory faults: how to access the editable part of a process memory space and how this part is affected. A special Software Fault Injection Technique (SFIT) is proposed for this purpose. This is done by sequentially scanning the memory of the target process, and trying to edit maximum number of bytes inside that memory. The technique was implemented and tested on a group of programs in software packages such as jet-audio, Notepad, Microsoft Word, Microsoft Excel, and Microsoft Outlook. The results from the test sample process indicate that the size of the scanned area depends on several factors. These factors are: process size, process type, and virtual memory size of the machine under test. The results show that increasing the process size will increase the scanned memory space. They also show that input-output processes have more scanned area size than other processes. Increasing the virtual memory size will also affect the size of the scanned area but to a certain limit.

Keywords: Complex software systems, Error detection, Fault tolerance, Injection and testing methodology, Memory faults, Process and virtual memory.

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457 Kinetics of Aggregation in Media with Memory

Authors: A. Brener, B. Balabekov, N. Zhumataev

Abstract:

In the paper we submit the non-local modification of kinetic Smoluchowski equation for binary aggregation applying to dispersed media having memory. Our supposition consists in that that intensity of evolution of clusters is supposed to be a function of the product of concentrations of the lowest orders clusters at different moments. The new form of kinetic equation for aggregation is derived on the base of the transfer kernels approach. This approach allows considering the influence of relaxation times hierarchy on kinetics of aggregation process in media with memory.

Keywords: Binary aggregation, Media with memory, Non-local model, Relaxation times

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456 Formal Verification of Cache System Using a Novel Cache Memory Model

Authors: Guowei Hou, Lixin Yu, Wei Zhuang, Hui Qin, Xue Yang

Abstract:

Formal verification is proposed to ensure the correctness of the design and make functional verification more efficient. As cache plays a vital role in the design of System on Chip (SoC), and cache with Memory Management Unit (MMU) and cache memory unit makes the state space too large for simulation to verify, then a formal verification is presented for such system design. In the paper, a formal model checking verification flow is suggested and a new cache memory model which is called “exhaustive search model” is proposed. Instead of using large size ram to denote the whole cache memory, exhaustive search model employs just two cache blocks. For cache system contains data cache (Dcache) and instruction cache (Icache), Dcache memory model and Icache memory model are established separately using the same mechanism. At last, the novel model is employed to the verification of a cache which is module of a custom-built SoC system that has been applied in practical, and the result shows that the cache system is verified correctly using the exhaustive search model, and it makes the verification much more manageable and flexible.

Keywords: Cache system, formal verification, novel model, System on Chip (SoC).

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455 Identity Formation and Autobiographical Memory: Two Interrelated Concepts of Development

Authors: Anna R. Alyusheva, Veronika V. Nourkova

Abstract:

The aim of the present paper is to investigate the interdependency among ego-identity status, autobiographical memory and cultural life story schema. The study shows considerable differences between autobiographical memory characteristics and “family script", which is typical for participants (adolescents, M age years = 17.84, SD = 1.18, N = 58), with different ego-identity statuses. Participants with diffused ego-identity status recalled fewer autobiographical memories. Additionally, this group of participants recalled fewer events from their parents- life. Participants with moratorium ego-identity status dated their first recollections to a later age than others, and recalled fewer memories relating to their childhood. Participants with achieved identity status recalled more self-defining memories and events from their parents- life. They used more functions from the autobiographical memory. There weren-t any significant differences between the foreclosed identity status group and the others. These findings support the idea of a bidirectional relation between culture, memory and self.

Keywords: Autobiographical memory, autobiographical narrative, cultural life script, ego-identity

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454 Parallel Vector Processing Using Multi Level Orbital DATA

Authors: Nagi Mekhiel

Abstract:

Many applications use vector operations by applying single instruction to multiple data that map to different locations in conventional memory. Transferring data from memory is limited by access latency and bandwidth affecting the performance gain of vector processing. We present a memory system that makes all of its content available to processors in time so that processors need not to access the memory, we force each location to be available to all processors at a specific time. The data move in different orbits to become available to other processors in higher orbits at different time. We use this memory to apply parallel vector operations to data streams at first orbit level. Data processed in the first level move to upper orbit one data element at a time, allowing a processor in that orbit to apply another vector operation to deal with serial code limitations inherited in all parallel applications and interleaved it with lower level vector operations.

Keywords: Memory organization, parallel processors, serial code, vector processing.

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453 Robust & Energy Efficient Universal Gates for High Performance Computer Networks at 22nm Process Technology

Authors: M. Geetha Priya, K. Baskaran, S. Srinivasan

Abstract:

Digital systems are said to be constructed using basic logic gates. These gates are the NOR, NAND, AND, OR, EXOR & EXNOR gates. This paper presents a robust three transistors (3T) based NAND and NOR gates with precise output logic levels, yet maintaining equivalent performance than the existing logic structures. This new set of 3T logic gates are based on CMOS inverter and Pass Transistor Logic (PTL). The new universal logic gates are characterized by better speed and lower power dissipation which can be straightforwardly fabricated as memory ICs for high performance computer networks. The simulation tests were performed using standard BPTM 22nm process technology using SYNOPSYS HSPICE. The 3T NAND gate is evaluated using C17 benchmark circuit and 3T NOR is gate evaluated using a D-Latch. According to HSPICE simulation in 22 nm CMOS BPTM process technology under given conditions and at room temperature, the proposed 3T gates shows an improvement of 88% less power consumption on an average over conventional CMOS logic gates. The devices designed with 3T gates will make longer battery life by ensuring extremely low power consumption.

Keywords: Low power, CMOS, pass-transistor, flash memory, logic gates.

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452 Analysis of Filtering in Stochastic Systems on Continuous-Time Memory Observations in the Presence of Anomalous Noises

Authors: S. Rozhkova, O. Rozhkova, A. Harlova, V. Lasukov

Abstract:

For optimal unbiased filter as mean-square and in the case of functioning anomalous noises in the observation memory channel, we have proved insensitivity of filter to inaccurate knowledge of the anomalous noise intensity matrix and its equivalence to truncated filter plotted only by non anomalous components of an observation vector.

Keywords: Mathematical expectation, filtration, anomalous noise, memory.

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451 The Preservation of Cultural Heritage: Continuity and Memory

Authors: Andrey R. Khazbulatov, Moldir Nurpeiis

Abstract:

Contemporary science and technologies largely widen the gap between the spiritual and rational of the society. Industrial and technological breakthroughs might radically affect most processes in the society, thus losing the cultural heritage. The thinkers recognized the dangers of the decadence in the first place. In the present article the ways of preserving cultural heritage have been investigated. Memory has always been a necessary condition for selfidentification, - continuity is based on this. The authors have supported the hypothesis that continuity and ethnic memory are the very mechanisms that preserve cultural heritage. Such problemformulating will facilitate another, new look at the material, spiritual and arts spheres of the cultural heritage of numerous ethnic groups. The fundamental works by major European and Kazakh scientists have been taken as a basis for the research done.

Keywords: Continuity, cultural heritage, ethnic memory

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450 An Implementation of Data Reusable MPEG Video Coding Scheme

Authors: Vasily G. Moshnyaga

Abstract:

This paper presents an optimized MPEG2 video codec implementation, which drastically reduces the number of computations and memory accesses required for video compression. Unlike traditional scheme, we reuse data stored in frame memory to omit unnecessary coding operations and memory read/writes for unchanged macroblocks. Due to dynamic memory sharing among reference frames, data-driven macroblock characterization and selective macroblock processing, we perform less than 15% of the total operations required by a conventional coder while maintaining high picture quality.

Keywords: Data reuse, adaptive processing, video coding, MPEG

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449 Database Compression for Intelligent On-board Vehicle Controllers

Authors: Ágoston Winkler, Sándor Juhász, Zoltán Benedek

Abstract:

The vehicle fleet of public transportation companies is often equipped with intelligent on-board passenger information systems. A frequently used but time and labor-intensive way for keeping the on-board controllers up-to-date is the manual update using different memory cards (e.g. flash cards) or portable computers. This paper describes a compression algorithm that enables data transmission using low bandwidth wireless radio networks (e.g. GPRS) by minimizing the amount of data traffic. In typical cases it reaches a compression rate of an order of magnitude better than that of the general purpose compressors. Compressed data can be easily expanded by the low-performance controllers, too.

Keywords: Data analysis, data compression, differentialencoding, run-length encoding, vehicle control.

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448 Compression and Filtering of Random Signals under Constraint of Variable Memory

Authors: Anatoli Torokhti, Stan Miklavcic

Abstract:

We study a new technique for optimal data compression subject to conditions of causality and different types of memory. The technique is based on the assumption that some information about compressed data can be obtained from a solution of the associated problem without constraints of causality and memory. This allows us to consider two separate problem related to compression and decompression subject to those constraints. Their solutions are given and the analysis of the associated errors is provided.

Keywords: stochastic signals, optimization problems in signal processing.

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447 Mnemotopic Perspectives: Communication Design as Stabilizer for the Memory of Places

Authors: C. Galasso

Abstract:

The ancestral relationship between humans and geographical environment has long been at the center of an interdisciplinary dialogue, which sees one of its main research nodes in the relationship between memory and places. Given its deep complexity, this symbiotic connection continues to look for a proper definition that appears increasingly negotiated by different disciplines. Numerous fields of knowledge are involved, from anthropology to semiotics of space, from photography to architecture, up to subjects traditionally far from these reasonings. This is the case of Design of Communication, a young discipline, now confident in itself and its objectives, aimed at finding and investigating original forms of visualization and representation, between sedimented knowledge and new technologies. In particular, Design of Communication for the Territory offers an alternative perspective to the debate, encouraging the reactivation and reconstruction of the memory of places. Recognizing mnemotopes as a cultural object of vertical interpretation of the memory-place relationship, design can become a real mediator of the territorial fixation of memories, making them increasingly accessible and perceptible, contributing to build a topography of memory. According to a mnemotopic vision, Communication Design can support the passage from a memory in which the observer participates only as an individual to a collective form of memory. A mnemotopic form of Communication Design can, through geolocation and content map-based systems, make chronology a topography rooted in the territory and practicable; it can be useful to understand how the perception of the memory of places changes over time, considering how to insert them in the contemporary world. Mnemotopes can be materialized in different format of translation, editing and narration and then involved in complex systems of communication. The memory of places, therefore, if stabilized by the tools offered by Communication Design, can make visible ruins and territorial stratifications, illuminating them with new communicative interests that can be shared and participated.

Keywords: Memory of places, design of communication, territory, mnemotope, topography of memory.

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446 Heuristic Continuous-time Associative Memories

Authors: Truong Quang Dang Khoa, Masahiro Nakagawa

Abstract:

In this paper, a novel associative memory model will be proposed and applied to memory retrievals based on the conventional continuous time model. The conventional model presents memory capacity is very low and retrieval process easily converges to an equilibrium state which is very different from the stored patterns. Genetic Algorithms is well-known with the capability of global optimal search escaping local optimum on progress to reach a global optimum. Based on the well-known idea of Genetic Algorithms, this work proposes a heuristic rule to make a mutation when the state of the network is trapped in a spurious memory. The proposal heuristic associative memory show the stored capacity does not depend on the number of stored patterns and the retrieval ability is up to ~ 1.

Keywords: Artificial Intelligent, Soft Computing, NeuralNetworks, Genetic Algorithms, Hopfield Neural Networks, andAssociative Memories.

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445 Schmitt Trigger Based SRAM Using Finfet Technology- Shorted Gate Mode

Authors: Vasundara Patel K. S., Harsha N. Bhushan, Kiran G. Gadag, Nischal Prasad B. N., Mohmmed Haroon

Abstract:

The most widely used semiconductor memory types are the Dynamic Random Access Memory (DRAM) and Static Random Access memory (SRAM). Competition among memory manufacturers drives the need to decrease power consumption and reduce the probability of read failure. A technology that is relatively new and has not been explored is the FinFET technology. In this paper, a single cell Schmitt Trigger Based Static RAM using FinFET technology is proposed and analyzed. The accuracy of the result is validated by means of HSPICE simulations with 32nm FinFET technology and the results are then compared with 6T SRAM using the same technology.

Keywords: Schmitt trigger based SRAM, FinFET, and Static Noise Margin.

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444 Evaluating the Effectiveness of Memory Overcommit Techniques on KVM-based Hosting Platform

Authors: Chin-Hung Li

Abstract:

Determining how many virtual machines a Linux host could run can be a challenge. One of tough missions is to find the balance among performance, density and usability. Now KVM hypervisor has become the most popular open source full virtualization solution. It supports several ways of running guests with more memory than host really has. Due to large differences between minimum and maximum guest memory requirements, this paper presents initial results on same-page merging, ballooning and live migration techniques that aims at optimum memory usage on KVM-based cloud platform. Given the design of initial experiments, the results data is worth reference for system administrators. The results from these experiments concluded that each method offers different reliability tradeoff.

Keywords: Kernel-based Virtual Machine, Overcommit, Virtualization.

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443 Synthesis of Filtering in Stochastic Systems on Continuous-Time Memory Observations in the Presence of Anomalous Noises

Authors: S. Rozhkova, O. Rozhkova, A. Harlova, V. Lasukov

Abstract:

We have conducted the optimal synthesis of rootmean- squared objective filter to estimate the state vector in the case if within the observation channel with memory the anomalous noises with unknown mathematical expectation are complement in the function of the regular noises. The synthesis has been carried out for linear stochastic systems of continuous - time.

Keywords: Mathematical expectation, filtration, anomalous noise, memory.

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442 Mining Sequential Patterns Using I-PrefixSpan

Authors: Dhany Saputra, Dayang R. A. Rambli, Oi Mean Foong

Abstract:

In this paper, we propose an improvement of pattern growth-based PrefixSpan algorithm, called I-PrefixSpan. The general idea of I-PrefixSpan is to use sufficient data structure for Seq-Tree framework and separator database to reduce the execution time and memory usage. Thus, with I-PrefixSpan there is no in-memory database stored after index set is constructed. The experimental result shows that using Java 2, this method improves the speed of PrefixSpan up to almost two orders of magnitude as well as the memory usage to more than one order of magnitude.

Keywords: ArrayList, ArrayIntList, minimum support, sequence database, sequential patterns.

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441 Effect of Bentonite on the Properties of Liquid Insulating Oil

Authors: Loai Nasrat, Mervat S. Hassan

Abstract:

Bentonitic material from South Aswan, Egypt was evaluated in terms of mineral-ogy and chemical composition as bleaching clay in refining of transformer oil before and after acid activation and thermal treatment followed by acid leaching using HCl and H2SO4 for different contact times. Structural modification and refining power of bento-nite were investigated during modification by means of X-ray diffraction and infrared spectroscopy. The results revealed that the activated bentonite could be used for refining of transformer oil. The oil parameters such as; dielectric strength, viscosity and flash point had been improved. The dielectric breakdown strength of used oil increased from 29 kV for used oil treated with unactivated bentonite to 74 kV after treatment with activated bentonite. Kinematic Viscosity changed from 19 to 11 mm2 /s after treatment with activated bentonite. However, flash point achieved 149 ºC.

Keywords: Dielectric strength, unactivated bentonite, X-ray diffraction, SEM image

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440 Extending the Aspect Oriented Programming Joinpoint Model for Memory and Type Safety

Authors: Amjad Nusayr

Abstract:

Software security is a general term used to any type of software architecture or model in which security aspects are incorporated in this architecture. These aspects are not part of the main logic of the underlying program. Software security can be achieved using a combination of approaches including but not limited to secure software designs, third part component validation, and secure coding practices. Memory safety is one feature in software security where we ensure that any object in memory is have a valid pointer or a reference with a valid type. Aspect Oriented Programming (AOP) is a paradigm that is concerned with capturing the cross-cutting concerns in code development. AOP is generally used for common cross-cutting concerns like logging and Database transaction managing. In this paper we introduce the concepts that enable AOP to be used for the purpose of memory and type safety. We also present ideas for extending AOP in software security practices.

Keywords: Aspect oriented programming, programming languages, software security, memory and type safety.

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439 Effect of Low Frequency Memory on High Power 12W LDMOS Transistors Intermodulation Distortion

Authors: A. Alghanim, J. Benedikt, P. J. Tasker

Abstract:

The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.

Keywords: Low Frequency Memory, IntermodulationDistortion (IMD).

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438 Dual-Network Memory Model for Temporal Sequences

Authors: Motonobu Hattori, Rina Suzuki

Abstract:

In neural networks, when new patters are learned by a network, they radically interfere with previously stored patterns. This drawback is called catastrophic forgetting. We have already proposed a biologically inspired dual-network memory model which can much reduce this forgetting for static patterns. In this model, information is first stored in the hippocampal network, and thereafter, it is transferred to the neocortical network using pseudopatterns. Because temporal sequence learning is more important than static pattern learning in the real world, in this study, we improve our conventional  dual-network memory model so that it can deal with temporal sequences without catastrophic forgetting. The computer simulation results show the effectiveness of the proposed dual-network memory model.  

Keywords: Catastrophic forgetting, dual-network, temporal sequences.

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437 Permanent Reduction of Arc Flash Energy to Safe Limit on Line Side of 480 Volt Switchgear Incomer Breaker

Authors: Md Abid Khan

Abstract:

A recognized engineering challenge is related to personnel protection from fatal arc flash incident energy in the line side of the 480-volt switchgears incomer breakers during maintenance activities. The incident energy is typically high due to slow fault clearance and it can be higher than the available personnel protective equipment (PPE) ratings. A fault on the line side of the 480 Volt breaker is cleared by breakers or fuses in the upstream higher voltage system (4160 Volt or higher). The current reflection in the higher voltage upstream system for a fault in the 480-volt switchgear is low, the clearance time is slower and the inversely proportional incident energy is hence higher. The installation of overcurrent protection at 480-volt system upstream of the incomer breaker will operate fast enough and trips the upstream higher voltage breaker when a fault develops at the incomer breaker. Therefore, fault current reduction as reflected in the upstream higher voltage system is eliminated. Since the fast overcurrent protection is permanently installed, it is always functional, do not require human interventions and eliminates exposure to human errors. It is installed at the maintenance activity location and its operations can be locally monitored by craftsmen during maintenance activities.

Keywords: Arc flash, mitigation, maintenance switch, energy level.

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