Search results for: Architecture design

Authors: Abeer Aljohani

Abstract:

The COVID-19 virus spread has been one of the extreme pandemics across the globe. It is also referred as corona virus which is a contagious disease that continuously mutates into numerous variants. Currently, the B.1.1.529 variant labeled as Omicron is detected in South Africa. The huge spread of COVID-19 disease has affected several lives and has surged exceptional pressure on the healthcare systems worldwide. Also, everyday life and the global economy have been at stake. Numerous COVID-19 cases have produced a huge burden on hospitals as well as health workers. To reduce this burden, this paper predicts COVID-19 disease based on the symptoms and medical history of the patient. As machine learning is a widely accepted area and gives promising results for healthcare, this research presents an architecture for COVID-19 detection using ML techniques integrated with feature dimensionality reduction. This paper uses a standard University of California Irvine (UCI) dataset for predicting COVID-19 disease. This dataset comprises symptoms of 5434 patients. This paper also compares several supervised ML techniques on the presented architecture. The architecture has also utilized 10-fold cross validation process for generalization and Principal Component Analysis (PCA) technique for feature reduction. Standard parameters are used to evaluate the proposed architecture including F1-Score, precision, accuracy, recall, Receiver Operating Characteristic (ROC) and Area under Curve (AUC). The results depict that Decision tree, Random Forest and neural networks outperform all other state-of-the-art ML techniques. This result can be used to effectively identify COVID-19 infection cases.

Keywords: Supervised machine learning, COVID-19 prediction, healthcare analytics, Random Forest, Neural Network.

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Authors: Esra E. Aleisa, Li Lin

Abstract:

Complex engineering design problems consist of numerous factors of varying criticalities. Considering fundamental features of design and inferior details alike will result in an extensive waste of time and effort. Design parameters should be introduced gradually as appropriate based on their significance relevant to the problem context. This motivates the representation of design parameters at multiple levels of an abstraction hierarchy. However, developing abstraction hierarchies is an area that is not well understood. Our research proposes a novel hierarchical abstraction methodology to plan effective engineering designs and processes. It provides a theoretically sound foundation to represent, abstract and stratify engineering design parameters and tasks according to causality and criticality. The methodology creates abstraction hierarchies in a recursive and bottom-up approach that guarantees no backtracking across any of the abstraction levels. The methodology consists of three main phases, representation, abstraction, and layering to multiple hierarchical levels. The effectiveness of the developed methodology is demonstrated by a design problem.

Keywords: Hierarchies, Abstraction, Loop-free, Engineering Design

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Authors: Shiji Hu, Lei Li, Wanting Zhou, Daohong Yang

Abstract:

The data encryption is the foundation of today’s communication. On this basis, to improve the speed of data encryption and decryption is always an important goal for high-speed applications. This paper proposed an elliptic curve crypto processor architecture based on SM2 prime field. Regarding hardware implementation, we optimized the algorithms in different stages of the structure. For modulo operation on finite field, we proposed an optimized improvement of the Karatsuba-Ofman multiplication algorithm and shortened the critical path through the pipeline structure in the algorithm implementation. Based on SM2 recommended prime field, a fast modular reduction algorithm is used to reduce 512-bit data obtained from the multiplication unit. The radix-4 extended Euclidean algorithm was used to realize the conversion between the affine coordinate system and the Jacobi projective coordinate system. In the parallel scheduling point operations on elliptic curves, we proposed a three-level parallel structure of point addition and point double based on the Jacobian projective coordinate system. Combined with the scalar multiplication algorithm, we added mutual pre-operation to the point addition and double point operation to improve the efficiency of the scalar point multiplication. The proposed ECC hardware architecture was verified and implemented on Xilinx Virtex-7 and ZYNQ-7 platforms, and each 256-bit scalar multiplication operation took 0.275ms. The performance for handling scalar multiplication is 32 times that of CPU (dual-core ARM Cortex-A9).

Keywords: Elliptic curve cryptosystems, SM2, modular multiplication, point multiplication.

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Authors: Imen Aouini, Lamia Ben Azzouz

Abstract:

The energy need is growing rapidly due to the population growth and the large new usage of power. Several works put considerable efforts to make the electricity grid more intelligent to reduce essentially energy consumption and provide efficiency and reliability of power systems. The Smart Grid is a complex architecture that covers critical devices and systems vulnerable to significant attacks. Hence, security is a crucial factor for the success and the wide deployment of Smart Grids. In this paper, we present security issues of the Smart Grid architecture and we highlight open issues that will make the Smart Grid security a challenging research area in the future.

Keywords: Smart grids, smart meters, home area network, neighbor area network.

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Authors: M. Soltan Rezaee, M. R. Ghazavi, A. Najafi, W.-H. Liao

Abstract:

Generally, different rods in shaft systems can be misaligned based on the mechanical system usages. These rods can be linked together via U-coupling easily. The system is self-stimulated and may cause instabilities due to the inherent behavior of the coupling. In this study, each rod includes an elastic shaft with an angular stiffness and structural damping. Moreover, the mass of shafts is considered via attached solid disks. The impact of the system architecture and shaft mass on the instability of such mechanism are studied. Stability charts are plotted via a method based on Floquet theory. Eventually, the unstable points have been found and analyzed in detail. The results show that stabilizing the driveline is feasible by changing the system characteristics which include shaft mass and architecture.

Keywords: Coupling, mechanical systems, oscillations, rotating shafts.

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Authors: Haluk Gümüskaya, Hüseyin Hakkoymaz

Abstract:

This paper describes WiPoD (Wireless Position Detector) which is a pure software based location determination and tracking (positioning) system. It uses empirical signal strength measurements from different wireless access points for mobile user positioning. It is designed to determine the location of users having 802.11 enabled mobile devices in an 802.11 WLAN infrastructure and track them in real time. WiPoD is the first main module in our LBS (Location Based Services) framework. We tested K-Nearest Neighbor and Triangulation algorithms to estimate the position of a mobile user. We also give the analysis results of these algorithms for real time operations. In this paper, we propose a supportable, i.e. understandable, maintainable, scalable and portable wireless positioning system architecture for an LBS framework. The WiPoD software has a multithreaded structure and was designed and implemented with paying attention to supportability features and real-time constraints and using object oriented design principles. We also describe the real-time software design issues of a wireless positioning system which will be part of an LBS framework.

Keywords: Indoor location determination and tracking, positioning in Wireless LAN.

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Authors: A. Ismail, M. S. Joy, J. E. Sinclair, M. I. Hamzah

Abstract:

This paper focuses on a novel method for semantic searching and retrieval of information about learning materials. Metametadata encapsulate metadata instances by using the properties and attributes provided by ontologies rather than describing learning objects. A novel metametadata taxonomy has been developed which provides the basis for a semantic search engine to extract, match and map queries to retrieve relevant results. The use of ontological views is a foundation for viewing the pedagogical content of metadata extracted from learning objects by using the pedagogical attributes from the metametadata taxonomy. Using the ontological approach and metametadata (based on the metametadata taxonomy) we present a novel semantic searching mechanism.These three strands – the taxonomy, the ontological views, and the search algorithm – are incorporated into a novel architecture (OMESCOD) which has been implemented.

Keywords: Metadata, metametadata, semantic, ontologies.

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Authors: Fuyang Peng, Bo Deng, Chao Qi

Abstract:

This paper presents the design and implementation of CASTE, a Cloud-based automatic software test environment. We first present the architecture of CASTE, then the main packages and classes of it are described in detail. CASTE is built upon a private Infrastructure as a Service platform. Through concentrated resource management of virtualized testing environment and automatic execution control of test scripts, we get a better solution to the testing resource utilization and test automation problem. Experiments on CASTE give very appealing results.

Keywords: Software testing, test environment, test script, cloud computing, IaaS, test automation.

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Authors: Boo-Sung Koh, Seung-Eock Kim

Abstract:

In this paper, a direct design using a nonlinear inelastic analysis is suggested. Also, this paper compares the load carrying capacity obtained by a nonlinear inelastic analysis with experiment results to verify the accuracy of the results. The allowable stress design results of a railroad through a plate girder bridge and the safety factor of the nonlinear inelastic analysis were compared to examine the safety performance. As a result, the load safety factor for the nonlinear inelastic analysis was twice as high as the required safety factor under the allowable stress design standard specified in the civil engineering structure design standards for urban magnetic levitation railways, which further verified the advantages of the proposed direct design method.

Keywords: Direct design, nonlinear inelastic analysis, residual stress, initial geometric imperfection.

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Authors: Khin Thanda Soe

Abstract:

A model to identify the lifetime of target tracking wireless sensor network is proposed. The model is a static clusterbased architecture and aims to provide two factors. First, it is to increase the lifetime of target tracking wireless sensor network. Secondly, it is to enable good localization result with low energy consumption for each sensor in the network. The model consists of heterogeneous sensors and each sensing member node in a cluster uses two operation modes–active mode and sleep mode. The performance results illustrate that the proposed architecture consumes less energy and increases lifetime than centralized and dynamic clustering architectures, for target tracking sensor network.

Keywords: Network lifetime, Target Localization, TargetTracking, Wireless Sensor Networks.

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Authors: Naohiro Ban, Hiromitsu Ogawa, Manato Ono, Yoshihisa Ishida

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This paper describes an expanded system for a servo system design by using the Loop Shaping Design Procedure (LSDP). LSDP is one of the H∞ design procedure. By conducting Loop Shaping with a compensator and robust stabilization to satisfy the index function, we get the feedback controller that makes the control system stable. In this paper, we propose an expanded system for a servo system design and apply to the DC motor. The proposed method performs well in the DC motor positioning control. It has no steady-state error in the disturbance response and it has robust stability.

Keywords: Loop Shaping Design Procedure (LSDP), servosystem, DC motor.

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Authors: G. Ait Abdelmalek, R. Ziani

Abstract:

In this document, we have proposed a robust conceptual strategy, in order to improve the robustness against the manufacturing defects and thus the reliability of logic CMOS circuits. However, in order to enable the use of future CMOS technology nodes this strategy combines various types of design: DFR (Design for Reliability), techniques of tolerance: hardware redundancy TMR (Triple Modular Redundancy) for hard error tolerance, the DFT (Design for Testability. The Results on largest ISCAS and ITC benchmark circuits show that our approach improves considerably the reliability, by reducing the key factors, the area costs and fault tolerance probability.

Keywords: Design for reliability, design for testability, fault tolerance, manufacturing yield.

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Authors: Erh-Wen Hu, Cyril S. Ku, Andrew T. Russo, Bogong Su, Jian Wang

Abstract:

Unlike general-purpose processors, digital signal processors (DSP processors) are strongly application-dependent. To meet the needs for diverse applications, a wide variety of DSP processors based on different architectures ranging from the traditional to VLIW have been introduced to the market over the years. The functionality, performance, and cost of these processors vary over a wide range. In order to select a processor that meets the design criteria for an application, processor performance is usually the major concern for digital signal processing (DSP) application developers. Performance data are also essential for the designers of DSP processors to improve their design. Consequently, several DSP performance benchmarks have been proposed over the past decade or so. However, none of these benchmarks seem to have included recent new DSP applications. In this paper, we use a new benchmark that we recently developed to compare the performance of popular DSP processors from Texas Instruments and StarCore. The new benchmark is based on the Selectable Mode Vocoder (SMV), a speech-coding program from the recent third generation (3G) wireless voice applications. All benchmark kernels are compiled by the compilers of the respective DSP processors and run on their simulators. Weighted arithmetic mean of clock cycles and arithmetic mean of code size are used to compare the performance of five DSP processors. In addition, we studied how the performance of a processor is affected by code structure, features of processor architecture and optimization of compiler. The extensive experimental data gathered, analyzed, and presented in this paper should be helpful for DSP processor and compiler designers to meet their specific design goals.

Keywords: digital signal processors, DSP benchmark, instruction level parallelism, modified cyclomatic complexity, performance analysis.

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Authors: Ching-Shoei Chiang

Abstract:

The Malfatti’s problem solves the problem of fitting three circles into a right triangle such that these three circles are tangent to each other, and each circle is also tangent to a pair of the triangle’s sides. This problem has been extended to any triangle (called general Malfatti’s problem). Furthermore, the problem has been extended to have 1 + 2 + … + n circles inside the triangle with special tangency properties among circles and triangle sides; it is called the extended general Malfatti’s problem. In the extended general Malfatti’s problem, call it Tri(Tn), where Tn is the triangle number, there are closed-form solutions for the Tri(T₁) (inscribed circle) problem and Tri(T₂) (3 Malfatti’s circles) problem. These problems become more complex when n is greater than 2. In solving the Tri(Tn) problem, n > 2, algorithms have been proposed to solve these problems numerically. With a similar idea, this paper proposed an algorithm to find the radii of circles with the same tangency properties. Instead of the boundary of the triangle being a straight line, we use a convex circular arc as the boundary and try to find Tn circles inside this convex circular triangle with the same tangency properties among circles and boundary as in Tri(Tn) problems. We call these problems the Carc(Tn) problems. The algorithm is a mO(Tn) algorithm, where m is the number of iterations in the loop. It takes less than 1000 iterations and less than 1 second for the Carc(T16) problem, which finds 136 circles inside a convex circular triangle with specified tangency properties. This algorithm gives a solution for circle packing problem inside convex circular triangle with arbitrarily-sized circles. Many applications concerning circle packing may come from the result of the algorithm, such as logo design, architecture design, etc.

Keywords: Circle packing, computer-aided geometric design, geometric constraint solver, Malfatti’s problem.

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Authors: C. Patrascioiu, M. Jamali

Abstract:

The paper deals with the simulation of the crude distillation process using the Unisim Design simulator. The necessity of simulating this process is argued both by considerations related to the design of the crude distillation column, but also by considerations related to the design of advanced control systems. In order to use the Unisim Design simulator to simulate the crude distillation process, the identification of the simulators used in Romania and an analysis of the PRO/II, HYSYS, and Aspen HYSYS simulators were carried out. Analysis of the simulators for the crude distillation process has allowed the authors to elaborate the conclusions of the success of the crude modelling. A first aspect developed by the authors is the implementation of specific problems of petroleum liquid-vapors equilibrium using Unisim Design simulator. The second major element of the article is the development of the methodology and the elaboration of the simulation program for the crude distillation process, using Unisim Design resources. The obtained results validate the proposed methodology and will allow dynamic simulation of the process.  

Keywords: Crude oil, distillation, simulation, Unisim Design, simulators.

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Authors: Somayeh Timarchi, Keivan Navi

Abstract:

Efficient modulo 2n+1 adders are important for several applications including residue number system, digital signal processors and cryptography algorithms. In this paper we present a novel modulo 2n+1 addition algorithm for a recently represented number system. The proposed approach is introduced for the reduction of the power dissipated. In a conventional modulo 2n+1 adder, all operands have (n+1)-bit length. To avoid using (n+1)-bit circuits, the diminished-1 and carry save diminished-1 number systems can be effectively used in applications. In the paper, we also derive two new architectures for designing modulo 2n+1 adder, based on n-bit ripple-carry adder. The first architecture is a faster design whereas the second one uses less hardware. In the proposed method, the special treatment required for zero operands in Diminished-1 number system is removed. In the fastest modulo 2n+1 adders in normal binary system, there are 3-operand adders. This problem is also resolved in this paper. The proposed architectures are compared with some efficient adders based on ripple-carry adder and highspeed adder. It is shown that the hardware overhead and power consumption will be reduced. As well as power reduction, in some cases, power-delay product will be also reduced.

Keywords: Modulo 2n+1 arithmetic, residue number system, low power, ripple-carry adders.

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Authors: S. Ariffin, K. Hasnan, R.H. Weston

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A new generation of manufacturing machines so-called MIMCA (modular and integrated machine control architecture) capable of handling much increased complexity in manufacturing control-systems is presented. Requirement for more flexible and effective control systems for manufacturing machine systems is investigated and dimensioned-which highlights a need for improved means of coordinating and monitoring production machinery and equipment used to- transport material. The MIMCA supports simulation based on machine modeling, was conceived by the authors to address the issues. Essentially MIMCA comprises an organized unification of selected architectural frameworks and modeling methods, which include: NISTRCS, UMC and Colored Timed Petri nets (CTPN). The unification has been achieved; to support the design and construction of hierarchical and distributed machine control which realized the concurrent operation of reusable and distributed machine control components; ability to handle growing complexity; and support requirements for real- time control systems. Thus MIMCA enables mapping between 'what a machine should do' and 'how the machine does it' in a well-defined but flexible way designed to facilitate reconfiguration of machine systems.

Keywords: Machine control, architectures, Petri nets, modularity, modeling, simulation.

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Authors: Adil Salam, Nadia Bhuiyan, Gerard J. Gouw

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The Canadian aerospace industry faces many challenges. One of them is the difficulty in estimating costs. In particular, the design effort required in a project impacts resource requirements and lead-time, and consequently the final cost. This paper presents the findings of a case study conducted for recognized global leader in the design and manufacturing of aircraft engines. The study models parametric cost estimation relationships to estimate the design effort of integrated blade-rotor low-pressure compressor fans. Several effort drivers are selected to model the relationship. Comparative analyses of three types of models are conducted. The model with the best accuracy and significance in design estimation is retained.

Keywords: Effort estimation, design, aerospace.

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Authors: Mohsen Hayati, Zahra Mohebi

Abstract:

In this paper, the application of neural networks to study the design of short-term temperature forecasting (STTF) Systems for Kermanshah city, west of Iran was explored. One important architecture of neural networks named Multi-Layer Perceptron (MLP) to model STTF systems is used. Our study based on MLP was trained and tested using ten years (1996-2006) meteorological data. The results show that MLP network has the minimum forecasting error and can be considered as a good method to model the STTF systems.

Keywords: Artificial neural networks, Forecasting, Weather, Multi-layer perceptron.

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Authors: Jehad Al Dallal

Abstract:

Software engineers apply different measures to quantify the quality of software design. These measures consider artifacts developed at low or high level software design phases. The results are used to point to design weaknesses and to indicate design points that have to be restructured. Understanding the relationship among the quality measures and among the design quality aspects considered by these measures is important to interpreting the impact of a measure for a quality aspect on other potentially related aspects. In addition, exploring the relationship between quality measures helps to explain the impact of different quality measures on external quality aspects, such as reliability and maintainability. In this paper, we report a replication study that empirically explores the correlation between six well known and commonly applied design quality measures. These measures consider several quality aspects, including complexity, cohesion, coupling, and inheritance. The results indicate that inheritance measures are weakly correlated to other measures, whereas complexity, coupling, and cohesion measures are mostly strongly correlated.  

Keywords: Quality attribute, quality measure, software design quality, spearman correlation.

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Authors: V. H. Mankar, T. S. Das, S. K. Sarkar

Abstract:

In this paper, we have proposed a novel blind watermarking architecture towards its hardware implementation in VLSI. In order to facilitate this hardware realization, cellular automata (CA) concept is introduced. The CA has been already accepted as an attractive structure for VLSI implementation because of its modularity, parallelism, high performance and reliability. The hardware realizable multiresolution spread spectrum watermarking techniques are very few in numbers in spite of their best ever resiliency against signal impairments. This is because of the computational cost and complexity associated with their different filter banks and lifting techniques. The concept of cellular automata theory in order to form a new transform domain technique i.e. Cellular Automata Transform (CAT) have been incorporated. Since CA provides spreading sequences having very low cross-correlation properties, the CA based pseudorandom sequence generator is considered in the present work. Considering the watermarking technique as a digital communication process, an error control coding (ECC) must be incorporated in the data hiding schemes. Besides the hardware implementation of entire CA based data hiding technique, the individual blocks of the algorithm using CA provide the best result than that of some other methods irrespective of the hardware and software technique. The Cellular Automata Transform, CA based PN sequence generator, and CA ECC are the requisite blocks that are developed not only to meet the reliable hardware requirements but also for the basic spread spectrum watermarking features. The proposed algorithm shows statistical invisibility and resiliency against various common signal-processing operations. This algorithmic design utilizes the existing allocated bandwidth in the data transmission channel in a more efficient manner.

Keywords: Cellular automata, watermarking, error control coding, PN sequence, VLSI.

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Authors: Moorthi S., Meganathan D., Janarthanan D., Praveen Kumar P., J. Raja paul perinbam

Abstract:

An efficient architecture for low jitter All Digital Phase Locked Loop (ADPLL) suitable for high speed SoC applications is presented in this paper. The ADPLL is designed using standard cells and described by Hardware Description Language (HDL). The ADPLL implemented in a 90 nm CMOS process can operate from 10 to 200 MHz and achieve worst case frequency acquisition in 14 reference clock cycles. The simulation result shows that PLL has cycle to cycle jitter of 164 ps and period jitter of 100 ps at 100MHz. Since the digitally controlled oscillator (DCO) can achieve both high resolution and wide frequency range, it can meet the demands of system-level integration. The proposed ADPLL can easily be ported to different processes in a short time. Thus, it can reduce the design time and design complexity of the ADPLL, making it very suitable for System-on-Chip (SoC) applications.

Keywords: All Digital Phase Locked Loop (ADPLL), Systemon-Chip (SoC), Phase Locked Loop (PLL), Very High speedIntegrated Circuit (VHSIC) Hardware Description Language(VHDL), Digitally Controlled Oscillator (DCO), Phase frequencydetector (PFD) and Voltage Controlled Oscillator (VCO).

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Authors: Palang Wongtanasuporn

Abstract:

Rural villagers in Thailand have unique skill for producing craft using local materials. However, the appearance and function of their products are not suited to the demand of international market. The Thai government policy on sustainable economy emphasises the necessity to incorporate a design strategy that will draw out the unique qualities and add value to the products, while raising the satisfaction of international consumer. As an industrial designer, the author sees opportunities that design can enhance sustainability of Thai local products through the potentials that available in village-based enterprises. This research attempts to address, how best use design to practically solve the problems in the development of Thais product in. The privilege solution is expressed through the design of design strategy that supports sustain economic development of microenterprise in Thailand in the way that aligns with product design development. This consideration integrates together with global business outlook in the development of products from rural communities.

Keywords: Community Development, Sufficiency Economy Philosophy, Product Design, Strategy Management.

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Authors: Ying-Ming Su

Abstract:

Fujian earthen building which was known as a classic for ecological buildings was listed on the world heritage in 2008 (UNESCO) in China. Its design strategy can be applied to modern architecture planning and design. This study chose two different cases (Round Atrium: Er-Yi Building, Double Round Atrium: Zhen-Chen Building) of earthen building in Fu-Jian to compare the ventilation effects of different atrium forms. We adopt field measurements and computational fluid dynamics (CFD) simulation of temperature, humidity, and wind environment to identify the relationship between external environment and atrium about comfort and to confirm the relationship about atrium H/W (height/width). Results indicate that, through the atrium convection effect, it makes the natural wind guides to each space surrounded and keeps indoor comfort. It illustrates that the smaller the ratio of the H/W which is the relationship between the height and the width of an atrium is, the greater the wind speed generated within the street valley. Moreover, the wind speed is very close to the reference wind speed. This field measurement verifies that the value of H/W has great influence of solar radiation heat and sunshine shadows. The ventilation efficiency is: Er-Yi Building (H/W =0.2778) > Zhen-Chen Building (H/W=0.3670). Comparing the cases with the same shape but with different H/W, through the different size patios, airflow revolves in the atriums and can be brought into each interior space. The atrium settings meet the need of building ventilation, and can adjust the humidity and temperature within the buildings. It also creates good ventilation effect.

Keywords: Traditional folk houses, Atrium, Earthen building, Ventilation, Building microclimate, PET.

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Authors: Peyman Honarmandi, Mazen Alhirsh

Abstract:

Banner towing is a major form of advertisement. It consists of a banner showing a logo or a selection of words or letters being towed by an aircraft. Traditionally bush planes have been used to tow banners given their high thrust capabilities, however, with the development of Remote-Controlled (RC) aircraft, they could be a good replacement as RC planes mitigate the risk of human life and can be easier to operate. This paper studies the best banner design to be towed by an RC aircraft. This is done by conducting wind tunnel testing on an array of banners with different materials and designs. A pull gauge is used to record the drag force during testing which is then used to calculate the coefficient of drag, Cd. The testing results show that the best banner design would be a hybrid design with a solid and mesh material. The design with the lowest Cd of 0.082 was a half ripstop nylon half polyester mesh design. On the other hand, the design with highest Cd of 0.305 involved incorporating a tail chute to decrease fluttering.

Keywords: Aerodynamics of banner, banner design, banner towing, drag coefficients of banner, RC aircraft banner.

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Authors: Wann-Ming Wey

Abstract:

The link between urban planning and design principles and the built environment of an urban renewal area is of interest to the field of urban studies. During the past decade, there has also been increasing interest in urban planning and design; this interest is motivated by the possibility that design policies associated with the built environment can be used to control, manage, and shape individual activity and behavior. However, direct assessments and design techniques of the links between how urban planning design policies influence individuals are still rare in the field. Recent research efforts in urban design have focused on the idea that land use and design policies can be used to increase the quality of design projects for an urban renewal area-s built environment. The development of appropriate design techniques for the built environment is an essential element of this research. Quality function deployment (QFD) is a powerful tool for improving alternative urban design and quality for urban renewal areas, and for procuring a citizen-driven quality system. In this research, we propose an integrated framework based on QFD and an Analytic Network Process (ANP) approach to determine the Alternative Technical Requirements (ATRs) to be considered in designing an urban renewal planning and design alternative. We also identify the research designs and methodologies that can be used to evaluate the performance of urban built environment projects. An application in an urban renewal built environment planning and design project evaluation is presented to illustrate the proposed framework.

Keywords: Analytic Network Process, Built Environment, Quality Function Deployment, Urban Design, Urban Renewal.

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Authors: Somsri Binraman, Boonliang Kaewnapan, Krittika Tanprasert

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In the package design industry, there are a lot of tacit knowledge resided within each designer. The objectives are to capture them and compile it to be used as a teaching resource and to create a video clip of package design process as well as to evaluate its quality and learning effectiveness. Interview were used as a technique for capturing knowledge in brand design concept, differentiation, recognition, rank of recognition factor, consumer survey, knowledge about marketing, research, graphic design, the effect of color, and law and regulation. Video clip about package design were created. The clip consisted of both the speech and clip of actual process. The quality of the video in term of media was ranked as good while the content was ranked as excellent. The students- score on post-test was significantly greater than that of pretest (p>0.001).

Keywords: Tacit knowledge, interview, video, packaging, design.

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Authors: A. Danbaba

Abstract:

Samurai Sudoku consists of five Sudoku square designs each having nine treatments in each row (column or sub-block) only once such the five Sudoku designs overlaps. Two or more Samurai designs can be joint together to give an extended Samurai design. In addition, two Samurai designs, each containing five Sudoku square designs, are mutually orthogonal (Graeco). If we superimpose two Samurai designs and obtained a pair of Latin and Greek letters in each row (column or sub-block) of the five Sudoku designs only once, then we have Graeco Samurai design. In this paper, simple method of constructing Samurai designs and mutually orthogonal Samurai design are proposed. In addition, linear models and methods of data analysis for the designs are proposed.

Keywords: Samurai design, Graeco samurai design, sudoku design, row or column swap.

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Authors: Wiroon Sriborrirux, Sorakrai Kraipui, Nakorn Indra-Payoong

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One of the most importance of intelligence in-car and roadside systems is the cooperative vehicle-infrastructure system. In Thailand, ITS technologies are rapidly growing and real-time vehicle information is considerably needed for ITS applications; for example, vehicle fleet tracking and control and road traffic monitoring systems. This paper defines the communication protocols and software design for middleware components of B-VIS (Burapha Vehicle-Infrastructure System). The proposed B-VIS middleware architecture serves the needs of a distributed RFID sensor network and simplifies some intricate details of several communication standards.

Keywords: Middleware, RFID sensor network, Cooperativevehicle-infrastructure system, Enterprise Java Bean.

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Authors: Feng-Yi Huang, Yuan-Jye Tseng

Abstract:

In the traditional concept of product life cycle management, the activities of design, manufacturing, and assembly are performed in a sequential way. The drawback is that the considerations in design may contradict the considerations in manufacturing and assembly. The different designs of components can lead to different assembly sequences. Therefore, in some cases, a good design may result in a high cost in the downstream assembly activities. In this research, an integrated design evaluation and assembly sequence planning model is presented. Given a product requirement, there may be several design alternative cases to design the components for the same product. If a different design case is selected, the assembly sequence for constructing the product can be different. In this paper, first, the designed components are represented by using graph based models. The graph based models are transformed to assembly precedence constraints and assembly costs. A particle swarm optimization (PSO) approach is presented by encoding a particle using a position matrix defined by the design cases and the assembly sequences. The PSO algorithm simultaneously performs design evaluation and assembly sequence planning with an objective of minimizing the total assembly costs. As a result, the design cases and the assembly sequences can both be optimized. The main contribution lies in the new concept of integrated design evaluation and assembly sequence planning model and the new PSO solution method. The test results show that the presented method is feasible and efficient for solving the integrated design evaluation and assembly planning problem. In this paper, an example product is tested and illustrated.

Keywords: assembly sequence planning, design evaluation, design for assembly, particle swarm optimization

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