Search results for: readout interface circuit (ROIC)
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2110

Search results for: readout interface circuit (ROIC)

2110 Design and Characterization of CMOS Readout Circuit for ISFET and ISE Based Sensors

Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Salleh, Tan Kong Yew

Abstract:

This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.

Keywords: readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics

Procedia PDF Downloads 299
2109 Performance of an Optical Readout Gas Chamber for Charged Particle Track

Authors: Jing Hu, Xiaoping Ouyang

Abstract:

We develop an optical readout gas chamber based on avalanche-induced scintillation for energetic charged particles track. The gas chamber is equipped with a Single Anode Wires (SAW) structure to produce intensive electric field when the measured particles are of low yield or even single. In the presence of an intensive electric field around the single anode, primary electrons, resulting from the incident charged particles when depositing the energy along the track, accelerate to the anode effectively and rapidly. For scintillation gasses, this avalanche of electrons induces multiplying photons comparing with the primary scintillation excited directly from particle energy loss. The electric field distribution for different shape of the SAW structure is analyzed, and finally, an optimal one is used to study the optical readout performance. Using CF4 gas and its mixture with the noble gas, the results indicate that the optical readout characteristics of the chamber are attractive for imaging. Moreover, images of particles track including single particle track from 5.485MeV alpha particles are successfully acquired. The track resolution is quite well for the reason that the electrons undergo less diffusion in the intensive electric field. With the simple and ingenious design, the optical readout gas chamber has a high sensitivity. Since neutrons can be converted to charged particles when scattering, this optical readout gas chamber can be applied to neutron measurement for dark matter, fusion research, and others.

Keywords: optical readout, gas chamber, charged particle track, avalanche-induced scintillation, neutron measurement

Procedia PDF Downloads 254
2108 Design and Simulation Interface Circuit for Piezoresistive Accelerometers with Offset Cancellation Ability

Authors: Mohsen Bagheri, Ahmad Afifi

Abstract:

This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on instrumentation amplifier and it is useful for reducing offset in Wheatstone bridge. The obtained gain is 645 with 1 μv/°c equivalent drift and 1.58 mw power consumption. A Schmitt trigger and multiplexer circuit control output node. A high speed counter is designed in this work. The proposed circuit is designed and simulated in 0.18 μm CMOS technology with 1.8 v power supply.

Keywords: piezoresistive accelerometer, zero offset, Schmitt trigger, bidirectional reversible counter

Procedia PDF Downloads 281
2107 Advanced Technologies for Detector Readout in Particle Physics

Authors: Y. Venturini, C. Tintori

Abstract:

Given the continuous demand for improved readout performances in particle and dark matter physics, CAEN SpA is pushing on the development of advanced technologies for detector readout. We present the Digitizers 2.0, the result of the success of the previous Digitizers generation, combined with expanded capabilities and a renovation of the user experience introducing the open FPGA. The first product of the family is the VX2740 (64 ch, 125 MS/s, 16 bit) for advanced waveform recording and Digital Pulse Processing, fitting with the special requirements of Dark Matter and Neutrino experiments. In parallel, CAEN is developing the FERS-5200 platform, a Front-End Readout System designed to read out large multi-detector arrays, such as SiPMs, multi-anode PMTs, silicon strip detectors, wire chambers, GEM, gas tubes, and others. This is a highly-scalable distributed platform, based on small Front-End cards synchronized and read out by a concentrator board, allowing to build extremely large experimental setup. We plan to develop a complete family of cost-effective Front-End cards tailored to specific detectors and applications. The first one available is the A5202, a 64-channel unit for SiPM readout based on CITIROC ASIC by Weeroc.

Keywords: dark matter, digitizers, front-end electronics, open FPGA, SiPM

Procedia PDF Downloads 105
2106 The Effect of Closed Circuit Television Image Patch Layout on Performance of a Simulated Train-Platform Departure Task

Authors: Aaron J. Small, Craig A. Fletcher

Abstract:

This study investigates the effect of closed circuit television (CCTV) image patch layout on performance of a simulated train-platform departure task. The within-subjects experimental design measures target detection rate and response latency during a CCTV visual search task conducted as part of the procedure for safe train dispatch. Three interface designs were developed by manipulating CCTV image patch layout. Eye movements, perceived workload and system usability were measured across experimental conditions. Task performance was compared to identify significant differences between conditions. The results of this study have not been determined.

Keywords: rail human factors, workload, closed circuit television, platform departure, attention, information processing, interface design

Procedia PDF Downloads 146
2105 Current Starved Ring Oscillator Image Sensor

Authors: Devin Atkin, Orly Yadid-Pecht

Abstract:

The continual demands for increasing resolution and dynamic range in CMOS image sensors have resulted in exponential increases in the amount of data that needs to be read out of an image sensor, and existing readouts cannot keep up with this demand. Interesting approaches such as sparse and burst readouts have been proposed and show promise, but at considerable trade-offs in other specifications. To this end, we have begun designing and evaluating various new readout topologies centered around an attempt to parallelize the sensor readout. In this paper, we have designed, simulated, and started testing a new light-controlled oscillator topology with dual column and row readouts. We expect the parallel readout structure to offer greater speed and alleviate the trade-off typical in this topology, where slow pixels present a major framerate bottleneck.

Keywords: CMOS image sensors, high-speed capture, wide dynamic range, light controlled oscillator

Procedia PDF Downloads 63
2104 Analysis of SCR-Based ESD Protection Circuit on Holding Voltage Characteristics

Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han

Abstract:

This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.

Keywords: electro-static discharge (ESD), silicon controlled rectifier (SCR), holding voltage, protection circuit

Procedia PDF Downloads 357
2103 Design of Wireless Readout System for Resonant Gas Sensors

Authors: S. Mohamed Rabeek, Mi Kyoung Park, M. Annamalai Arasu

Abstract:

This paper presents a design of a wireless read out system for tracking the frequency shift of the polymer coated piezoelectric micro electromechanical resonator due to gas absorption. The measure of this frequency shift indicates the percentage of a particular gas the sensor is exposed to. It is measured using an oscillator and an FPGA based frequency counter by employing the resonator as a frequency determining element in the oscillator. This system consists of a Gas Sensing Wireless Readout (GSWR) and an USB Wireless Transceiver (UWT). GSWR consists of an oscillator based on a trans-impedance sustaining amplifier, an FPGA based frequency readout, a sub 1GHz wireless transceiver and a micro controller. UWT can be plugged into the computer via USB port and function as a wireless module to transfer gas sensor data from GSWR to the computer through its USB port. GUI program running on the computer periodically polls for sensor data through UWT - GSWR wireless link, the response from GSWR is logged in a file for post processing as well as displayed on screen.

Keywords: gas sensor, GSWR, micromechanical system, UWT, volatile emissions

Procedia PDF Downloads 463
2102 Optimization of Cu (In, Ga)Se₂ Based Thin Film Solar Cells: Simulation

Authors: Razieh Teimouri

Abstract:

Electrical modelling of Cu (In,Ga)Se₂ thin film solar cells is carried out with compositionally graded absorber and CdS buffer layer. Simulation results are compared with experimental data. Surface defect layers (SDL) are located in CdS/CIGS interface for improving open circuit voltage simulated structure through the analysis of the interface is investigated with or without this layer. When SDL removed, by optimizing the conduction band offset (CBO) position of the buffer/absorber layers with its recombination mechanisms and also shallow donor density in the CdS, the open circuit voltage increased significantly. As a result of simulation, excellent performance can be obtained when the conduction band of window layer positions higher by 0.2 eV than that of CIGS and shallow donor density in the CdS was found about 1×10¹⁸ (cm⁻³).

Keywords: CIGS solar cells, thin film, SCAPS, buffer layer, conduction band offset

Procedia PDF Downloads 205
2101 Human Resource Management Practices, Person-Environment Fit and Financial Performance in Brazilian Publicly Traded Companies

Authors: Bruno Henrique Rocha Fernandes, Amir Rezaee, Jucelia Appio

Abstract:

The relation between Human Resource Management (HRM) practices and organizational performance remains the subject of substantial literature. Though many studies demonstrated positive relationship, still major influencing variables are not yet clear. This study considers the Person-Environment Fit (PE Fit) and its components, Person-Supervisor (PS), Person-Group (PG), Person-Organization (PO) and Person-Job (PJ) Fit, as possible explanatory variables. We analyzed PE Fit as a moderator between HRM practices and financial performance in the “best companies to work” in Brazil. Data from HRM practices were classified through the High Performance Working Systems (HPWS) construct and data on PE-Fit were obtained through surveys among employees. Financial data, consisting of return on invested capital (ROIC) and price earnings ratio (PER) were collected for publicly traded best companies to work. Findings show that PO Fit and PJ Fit play a significant moderator role for PER but not for ROIC.

Keywords: financial performance, human resource management, high performance working systems, person-environment fit

Procedia PDF Downloads 150
2100 Design Data Sorter Circuit Using Insertion Sorting Algorithm

Authors: Hoda Abugharsa

Abstract:

In this paper we propose to design a sorter circuit using insertion sorting algorithm. The circuit will be designed using Algorithmic State Machines (ASM) method. That means converting the insertion sorting flowchart into an ASM chart. Then the ASM chart will be used to design the sorter circuit and the control unit.

Keywords: insert sorting algorithm, ASM chart, sorter circuit, state machine, control unit

Procedia PDF Downloads 430
2099 An Application of Graph Theory to The Electrical Circuit Using Matrix Method

Authors: Samai'la Abdullahi

Abstract:

A graph is a pair of two set and so that a graph is a pictorial representation of a system using two basic element nodes and edges. A node is represented by a circle (either hallo shade) and edge is represented by a line segment connecting two nodes together. In this paper, we present a circuit network in the concept of graph theory application and also circuit models of graph are represented in logical connection method were we formulate matrix method of adjacency and incidence of matrix and application of truth table.

Keywords: euler circuit and path, graph representation of circuit networks, representation of graph models, representation of circuit network using logical truth table

Procedia PDF Downloads 535
2098 Simulation of Surge Protection for a Direct Current Circuit

Authors: Pedro Luis Ferrer Penalver, Edmundo da Silva Braga

Abstract:

In this paper, the performance of a simple surge protection for a direct current circuit was simulated. The protection circuit was developed from modified electric macro models of a gas discharge tube and a transient voltage suppressor diode. Moreover, a combination wave generator circuit was used as source of energy surges. The simulations showed that the circuit presented ensures immunity corresponding with test level IV of the IEC 61000-4-5:2014 international standard. The developed circuit can be modified to meet the requirements of any other equipment to be protected. Similarly, the parameters of the combination wave generator can be changed to provide different surge amplitudes.

Keywords: combination wave generator, IEC 61000-4-5, Pspice simulation, surge protection

Procedia PDF Downloads 306
2097 Realization of a Temperature Based Automatic Controlled Domestic Electric Boiling System

Authors: Shengqi Yu, Jinwei Zhao

Abstract:

This paper presents a kind of analog circuit based temperature control system, which is mainly composed by threshold control signal circuit, synchronization signal circuit and trigger pulse circuit. Firstly, the temperature feedback signal function is realized by temperature sensor TS503F3950E. Secondly, the main control circuit forms the cycle controlled pulse signal to control the thyristor switching model. Finally two reverse paralleled thyristors regulate the output power by their switching state. In the consequence, this is a modernized and energy-saving domestic electric heating system.

Keywords: time base circuit, automatic control, zero-crossing trigger, temperature control

Procedia PDF Downloads 452
2096 Equivalent Circuit Representation of Lossless and Lossy Power Transmission Systems Including Discrete Sampler

Authors: Yuichi Kida, Takuro Kida

Abstract:

In a new smart society supported by the recent development of 5G and 6G Communication systems, the im- portance of wireless power transmission is increasing. These systems contain discrete sampling systems in the middle of the transmission path and equivalent circuit representation of lossless or lossy power transmission through these systems is an important issue in circuit theory. In this paper, for the given weight function, we show that a lossless power transmission system with the given weight is expressed by an equivalent circuit representation of the Kida’s optimal signal prediction system followed by a reactance multi-port circuit behind it. Further, it is shown that, when the system is lossy, the system has an equivalent circuit in the form of connecting a multi-port positive-real circuit behind the Kida’s optimal signal prediction system. Also, for the convenience of the reader, in this paper, the equivalent circuit expression of the reactance multi-port circuit and the positive- real multi-port circuit by Cauer and Ohno, whose information is currently being lost even in the world of the Internet.

Keywords: signal prediction, pseudo inverse matrix, artificial intelligence, power transmission

Procedia PDF Downloads 99
2095 Metal-Oxide-Semiconductor-Only Process Corner Monitoring Circuit

Authors: Davit Mirzoyan, Ararat Khachatryan

Abstract:

A process corner monitoring circuit (PCMC) is presented in this work. The circuit generates a signal, the logical value of which depends on the process corner only. The signal can be used in both digital and analog circuits for testing and compensation of process variations (PV). The presented circuit uses only metal-oxide-semiconductor (MOS) transistors, which allow increasing its detection accuracy, decrease power consumption and area. Due to its simplicity the presented circuit can be easily modified to monitor parametrical variations of only n-type and p-type MOS (NMOS and PMOS, respectively) transistors, resistors, as well as their combinations. Post-layout simulation results prove correct functionality of the proposed circuit, i.e. ability to monitor the process corner (equivalently die-to-die variations) even in the presence of within-die variations.

Keywords: detection, monitoring, process corner, process variation

Procedia PDF Downloads 500
2094 Electrical Dault Detection of Photovoltaic System: A Short-Circuit Fault Case

Authors: Moustapha H. Ibrahim, Dahir Abdourahman

Abstract:

This document presents a short-circuit fault detection process in a photovoltaic (PV) system. The proposed method is developed in MATLAB/Simulink. It determines whatever the size of the installation number of the short circuit module. The proposed algorithm indicates the presence or absence of an abnormality on the power of the PV system through measures of hourly global irradiation, power output, and ambient temperature. In case a fault is detected, it displays the number of modules in a short circuit. This fault detection method has been successfully tested on two different PV installations.

Keywords: PV system, short-circuit, fault detection, modelling, MATLAB-Simulink

Procedia PDF Downloads 213
2093 The Effect of Circuit Training on Aerobic Fitness and Body Fat Percentage

Authors: Presto Tri Sambodo, Suharjana, Galih Yoga Santiko

Abstract:

Having an ideal body shape healthy body are the desire of everyone, both young and old. The purpose of this study was to determine: (1) the effect of block circuit training on aerobic fitness and body fat percentage, (2) the effect of non-block circuit training on aerobic fitness and body fat percentage, and (3) differences in the effect of exercise on block and non-circuit training block against aerobic fitness and body fat percentage. This research is an experimental research with the prestest posttest design Two groups design. The population in this study were 57 members of fat loss at GOR UNY Fitness Center. The retrieval technique uses purposive random sampling with a sample of 20 people. The instruments with rockport test (1.6 KM) and body fat percentage with a scale of bioelectrical impedance analysis omron (BIA). So it can be concluded the circuit training between block and non-block has a significant effect on aerobic fitness and body fat percentage. And for differences in the effect of circuit training between blocks and non-blocks, it is more influential on aerobic fitness than the percentage of body fat.

Keywords: circuit training, aerobic fitness, body fat percentage, healthy body

Procedia PDF Downloads 224
2092 Equivalent Circuit Modelling of Active Reflectarray Antenna

Authors: M. Y. Ismail, M. Inam

Abstract:

This paper presents equivalent circuit modeling of active planar reflectors which can be used for the detailed analysis and characterization of reflector performance in terms of lumped components. Equivalent circuit representation has been proposed for PIN diodes and liquid crystal based active planar reflectors designed within X-band frequency range. A very close agreement has been demonstrated between equivalent circuit results, 3D EM simulated results as well as measured scattering parameter results. In the case of measured results, a maximum discrepancy of 1.05dB was observed in the reflection loss performance, which can be attributed to the losses occurred during measurement process.

Keywords: Equivalent circuit modelling, planar reflectors, reflectarray antenna, PIN diode, liquid crystal

Procedia PDF Downloads 262
2091 An Analysis of OpenSim Graphical User Interface Effectiveness

Authors: Sina Saadati

Abstract:

OpenSim is a well-known software in biomechanical studies. There are worthy algorithms developed in this program which are used for modeling and simulation of human motions. In this research, we analyze the OpenSim application from the computer science perspective. It is important that every application have a user-friendly interface. An effective user interface can decrease the time, costs, and energy needed to learn how to use a program. In this paper, we survey the user interface of OpenSim as an important factor of the software. Finally, we infer that there are many challenges to be addressed in the development of OpenSim.

Keywords: biomechanics, computer engineering, graphical user interface, modeling and simulation, interface effectiveness

Procedia PDF Downloads 68
2090 On-Chip Aging Sensor Circuit Based on Phase Locked Loop Circuit

Authors: Ararat Khachatryan, Davit Mirzoyan

Abstract:

In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: aging effect, HCI, NBTI, nanoscale

Procedia PDF Downloads 339
2089 A Novel Idea to Benefit of the Load Side’s Harmonics

Authors: Hussein Al-bayaty

Abstract:

This paper presents a novel idea to show the ability to benefit of the harmonic currents which are produced on the load side of the power grid. The proposed circuit contributes in reduction of the total harmonic distortion (THD) percentage through adding a high pass filter to draw harmonic currents with 150 Hz and multiple frequencies a and convert them to DC current and then reconvert it to AC current with 50 Hz frequency in order to feed different loads. The circuit has been designed, investigated and simulated in the MATLAB, Simulink program; the results will be assessed and compared the two cases: firstly, the system without adding the new circuit. Secondly, with adding the high pas filter circuit to the power system.

Keywords: harmonics elimination, passive filters, Total Harmonic Distortion (THD), filter circuit

Procedia PDF Downloads 391
2088 Effect of Feed Rate on Grinding Circuits and Cyclone Efficiency

Authors: Patel Himeshkumar Ashokbhai, Suchit Sharma, Arvind Kumar Garg

Abstract:

The purpose of this paper is to study the effect of change in feed rate on grinding circuit and cyclone efficiency in case of lead-zinc ore. The following experiments and analysis were conducted on beneficiation circuit of Sindesar Khurd (SK) mines under Hindustan Zinc Ltd. subsidiary of Vedanta Group of Companies, a leading producer of lead-Zinc, silver and cadmium (as by products) in India. Feed rate is an important variable in beneficiation circuit operation. Optimizing feed rate is indispensable for any grinding circuit and directly effects cyclone efficiency. The size analysis of ore in grinding circuit along with cyclone efficiency on varying feed rates establishes their interdependence. Feed rate determines retention time ore gets within grinding circuit. Retention time in turn determines degree of liberation of mineral. Inadequate liberation causes decreased circuit efficiency. In this paper we have studied the effect of varying feed rate on (1) D80 particle size of different sections of different streams of grinding circuit (2) Re-circulating load (3) Cyclone efficiency. As a conclusion, this study gives some clues to operate grinding circuits and hydro-cyclones in more efficient way regarding beneficiation of Lead-zinc ore.

Keywords: cyclone efficiency, feed rate, grinding circuit, re-circulating load

Procedia PDF Downloads 380
2087 Combined Influence of Charge Carrier Density and Temperature on Open-Circuit Voltage in Bulk Heterojunction Organic Solar Cells

Authors: Douglas Yeboah, Monishka Narayan, Jai Singh

Abstract:

One of the key parameters in determining the power conversion efficiency (PCE) of organic solar cells (OSCs) is the open-circuit voltage, however, it is still not well understood. In order to examine the performance of OSCs, it is necessary to understand the losses associated with the open-circuit voltage and how best it can be improved. Here, an analytical expression for the open-circuit voltage of bulk heterojunction (BHJ) OSCs is derived from the charge carrier densities without considering the drift-diffusion current. The open-circuit voltage thus obtained is dependent on the donor-acceptor band gap, the energy difference between the highest occupied molecular orbital (HOMO) and the hole quasi-Fermi level of the donor material, temperature, the carrier density (electrons), the generation rate of free charge carriers and the bimolecular recombination coefficient. It is found that open-circuit voltage increases when the carrier density increases and when the temperature decreases. The calculated results are discussed in view of experimental results and agree with them reasonably well. Overall, this work proposes an alternative pathway for improving the open-circuit voltage in BHJ OSCs.

Keywords: charge carrier density, open-circuit voltage, organic solar cells, temperature

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2086 Development of 35kV SF6 Phase-Control Circuit Breaker Equipped with EFDA

Authors: Duanlei Yuan, Guangchao Yan, Zhanqing Chen, Xian Cheng

Abstract:

This paper mainly focuses on the problem that high voltage circuit breaker’s closing and opening operation at random phase brings harmful electromagnetic transient effects on the power system. To repress the negative transient effects, a 35 kV SF6 phase-control circuit breaker equipped with electromagnetic force driving actuator is designed in this paper. Based on the constructed mathematical and structural models, the static magnetic field distribution and dynamic properties of the under loading actuator are simulated. The prototype of 35 kV SF6 phase-control circuit breaker is developed based on theories analysis and simulation. Tests are carried on to verify the operating reliability of the prototype. The developed circuit breaker can control its operating speed intelligently and switches with phase selection. Results of the tests and simulation prove that the phase-control circuit breaker is feasible for industrial applications.

Keywords: phase-control, circuit breaker, electromagnetic force driving actuator, tests and simulation

Procedia PDF Downloads 375
2085 A Silicon Controlled Rectifier-Based ESD Protection Circuit with High Holding Voltage and High Robustness Characteristics

Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

Abstract:

In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

Procedia PDF Downloads 377
2084 Designing and Simulation of a CMOS Square Root Analog Multiplier

Authors: Milad Kaboli

Abstract:

A new CMOS low voltage current-mode four-quadrant analog multiplier based on the squarer circuit with voltage output is presented. The proposed circuit is composed of a pair of current subtractors, a pair differential-input V-I converters and a pair of voltage squarers. The circuit was simulated using HSPICE simulator in standard 0.18 μm CMOS level 49 MOSIS (BSIM3 V3.2 SPICE-based). Simulation results show the performance of the proposed circuit and experimental results are given to confirm the operation. This topology of multiplier results in a high-frequency capability with low power consumption. The multiplier operates for a power supply ±1.2V. The simulation results of analog multiplier demonstrate a THD of 0.65% in 10MHz, a −3dB bandwidth of 1.39GHz, and a maximum power consumption of 7.1mW.

Keywords: analog processing circuit, WTA, LTA, low voltage

Procedia PDF Downloads 458
2083 Interactive Multiple Functions User Interface

Authors: Manjit Singh Sidhu, Waleed Maqableh, Jee Geak Ying

Abstract:

Tangible user interfaces (TUI) that employ markers in the augmented reality (AR) environment has hampered the interactivity between the user and the software application. This is because the user lacks focus on visualizing the contents due to the interaction mechanisms whereby multiple markers may need to be used to perform a particular function. In this research, we have designed a novel TUI user interface where multiple functions could be triggered similar to a natural keyboard thus allowing user to focus more on its digital contents such as 2D/3D, text input, animation and sound. Test results of the user interface with potential users and HCI experts revealed that the multiple functions user interface was new, preferred and appreciated more as opposed to marker based user interface.

Keywords: multimedia, augmented reality, engineering, user interface, visualization

Procedia PDF Downloads 421
2082 The Performance of Typical Kinds of Coating of Printed Circuit Board under Accelerated Degradation Test

Authors: Xiaohui Wang, Liwei Sun, Guilin Zhang

Abstract:

Printed circuit board (PCB) is the carrier of electronic components. Its coating is the first barrier for protecting itself. If the coating is damaged, the performance of printed circuit board will decrease rapidly until failure. Therefore, the coating plays an important role in the entire printed circuit board. There are common four kinds of coating of printed circuit board that the material of the coatings are paryleneC, acrylic, polyurethane, silicone. In this paper, we designed an accelerated degradation test of humid and heat for these four kinds of coating. And chose insulation resistance, moisture absorption and surface morphology as its test indexes. By comparing the change of insulation resistance of the coating before and after the test, we estimate failure time of these coatings based on the degradation of insulation resistance. Based on the above, we estimate the service life of the four kinds of PCB.

Keywords: printed circuit board, life assessment, insulation resistance, coating material

Procedia PDF Downloads 507
2081 Feasibilities for Recovering of Precious Metals from Printed Circuit Board Waste

Authors: Simona Ziukaite, Remigijus Ivanauskas, Gintaras Denafas

Abstract:

Market development of electrical and electronic equipment and a short life cycle is driven by the increasing waste streams. Gold Au, copper Cu, silver Ag and palladium Pd can be found on printed circuit board. These metals make up the largest value of printed circuit board. Therefore, the printed circuit boards scrap is valuable as potential raw material for precious metals recovery. A comparison of Cu, Au, Ag, Pd recovery from waste printed circuit techniques was selected metals leaching of chemical reagents. The study was conducted using the selected multistage technique for Au, Cu, Ag, Pd recovery of printed circuit board. In the first and second metals leaching stages, as the elution reagent, 2M H2SO4 and H2O2 (35%) was used. In the third stage, leaching of precious metals used solution of 20 g/l of thiourea and 6 g/l of Fe2 (SO4)3. Verify the efficiency of the method was carried out the metals leaching test with aqua regia. Based on the experimental study, the leaching efficiency, using the preferred methodology, 60 % of Au and 85,5 % of Cu dissolution was achieved. Metals leaching efficiency after waste mechanical crushing and thermal treatment have been increased by 1,7 times (40 %) for copper, 1,6 times (37 %) for gold and 1,8 times (44 %) for silver. It was noticed that, the Au amount in old (> 20 years) waste is 17 times more, Cu amount - 4 times more, and Ag - 2 times more than in the new (< 1 years) waste. Palladium in the new printed circuit board waste has not been found, however, it was established that from 1 t of old printed circuit board waste can be recovered 1,064 g of Pd (leaching with aqua regia). It was found that from 1 t of old printed circuit board waste can be recovered 1,064 g of Ag. Precious metals recovery in Lithuania was estimated in this study. Given the amounts of generated printed circuit board waste, the limits for recovery of precious metals were identified.

Keywords: leaching efficiency, limits for recovery, precious metals recovery, printed circuit board waste

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