Search results for: full-wave fully gate cross-coupled rectifiers CMOS rectifier
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2121

Search results for: full-wave fully gate cross-coupled rectifiers CMOS rectifier

1941 Survey to Assess the Feasibility of Executing the Web-Based Collaboration Process Using WBCS

Authors: Mohamed A. Sullabi

Abstract:

The importance of the formal specification in the software life cycle is barely concealing to anyone. Formal specifications use mathematical notation to describe the properties of information system precisely, without unduly constraining the way in how these properties are achieved. Having a correct and quality software specification is not easy task. This study concerns with how a group of rectifiers can communicate with each other and work to prepare and produce a correct formal software specification. WBCS has been implemented based mainly in the proposed supported cooperative work model and a survey conducted on the existing Webbased collaborative writing tools. This paper aims to assess the feasibility of executing the web-based collaboration process using WBCS. The purpose of conducting this test is to test the system as a whole for functionality and fitness for use based on the evaluation test plan.

Keywords: formal methods, formal specifications, collaborative writing, usability testing

Procedia PDF Downloads 371
1940 A High Time Resolution Digital Pulse Width Modulator Based on Field Programmable Gate Array’s Phase Locked Loop Megafunction

Authors: Jun Wang, Tingcun Wei

Abstract:

The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.

Keywords: DPWM, digitally-controlled DC-DC switching converter, FPGA, PLL megafunction, time resolution

Procedia PDF Downloads 447
1939 Classification of Myoelectric Signals Using Multilayer Perceptron Neural Network with Back-Propagation Algorithm in a Wireless Surface Myoelectric Prosthesis of the Upper-Limb

Authors: Kevin D. Manalo, Jumelyn L. Torres, Noel B. Linsangan

Abstract:

This paper focuses on a wireless myoelectric prosthesis of the upper-limb that uses a Multilayer Perceptron Neural network with back propagation. The algorithm is widely used in pattern recognition. The network can be used to train signals and be able to use it in performing a function on their own based on sample inputs. The paper makes use of the Neural Network in classifying the electromyography signal that is produced by the muscle in the amputee’s skin surface. The gathered data will be passed on through the Classification Stage wirelessly through Zigbee Technology. The signal will be classified and trained to be used in performing the arm positions in the prosthesis. Through programming using Verilog and using a Field Programmable Gate Array (FPGA) with Zigbee, the EMG signals will be acquired and will be used for classification. The classified signal is used to produce the corresponding Hand Movements (Open, Pick, Hold, and Grip) through the Zigbee controller. The data will then be processed through the MLP Neural Network using MATLAB which then be used for the surface myoelectric prosthesis. Z-test will be used to display the output acquired from using the neural network.

Keywords: field programmable gate array, multilayer perceptron neural network, verilog, zigbee

Procedia PDF Downloads 361
1938 A Fully Coupled Thermo-Hydraulic Mechanical Elastoplastic Damage Constitutive Model for Porous Fractured Medium during CO₂ Injection

Authors: Nikolaos Reppas, Yilin Gui

Abstract:

A dual-porosity finite element-code will be presented for the stability analysis of the wellbore during CO₂ injection. An elastoplastic damage response will be considered to the model. The Finite Element Method (FEM) will be validated using experimental results from literature or from experiments that are planned to be undertaken at Newcastle University. The main target of the research paper is to present a constitutive model that can help industries to safely store CO₂ in geological rock formations and forecast any changes on the surrounding rock of the wellbore. The fully coupled elastoplastic damage Thermo-Hydraulic-Mechanical (THM) model will determine the pressure and temperature of the injected CO₂ as well as the size of the radius of the wellbore that can make the Carbon Capture and Storage (CCS) procedure more efficient.

Keywords: carbon capture and storage, Wellbore stability, elastoplastic damage response for rock, constitutive THM model, fully coupled thermo-hydraulic-mechanical model

Procedia PDF Downloads 144
1937 Dams Operation Management Criteria during Floods: Case Study of Dez Dam in Southwest Iran

Authors: Ali Heidari

Abstract:

This paper presents the principles for improving flood mitigation operation in multipurpose dams and maximizing reservoir performance during flood occurrence with a focus on the real-time operation of gated spillways. The criteria of operation include the safety of dams during flood management, minimizing the downstream flood risk by decreasing the flood hazard and fulfilling water supply and other purposes of the dam operation in mid and long terms horizons. The parameters deemed to be important include flood inflow, outlet capacity restrictions, downstream flood inundation damages, economic revenue of dam operation, and environmental and sedimentation restrictions. A simulation model was used to determine the real-time release of the Dez dam located in the Dez rivers in southwest Iran, considering the gate regulation curves for the gated spillway. The results of the simulation model show that there is a possibility to improve the current procedures used in the real-time operation of the dams, particularly using gate regulation curves and early flood forecasting system results. The Dez dam operation data shows that in one of the best flood control records, % 17 of the total active volume and flood control pool of the reservoir have not been used in decreasing the downstream flood hazard despite the availability of a flood forecasting system.

Keywords: dam operation, flood control criteria, Dez dam, Iran

Procedia PDF Downloads 195
1936 Field-Programmable Gate Arrays Based High-Efficiency Oriented Fast and Rotated Binary Robust Independent Elementary Feature Extraction Method Using Feature Zone Strategy

Authors: Huang Bai-Cheng

Abstract:

When deploying the Oriented Fast and Rotated Binary Robust Independent Elementary Feature (BRIEF) (ORB) extraction algorithm on field-programmable gate arrays (FPGA), the access of global storage for 31×31 pixel patches of the features has become the bottleneck of the system efficiency. Therefore, a feature zone strategy has been proposed. Zones are searched as features are detected. Pixels around the feature zones are extracted from global memory and distributed into patches corresponding to feature coordinates. The proposed FPGA structure is targeted on a Xilinx FPGA development board of Zynq UltraScale+ series, and multiple datasets are tested. Compared with the streaming pixel patch extraction method, the proposed architecture obtains at least two times acceleration consuming extra 3.82% Flip-Flops (FFs) and 7.78% Look-Up Tables (LUTs). Compared with the non-streaming one, the proposed architecture saves 22.3% LUT and 1.82% FF, causing a latency of only 0.2ms and a drop in frame rate for 1. Compared with the related works, the proposed strategy and hardware architecture have the superiority of keeping a balance between FPGA resources and performance.

Keywords: feature extraction, real-time, ORB, FPGA implementation

Procedia PDF Downloads 89
1935 The Ultimate Scaling Limit of Monolayer Material Field-Effect-Transistors

Authors: Y. Lu, L. Liu, J. Guo

Abstract:

Monolayer graphene and dichaclogenide semiconductor materials attract extensive research interest for potential nanoelectronics applications. The ultimate scaling limit of double gate MoS2 Field-Effect-Transistors (FETs) with a monolayer thin body is examined and compared with ultra-thin-body Si FETs by using self-consistent quantum transport simulation in the presence of phonon scattering. Modelling of phonon scattering, quantum mechanical effects, and self-consistent electrostatics allows us to accurately assess the performance potential of monolayer MoS2 FETs. The results revealed that monolayer MoS2 FETs show 52% smaller Drain Induced Barrier Lowering (DIBL) and 13% Smaller Sub-Threshold Swing (SS) than 3 nm-thick-body Si FETs at a channel length of 10 nm with the same gating. With a requirement of SS<100mV/dec, the scaling limit of monolayer MoS2 FETs is assessed to be 5 nm, comparing with 8nm of the ultra-thin-body Si counterparts due to the monolayer thin body and higher effective mass which reduces direct source-to-drain tunnelling. By comparing with the ITRS target for high performance logic devices of 2023; double gate monolayer MoS2 FETs can fulfil the ITRS requirements.

Keywords: nanotransistors, monolayer 2D materials, quantum transport, scaling limit

Procedia PDF Downloads 206
1934 Primes as Sums and Differences of Two Binomial Coefficients and Two Powersums

Authors: Benjamin Lee Warren

Abstract:

Many problems exist in additive number theory which is essential to determine the primes that are the sum of two elements from a given single-variable polynomial sequence, and most of them are unattackable in the present day. Here, we determine solutions for this problem to a few certain sequences (certain binomial coefficients and power sums) using only elementary algebra and some algebraic factoring methods (as well as Euclid’s Lemma and Faulhaber’s Formula). In particular, we show that there are finitely many primes as sums of two of these types of elements. Several cases are fully illustrated, and bounds are presented for the cases not fully illustrated.

Keywords: binomial coefficients, power sums, primes, algebra

Procedia PDF Downloads 64
1933 Agile Real-Time Field Programmable Gate Array-Based Image Processing System for Drone Imagery in Digital Agriculture

Authors: Sabiha Shahid Antora, Young Ki Chang

Abstract:

Along with various farm management technologies, imagery is an important tool that facilitates crop assessment, monitoring, and management. As a consequence, drone imaging technology is playing a vital role to capture the state of the entire field for yield mapping, crop scouting, weed detection, and so on. Although it is essential to inspect the cultivable lands in real-time for making rapid decisions regarding field variable inputs to combat stresses and diseases, drone imagery is still evolving in this area of interest. Cost margin and post-processing complexions of the image stream are the main challenges of imaging technology. Therefore, this proposed project involves the cost-effective field programmable gate array (FPGA) based image processing device that would process the image stream in real-time as well as providing the processed output to support on-the-spot decisions in the crop field. As a result, the real-time FPGA-based image processing system would reduce operating costs while minimizing a few intermediate steps to deliver scalable field decisions.

Keywords: real-time, FPGA, drone imagery, image processing, crop monitoring

Procedia PDF Downloads 84
1932 Three-Level Converters Back-To-Back DC Bus Control for Torque Ripple Reduction of Induction Motor

Authors: T. Abdelkrim, K. Benamrane, B. Bezza, Aeh Benkhelifa, A. Borni

Abstract:

This paper proposes a regulation method of back-to-back connected three-level converters in order to reduce the torque ripple in induction motor. First part is dedicated to the presentation of the feedback control of three-level PWM rectifier. In the second part, three-level NPC voltage source inverter balancing DC bus algorithm is presented. A theoretical analysis with a complete simulation of the system is presented to prove the excellent performance of the proposed technique.

Keywords: back-to-back connection, feedback control, neutral-point balance, three-level converter, torque ripple

Procedia PDF Downloads 468
1931 SCR-Based Advanced ESD Protection Device for Low Voltage Application

Authors: Bo Bae Song, Byung Seok Lee, Hyun young Kim, Chung Kwang Lee, Yong Seo Koo

Abstract:

This paper proposed a silicon controller rectifier (SCR) based ESD protection device to protect low voltage ESD for integrated circuit. The proposed ESD protection device has low trigger voltage and high holding voltage compared with conventional SCR-based ESD protection devices. The proposed ESD protection circuit is verified and compared by TCAD simulation. This paper verified effective low voltage ESD characteristics with low trigger voltage of 5.79V and high holding voltage of 3.5V through optimization depending on design variables (D1, D2, D3, and D4).

Keywords: ESD, SCR, holding voltage, latch-up

Procedia PDF Downloads 537
1930 Colour Characteristics of Dried Cocoa Using Shallow Box Fermentation Technique

Authors: Khairul Bariah Sulaiman, Tajul Aris Yang

Abstract:

Fermentation is well known as an essential process in cocoa beans. Besides to develop the precursor of cocoa flavour, it also induce the colour changes in the beans.The fermentation process is reported to be influenced by duration of pod storage and fermentation. Therefore, this study was conducted to evaluate colour of Malaysian cocoa beans and how the pods storage and fermentation duration using shallow box technique will effect on it characteristics. There are two factors being studied ie duration of cocoa pod storage (0, 2, 4, and 6 days) and duration of cocoa fermentation (0, 1, 2, 3, 4 and 5 days). The experiment is arranged in 4 x 6 factorial design with 24 treatments and arrangement is in a Completely Randomised Design (CRD). The produced beans is inspected for colour changes under artificial light during cut test and divided into four groups of colour namely fully brown, purple brown, fully purple and slaty. Cut tests indicated that cocoa beans which are directly dried without undergone fermentation has the highest slaty percentage. However, application of pods storage before fermentation process is found to decrease the slaty percentage. In contrast, the percentages of fully brown beans start to dominate after two days of fermentation, especially from four and six days of pods storage batch. Whereas, almost all batch have percentage of fully purple less than 20%. Interestingly, the percentage of purple brown beans are scattered in the entire beans batch regardless any specific trend. Meanwhile, statistical analysis using General Linear Model showed that the pods storage has a significant effect on the colour characteristic of the Malaysian dried beans compared to fermentation duration.

Keywords: cocoa beans, colour, fermentation, shallow box

Procedia PDF Downloads 455
1929 Uncovering the Role of Crystal Phase in Determining Nonvolatile Flash Memory Device Performance Based on 2D Van Der Waals Heterostructures

Authors: Yunpeng Xia, Jiajia Zha, Haoxin Huang, Hau Ping Chan, Chaoliang Tan

Abstract:

Although the crystal phase of two-dimensional (2D) transition metal dichalcogenides (TMDs) has been proven to play an essential role in fabricating high-performance electronic devices in the past decade, its effect on the performance of 2D material-based flash memory devices still remains unclear. Here, we report the exploration of the effect of MoTe₂ in different phases as the charge trapping layer on the performance of 2D van der Waals (vdW) heterostructure-based flash memory devices, where the metallic 1T′-MoTe₂ or semiconducting 2H-MoTe₂ nanoflake is used as the floating gate. By conducting comprehensive measurements on the two kinds of vdW heterostructure-based devices, the memory device based on MoS2/h-BN/1T′-MoTe₂ presents much better performance, including a larger memory window, faster switching speed (100 ns) and higher extinction ratio (107), than that of the device based on MoS₂/h-BN/2H-MoTe₂ heterostructure. Moreover, the device based on MoS₂/h-BN/1T′-MoTe₂ heterostructure also shows a long cycle (>1200 cycles) and retention (>3000 s) stability. Our study clearly demonstrates that the crystal phase of 2D TMDs has a significant impact on the performance of nonvolatile flash memory devices based on 2D vdW heterostructures, which paves the way for the fabrication of future high-performance memory devices based on 2D materials.

Keywords: crystal Phase, 2D van der Waals heretostructure, flash memory device, floating gate

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1928 High-Efficiency Comparator for Low-Power Application

Authors: M. Yousefi, N. Nasirzadeh

Abstract:

In this paper, dynamic comparator structure employing two methods for power consumption reduction with applications in low-power high-speed analog-to-digital converters have been presented. The proposed comparator has low consumption thanks to power reduction methods. They have the ability for offset adjustment. The comparator consumes 14.3 μW at 100 MHz which is equal to 11.8 fJ. The comparator has been designed and simulated in 180 nm CMOS. Layouts occupy 210 μm2.

Keywords: efficiency, comparator, power, low

Procedia PDF Downloads 325
1927 Developing Three-Dimensional Digital Image Correlation Method to Detect the Crack Variation at the Joint of Weld Steel Plate

Authors: Ming-Hsiang Shih, Wen-Pei Sung, Shih-Heng Tung

Abstract:

The purposes of hydraulic gate are to maintain the functions of storing and draining water. It bears long-term hydraulic pressure and earthquake force and is very important for reservoir and waterpower plant. The high tensile strength of steel plate is used as constructional material of hydraulic gate. The cracks and rusts, induced by the defects of material, bad construction and seismic excitation and under water respectively, thus, the mechanics phenomena of gate with crack are probing into the cause of stress concentration, induced high crack increase rate, affect the safety and usage of hydroelectric power plant. Stress distribution analysis is a very important and essential surveying technique to analyze bi-material and singular point problems. The finite difference infinitely small element method has been demonstrated, suitable for analyzing the buckling phenomena of welding seam and steel plate with crack. Especially, this method can easily analyze the singularity of kink crack. Nevertheless, the construction form and deformation shape of some gates are three-dimensional system. Therefore, the three-dimensional Digital Image Correlation (DIC) has been developed and applied to analyze the strain variation of steel plate with crack at weld joint. The proposed Digital image correlation (DIC) technique is an only non-contact method for measuring the variation of test object. According to rapid development of digital camera, the cost of this digital image correlation technique has been reduced. Otherwise, this DIC method provides with the advantages of widely practical application of indoor test and field test without the restriction on the size of test object. Thus, the research purpose of this research is to develop and apply this technique to monitor mechanics crack variations of weld steel hydraulic gate and its conformation under action of loading. The imagines can be picked from real time monitoring process to analyze the strain change of each loading stage. The proposed 3-Dimensional digital image correlation method, developed in the study, is applied to analyze the post-buckling phenomenon and buckling tendency of welded steel plate with crack. Then, the stress intensity of 3-dimensional analysis of different materials and enhanced materials in steel plate has been analyzed in this paper. The test results show that this proposed three-dimensional DIC method can precisely detect the crack variation of welded steel plate under different loading stages. Especially, this proposed DIC method can detect and identify the crack position and the other flaws of the welded steel plate that the traditional test methods hardly detect these kind phenomena. Therefore, this proposed three-dimensional DIC method can apply to observe the mechanics phenomena of composite materials subjected to loading and operating.

Keywords: welded steel plate, crack variation, three-dimensional digital image correlation (DIC), crack stel plate

Procedia PDF Downloads 495
1926 Run-Time Customisation of Soft-Core CPUs on Field Programmable Gate Array

Authors: Rehab Abdullah Shendi

Abstract:

The use of customised soft-core processors in which instructions can be integrated into a system in application hardware is increasing in the Field Programmable Gate Array (FPGA) field. Specifically, the partial run-time reconfiguration of FPGAs in specialised processors for a particular domain can be very beneficial. In this report, the design and implementation for the customisation of a soft-core MIPS processor using an FPGA and partial reconfiguration (PR) of FPGA technology will be addressed to achieve efficient resource use. This can be achieved using a PR design flow that helps the design fit into a smaller device. Moreover, the impact of static power consumption could be reduced due to runtime reconfiguration. This will be done by configurable custom instructions implemented in the hardware as an extension on the MIPS CPU. The aim of this project is to investigate the PR of FPGAs for run-time adaptations of the instruction set of a soft-core CPU, including the integration of custom instructions and the exploration of the potential to use the MultiBoot feature available in Xilinx FPGAs to carry out the PR process. The system will be evaluated and tested on a Nexus 3 development board featuring a Xilinx Spartran-6 FPGA. The system will be able to load reconfigurable custom instructions dynamically into user programs with the help of the trap handler when the custom instruction is called by the MIPS CPU. The results of this experiment demonstrate that custom instructions in hardware can speed up a certain function and many instructions can be saved when compared to a software implementation of the same function. Implementing custom instructions in hardware is perfectly possible and worth exploring.

Keywords: customisation, FPGA, MIPS, partial reconfiguration, PR

Procedia PDF Downloads 238
1925 Simulation of Turboexpander Potential in a City Gate Station under Variations of Feed Characteristic

Authors: Tarannom Parhizkar, Halle Bakhteeyar

Abstract:

This paper presents a feasibility assessment of an expansion system applied to the natural gas transportation process in Iran. Power can be generated from the pressure energy of natural gas along its supply chain at various pressure reduction points by using turboexpanders. This technology is being applied in different countries around the world. The system consists of a turboexpander reducing the natural gas pressure and providing mechanical energy to drive electric generator. Moreover, gas pre-heating, required to prevent hydrate formation, is performed upstream of expansion stage using burner. The city gate station (CGS) has a nominal flow rate in range of 45000 to 270000 cubic meters per hour and a pressure reduction from maximum 62 bar at the upstream to 6 bar. Due to variable feed pressure and temperature in this station sensitivity analysis of generated electricity and required heat is performed. Results show that plant gain is more sensible to pressure variation than temperature changes. Furthermore, using turboexpander to reduce the pressure result in an electrical generation of 2757 to 17574 kW with the value of approximately 4 million US$ per year. Moreover, the required heat range to prevent a hydrate formation is almost 2189 to 14157 kW. To provide this heat, a burner is used with a maximum annual cost of 268,640 $ burner fuel. Therefore, the actual annual benefit of proposed plant modification is approximately over 6,5 million US$.

Keywords: feasibility study, simulation, turboexpander, feed characteristic

Procedia PDF Downloads 470
1924 Seismic Performance of Reinforced Concrete Frames Infilled by Masonry Walls with Different Heights

Authors: Ji-Wook Mauk, Yu-Suk Kim, Hyung-Joon Kim

Abstract:

This study carried out comparative seismic performance of reinforced concrete frames infilled by masonry walls with different heights. Partial and fully infilled RC frames were modeled for the research objectives and the analysis model for a bare reinforced concrete frame was established for comparison. Non-linear static analyses for the studied frames were performed to investigate their structural behavior under extreme loading conditions and to find out their collapse mechanism. It was observed from analysis results that the strengths of the partial infilled RC frames are increased and their ductility is reduced, as infilled masonry walls are higher. Especially, Reinforced concrete frames with a higher partial infilled masonry wall would experience shear failures. Non-linear dynamic analyses using 10 earthquake records show that the bare and fully infilled reinforced concrete frames present stable collapse mechanism while the reinforced concrete frames with a partially infilled masonry wall collapse in more brittle manner due to short-column effects.

Keywords: fully infilled RC frame, partially infilled RC frame, masonry wall, short-column effect

Procedia PDF Downloads 388
1923 Developing Laser Spot Position Determination and PRF Code Detection with Quadrant Detector

Authors: Mohamed Fathy Heweage, Xiao Wen, Ayman Mokhtar, Ahmed Eldamarawy

Abstract:

In this paper, we are interested in modeling, simulation, and measurement of the laser spot position with a quadrant detector. We enhance detection and tracking of semi-laser weapon decoding system based on microcontroller. The system receives the reflected pulse through quadrant detector and processes the laser pulses through a processing circuit, a microcontroller decoding laser pulse reflected by the target. The seeker accuracy will be enhanced by the decoding system, the laser detection time based on the receiving pulses number is reduced, a gate is used to limit the laser pulse width. The model is implemented based on Pulse Repetition Frequency (PRF) technique with two microcontroller units (MCU). MCU1 generates laser pulses with different codes. MCU2 decodes the laser code and locks the system at the specific code. The codes EW selected based on the two selector switches. The system is implemented and tested in Proteus ISIS software. The implementation of the full position determination circuit with the detector is produced. General system for the spot position determination was performed with the laser PRF for incident radiation and the mechanical system for adjusting system at different angles. The system test results show that the system can detect the laser code with only three received pulses based on the narrow gate signal, and good agreement between simulation and measured system performance is obtained.

Keywords: four quadrant detector, pulse code detection, laser guided weapons, pulse repetition frequency (PRF), Atmega 32 microcontrollers

Procedia PDF Downloads 350
1922 Life Cycle Assessment of Almond Processing: Off-ground Harvesting Scenarios

Authors: Jessica Bain, Greg Thoma, Marty Matlock, Jeyam Subbiah, Ebenezer Kwofie

Abstract:

The environmental impact and particulate matter emissions (PM) associated with the production and packaging of 1 kg of almonds were evaluated using life cycle assessment (LCA). The assessment began at the point of ready to harvest with a system boundary was a cradle-to-gate assessment of almond packaging in California. The assessment included three scenarios of off-ground harvesting of almonds. The three general off-ground harvesting scenarios with variations include the harvested almonds solar dried on a paper tarp in the orchard, the harvested almonds solar dried on the floor in a separate lot, and the harvested almonds dried mechanically. The life cycle inventory (LCI) data for almond production were based on previously published literature and data provided by Almond Board of California (ABC). The ReCiPe 2016 method was used to calculate the midpoint impacts. Using consequential LCA model, the global warming potential (GWP) for the three harvesting scenarios are 2.90, 2.86, and 3.09 kg CO2 eq/ kg of packaged almond for scenarios 1, 2a, and 3a, respectively. The global warming potential for conventional harvesting method was 2.89 kg CO2 eq/ kg of packaged almond. The particulate matter emissions for each scenario per hectare for each off-ground harvesting scenario is 77.14, 9.56, 66.86, and 8.75 for conventional harvesting and scenarios 1, 2, and 3, respectively. The most significant contributions to the overall emissions were from almond production. The farm gate almond production had a global warming potential of 2.12 kg CO2 eq/ kg of packaged almond, approximately 73% of the overall emissions. Based on comparisons between the GWP and PM emissions, scenario 2a was the best tradeoff between GHG and PM production.

Keywords: life cycle assessment, low moisture foods, sustainability, LCA

Procedia PDF Downloads 52
1921 A Study on ESD Protection Circuit Applying Silicon Controlled Rectifier-Based Stack Technology with High Holding Voltage

Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

Procedia PDF Downloads 495
1920 Performance Validation of Model Predictive Control for Electrical Power Converters of a Grid Integrated Oscillating Water Column

Authors: G. Rajapakse, S. Jayasinghe, A. Fleming

Abstract:

This paper aims to experimentally validate the control strategy used for electrical power converters in grid integrated oscillating water column (OWC) wave energy converter (WEC). The particular OWC’s unidirectional air turbine-generator output power results in discrete large power pulses. Therefore, the system requires power conditioning prior to integrating to the grid. This is achieved by using a back to back power converter with an energy storage system. A Li-Ion battery energy storage is connected to the dc-link of the back-to-back converter using a bidirectional dc-dc converter. This arrangement decouples the system dynamics and mitigates the mismatch between supply and demand powers. All three electrical power converters used in the arrangement are controlled using finite control set-model predictive control (FCS-MPC) strategy. The rectifier controller is to regulate the speed of the turbine at a set rotational speed to uphold the air turbine at a desirable speed range under varying wave conditions. The inverter controller is to maintain the output power to the grid adhering to grid codes. The dc-dc bidirectional converter controller is to set the dc-link voltage at its reference value. The software modeling of the OWC system and FCS-MPC is carried out in the MATLAB/Simulink software using actual data and parameters obtained from a prototype unidirectional air-turbine OWC developed at Australian Maritime College (AMC). The hardware development and experimental validations are being carried out at AMC Electronic laboratory. The designed FCS-MPC for the power converters are separately coded in Code Composer Studio V8 and downloaded into separate Texas Instrument’s TIVA C Series EK-TM4C123GXL Launchpad Evaluation Boards with TM4C123GH6PMI microcontrollers (real-time control processors). Each microcontroller is used to drive 2kW 3-phase STEVAL-IHM028V2 evaluation board with an intelligent power module (STGIPS20C60). The power module consists of a 3-phase inverter bridge with 600V insulated gate bipolar transistors. Delta standard (ASDA-B2 series) servo drive/motor coupled to a 2kW permanent magnet synchronous generator is served as the turbine-generator. This lab-scale setup is used to obtain experimental results. The validation of the FCS-MPC is done by comparing these experimental results to the results obtained by MATLAB/Simulink software results in similar scenarios. The results show that under the proposed control scheme, the regulated variables follow their references accurately. This research confirms that FCS-MPC fits well into the power converter control of the OWC-WEC system with a Li-Ion battery energy storage.

Keywords: dc-dc bidirectional converter, finite control set-model predictive control, Li-ion battery energy storage, oscillating water column, wave energy converter

Procedia PDF Downloads 85
1919 FSO Performance under High Solar Irradiation: Case Study Qatar

Authors: Syed Jawad Hussain, Abir Touati, Farid Touati

Abstract:

Free-Space Optics (FSO) is a wireless technology that enables the optical transmission of data though the air. FSO is emerging as a promising alternative or complementary technology to fiber optic and wireless radio-frequency (RF) links due to its high-bandwidth, robustness to EMI, and operation in unregulated spectrum. These systems are envisioned to be an essential part of future generation heterogeneous communication networks. Despite the vibrant advantages of FSO technology and the variety of its applications, its widespread adoption has been hampered by rather disappointing link reliability for long-range links due to atmospheric turbulence-induced fading and sensitivity to detrimental climate conditions. Qatar, with modest cloud coverage, high concentrations of airborne dust and high relative humidity particularly lies in virtually rainless sunny belt with a typical daily average solar radiation exceeding 6 kWh/m2 and 80-90% clear skies throughout the year. The specific objective of this work is to study for the first time in Qatar the effect of solar irradiation on the deliverability of the FSO Link. In order to analyze the transport media, we have ported Embedded Linux kernel on Field Programmable Gate Array (FPGA) and designed a network sniffer application that can run into FPGA. We installed new FSO terminals and configure and align them successively. In the reporting period, we carry out measurement and relate them to weather conditions.

Keywords: free space optics, solar irradiation, field programmable gate array, FSO outage

Procedia PDF Downloads 328
1918 Transverse Vibration of Non-Homogeneous Rectangular Plates of Variable Thickness Using GDQ

Authors: R. Saini, R. Lal

Abstract:

The effect of non-homogeneity on the free transverse vibration of thin rectangular plates of bilinearly varying thickness has been analyzed using generalized differential quadrature (GDQ) method. The non-homogeneity of the plate material is assumed to arise due to linear variations in Young’s modulus and density of the plate material with the in-plane coordinates x and y. Numerical results have been computed for fully clamped and fully simply supported boundary conditions. The solution procedure by means of GDQ method has been implemented in a MATLAB code. The effect of various plate parameters has been investigated for the first three modes of vibration. A comparison of results with those available in literature has been presented.

Keywords: rectangular, non-homogeneous, bilinear thickness, generalized differential quadrature (GDQ)

Procedia PDF Downloads 366
1917 Analysis of Stacked SCR-Based ESD Protection Circuit with Low Trigger Voltage and Latch-Up Immunity

Authors: Jun-Geol Park, Kyoung-Il Do, Min-Ju Kwon, Kyung-Hyun Park, Yong-Seo Koo

Abstract:

In this paper, we proposed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for latch-up immunity. The proposed circuit has a lower trigger voltage and a higher holding voltage characteristic by using the zener diode structure. These characteristics prevent latch-up problem in normal operating conditions. The proposed circuit was analyzed to figure out the electrical characteristics by the variations of design parameters D1, D2 and stack technology to obtain the n-fold electrical characteristics. The simulations are accomplished by using the Synopsys TCAD simulator. When using the stack technology, 2-stack has the holding voltage of 6.9V and 3-stack has the holding voltage of 10.9V.

Keywords: ESD, SCR, trigger voltage, holding voltage

Procedia PDF Downloads 492
1916 Phosphorus Reduction in Plain and Fully Formulated Oils Using Fluorinated Additives

Authors: Gabi N. Nehme

Abstract:

The reduction of phosphorus and sulfur in engine oil are the main topics of this paper. Very reproducible boundary lubrication tests were conducted as part of Design of Experiment software (DOE) to study the behavior of fluorinated catalyst iron fluoride (FeF3), and polutetrafluoroethylene or Teflon (PTFE) in developing environmentally friendly (reduced P and S) anti-wear additives for future engine oil formulations. Multi-component Chevron fully formulated oil (GF3) and Chevron plain oil were used with the addition of PTFE and catalyst to characterize and analyze their performance. Lower phosphorus blends were the goal of the model solution. Experiments indicated that new sub-micron FeF3 catalyst played an important role in preventing breakdown of the tribofilm.

Keywords: wear, SEM, EDS, friction, lubricants

Procedia PDF Downloads 260
1915 Review of the Legislative and Policy Issues in Promoting Infrastructure Development to Promote Automation in Telecom Industry

Authors: Marvin Ricardo Awarab

Abstract:

There has never been a greater need for telecom services. The Internet of Things (IoT), 5G networking, and edge computing are the driving forces behind this increased demand. The fierce demand offers communications service providers significant income opportunities. The telecom sector is centered on automation, and realizing a digital operation that functions as a real-time business will be crucial for the industry as a whole. Automation in telecom refers to the application of technology to create a more effective, quick, and scalable alternative to the conventional method of operating the telecom industry. With the promotion of 5G and the Internet of Things (IoT), telecom companies will continue to invest extensively in telecom automation technology. Automation offers benefits in the telecom industry; developing countries such as Namibia may not fully tap into such benefits because of the lack of funds and infrastructural resources to invest in automation. This paper fully investigates the benefits of automation in the telecom industry. Furthermore, the paper identifies hiccups that developing countries such as Namibia face in their quest to fully introduce automation in the telecom industry. Additionally, the paper proposes possible avenues that Namibia, as a developing country, adopt investing in automation infrastructural resources with the aim of reaping the full benefits of automation in the telecom industry.

Keywords: automation, development, internet, internet of things, network, telecom, telecommunications policy, 5G

Procedia PDF Downloads 32
1914 Performance Analysis of Transformerless DC-DC Boost Converter

Authors: Nidhi Vijay, A. K. Sharma

Abstract:

Many industrial applications require power from dc source. DC-DC boost converters are now being used all over the world for rapid transit system. Although these provide high efficiency, smooth control, fast response and regeneration, conventional DC-DC boost converters are unable to provide high step up voltage gain due to effect of power switches, rectifier diodes and equivalent series resistance of inductor and capacitor. This paper proposes new transformerless dc-dc converters to achieve high step up voltage gain as compared to the conventional converter without an extremely high duty ratio. Only one power stage is used in this converter. Steady-state analysis of voltage gain is discussed in brief. Finally, a comparative analysis is given in order to verify the results.

Keywords: MATLAB, DC-DC boost converter, voltage gain, voltage stress

Procedia PDF Downloads 402
1913 Design and Fabrication of Electricity Generating Speed Breaker

Authors: Haider Aamir, Muhammad Ali Khalid

Abstract:

Electricity harvesting speed bump (EHSB) is speed breaker of conventional shape, but the difference is that it is not fixed, rather it moves up and down, and electricity can be generated from its vibrating motion. This speed bump consists of an upper cover which will move up and down, a shaft mechanism which will be used to drive the generator and a rack and pinion mechanism which will connect the cover and shaft. There is a spring mechanism to return the cover to its initial state when a vehicle has passed over the bump. Produced energy in the past was up to 80 Watts. For this purpose, a clutch mechanism is used so that both the up-down movements of the cover can be used to drive the generator. Mechanical Motion Rectifier (MMR) mechanism ensures the conversion of both the linear motions into rotational motion which is used to drive the generator.

Keywords: electricity harvesting, generator, rack and pinion, stainless steel shaft

Procedia PDF Downloads 241
1912 A 1T1R Nonvolatile Memory with Al/TiO₂/Au and Sol-Gel Processed Barium Zirconate Nickelate Gate in Pentacene Thin Film Transistor

Authors: Ke-Jing Lee, Cheng-Jung Lee, Yu-Chi Chang, Li-Wen Wang, Yeong-Her Wang

Abstract:

To avoid the cross-talk issue of only resistive random access memory (RRAM) cell, one transistor and one resistor (1T1R) architecture with a TiO₂-based RRAM cell connected with solution barium zirconate nickelate (BZN) organic thin film transistor (OTFT) device is successfully demonstrated. The OTFT were fabricated on a glass substrate. Aluminum (Al) as the gate electrode was deposited via a radio-frequency (RF) magnetron sputtering system. The barium acetate, zirconium n-propoxide, and nickel II acetylacetone were synthesized by using the sol-gel method. After the BZN solution was completely prepared using the sol-gel process, it was spin-coated onto the Al/glass substrate as the gate dielectric. The BZN layer was baked at 100 °C for 10 minutes under ambient air conditions. The pentacene thin film was thermally evaporated on the BZN layer at a deposition rate of 0.08 to 0.15 nm/s. Finally, gold (Au) electrode was deposited using an RF magnetron sputtering system and defined through shadow masks as both the source and drain. The channel length and width of the transistors were 150 and 1500 μm, respectively. As for the manufacture of 1T1R configuration, the RRAM device was fabricated directly on drain electrodes of TFT device. A simple metal/insulator/metal structure, which consisting of Al/TiO₂/Au structures, was fabricated. First, Au was deposited to be a bottom electrode of RRAM device by RF magnetron sputtering system. Then, the TiO₂ layer was deposited on Au electrode by sputtering. Finally, Al was deposited as the top electrode. The electrical performance of the BZN OTFT was studied, showing superior transfer characteristics with the low threshold voltage of −1.1 V, good saturation mobility of 5 cm²/V s, and low subthreshold swing of 400 mV/decade. The integration of the BZN OTFT and TiO₂ RRAM devices was finally completed to form 1T1R configuration with low power consumption of 1.3 μW, the low operation current of 0.5 μA, and reliable data retention. Based on the I-V characteristics, the different polarities of bipolar switching are found to be determined by the compliance current with the different distribution of the internal oxygen vacancies used in the RRAM and 1T1R devices. Also, this phenomenon can be well explained by the proposed mechanism model. It is promising to make the 1T1R possible for practical applications of low-power active matrix flat-panel displays.

Keywords: one transistor and one resistor (1T1R), organic thin-film transistor (OTFT), resistive random access memory (RRAM), sol-gel

Procedia PDF Downloads 325