Search results for: chip design

Authors: Zahrasadat Hosseini, Jie Yuan

Abstract:

Point-of-care (POC) diagnostic devices based on lab-on-a-chip (LOC) technology have the potential to revolutionize medical diagnostics. However, the development of an ideal microfluidic system based on LOC technology for diagnostics purposes requires overcoming several obstacles, such as improving sensitivity, selectivity, portability, cost-effectiveness, and prototyping methods. While numerous studies have introduced technologies and systems that advance these criteria, existing systems still have limitations. Electrochemical enzyme-linked immunosorbent assay (e-ELISA) in a LOC device offers numerous advantages, including enhanced sensitivity, decreased turnaround time, minimized sample and analyte consumption, reduced cost, disposability, and suitability for miniaturization, integration, and multiplexing. In this study, we present a novel design and fabrication method for a microfluidic diagnostic platform that integrates screen-printed electrochemical carbon/silver chloride electrodes on flexible printed circuit boards with flexible, multilayer, polydimethylsiloxane (PDMS) microfluidic networks to accurately manipulate and pre-immobilize analytes for performing electrochemical enzyme-linked immunosorbent assay (e-ELISA) for multiplexed quantification of blood serum biomarkers. We further demonstrate fast, cost-effective prototyping, as well as accurate and reliable detection performance of this device for quantification of interleukin-6-spiked samples through electrochemical analytics methods. We anticipate that our invention represents a significant step towards the development of user-friendly, portable, medical-grade, POC diagnostic devices.

Keywords: lab-on-a-chip, point-of-care diagnostics, electrochemical ELISA, biomarker quantification, fast prototyping

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Authors: Zahrasadat Hosseini, Jie Yuan

Abstract:

Point-of-care (POC) diagnostic devices based on lab-on-a-chip (LOC) technology have the potential to revolutionize medical diagnostics. However, the development of an ideal microfluidic system based on LOC technology for diagnostics purposes requires overcoming several obstacles, such as improving sensitivity, selectivity, portability, cost-effectiveness, and prototyping methods. While numerous studies have introduced technologies and systems that advance these criteria, existing systems still have limitations. Electrochemical enzyme-linked immunosorbent assay (e-ELISA) in a LOC device offers numerous advantages, including enhanced sensitivity, decreased turnaround time, minimized sample and analyte consumption, reduced cost, disposability, and suitability for miniaturization, integration, and multiplexing. In this study, we present a novel design and fabrication method for a microfluidic diagnostic platform that integrates screen-printed electrochemical carbon/silver chloride electrodes on flexible printed circuit boards with flexible, multilayer, polydimethylsiloxane (PDMS) microfluidic networks to accurately manipulate and pre-immobilize analytes for performing electrochemical enzyme-linked immunosorbent assay (e-ELISA) for multiplexed quantification of blood serum biomarkers. We further demonstrate fast, cost-effective prototyping, as well as accurate and reliable detection performance of this device for quantification of interleukin-6-spiked samples through electrochemical analytics methods. We anticipate that our invention represents a significant step towards the development of user-friendly, portable, medical-grade POC diagnostic devices.

Keywords: lab-on-a-chip, point-of-care diagnostics, electrochemical ELISA, biomarker quantification, fast prototyping

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Authors: Wheyming Song, Ssu-Ping Lin

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The primary advantage of package-on-package (PoP) packaging is that since it has less volume, it weighs less. But this is also related to its principal drawback, which is warpage. This research investigates how PoP package warpage patterns are affected by assembling process parameters, including substrate temperature, injection speed, injection temperature, and compound forces. We also investigate how warpage patterns are affected by the location of the silicon chip. The methodologies used in this research are design of experiment and warpage simulation via ANSYS. We propose a regression model to predict the warpage value as a function of substrate temperature, injection speed, injection temperature, and compound forces. Our results show that interaction effects exist between substrate temperature and compound forces and between injection speed and injection temperature. Therefore, determining the optimal values for substrate temperature, compound forces, injection speed, and injection temperature cannot be done individually. Also, our results show that the warpage patterns based on the location of silicon chips can be classified into 11 groups, with the largest warpage occurring at the left-most and right-most sides.

Keywords: package-on-package, warpage, design of experiment, simulation

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Authors: Tayab D. Memon, Shahji Farooque, Marvi Deshi, Imtiaz Hussain Kalwar, B. S. Chowdhry

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Recently single-bit ternary FIR-like filter (SBTFF) hardware synthesize in FPGA is reported and compared with multi-bit FIR filter on similar spectral characteristics. Results shows that SBTFF dominates upon multi-bit filter overall. In this paper, an optimized adder module for ternary quantized sigma-delta modulated signal is presented. The adder is simulated using ModelSim for functional verification the area-performance of the proposed adder were obtained through synthesis in Xilinx and compared to conventional adder trees. The synthesis results show that the proposed adder tree achieves higher clock rates and lower chip area at higher inputs to the adder block; whereas conventional adder tree achieves better performance and lower chip area at lower number of inputs to the same adder block. These results enhance the usefulness of existing short word length DSP algorithms for fast and efficient mobile communication.

Keywords: short word length (SWL), DSP algorithms, FPGA, SBTFF, VHDL

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Authors: Kuan-Wu Lin, Tsu-Wu Hu

Abstract:

In recent years, product design has already begun to comfort and humanize, and for different user needs to design products, In particular, closer relationship with the people of the products, Such as headphones and other consumer electronics products. In this study, will for general comfort design principles and field survey results through the use of a headset, including adolescents, young and middle-aged groups such as three users, Further identify the general design principles belong to the headset comfortable design. The study results will include the significance of headphones design and differences between product design principles, Provide the basis for future product design.

Keywords: wearing type headphones , comfort degree design, general design principles, product design

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Authors: Vishal Pareek, Shubham Gupta, Sushil Chandra Jain

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With increasing high-speed computation demand the power consumption, heat dissipation and chip size issues are posing challenges for logic design with conventional technologies. Recovery of bit loss and bit errors is other issues that require reversibility and fault tolerance in the computation. The reversible computing is emerging as an alternative to conventional technologies to overcome the above problems and helpful in a diverse area such as low-power design, nanotechnology, quantum computing. Bit loss issue can be solved through unique input-output mapping which require reversibility and bit error issue require the capability of fault tolerance in design. In order to incorporate reversibility a number of combinational reversible logic based circuits have been developed. However, very few sequential reversible circuits have been reported in the literature. To make the circuit fault tolerant, a number of fault model and test approaches have been proposed for reversible logic. In this paper, we have attempted to incorporate fault tolerance in sequential reversible building blocks such as D flip-flop, T flip-flop, JK flip-flop, R-S flip-flop, Master-Slave D flip-flop, and double edge triggered D flip-flop by making them parity preserving. The importance of this proposed work lies in the fact that it provides the design of reversible sequential circuits completely testable for any stuck-at fault and single bit fault. In our opinion our design of reversible building blocks is superior to existing designs in term of quantum cost, hardware complexity, constant input, garbage output, number of gates and design of online testable D flip-flop have been proposed for the first time. We hope our work can be extended for building complex reversible sequential circuits.

Keywords: parity preserving gate, quantum computing, fault tolerance, flip-flop, sequential reversible logic

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Authors: Yang Liu, Mathias Agmell, Aylin Ahadi, Jan-Eric Stahl, Jinming Zhou

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Tool wear and tool geometry have significant effects on the residual stresses in the component produced by high-speed machining. In this paper, Coupled Eulerian and Lagrangian (CEL) model is adopted to investigate the residual stress in high-speed machining of Inconel718 with a CBN170 cutting tool. The result shows that the mesh with the smallest size of 5 um yields cutting forces and chip morphology in close agreement with the experimental data. The analysis of thermal loading and mechanical loading are performed to study the effect of segmented chip morphology on the machined surface topography and residual stress distribution. The effects of cutting edge radius and flank wear on residual stresses formation and distribution on the workpiece were also investigated. It is found that the temperature within 100um depth of the machined surface increases drastically due to the more friction heat generation with the contact area of tool and workpiece increasing when a larger edge radius and flank wear are used. With the depth further increasing, the temperature drops rapidly for all cases due to the low conductivity of Inconel718. Consequently, higher and deeper tensile residual stress is generated on the superficial. Furthermore, an increased depth of plastic deformation and compressive residual stress is noticed in the subsurface, which is attributed to the reduction of the yield strength under the thermal effect. Besides, the ploughing effect produced by a larger tool edge radius contributes more than flank wear. The magnitude variation of the compressive residual stress caused by various edge radius and flank wear have a totally opposite trend, which depends on the magnitude of the ploughing and friction pressure acting on the machined surface.

Keywords: Coupled Eulerian Lagrangian, segmented chip, residual stress, tool wear, edge radius, Inconel718

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Authors: Ş. Karabulut, A. Güllü, A. Güldaş, R. Gürbüz

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This study investigates the effects of the lead angle and chip thickness variation on surface roughness during the machining of compacted graphite iron using ceramic cutting tools under dry cutting conditions. Analytical models were developed for predicting the surface roughness values of the specimens after the face milling process. Experimental data was collected and imported to the artificial neural network model. A multilayer perceptron model was used with the back propagation algorithm employing the input parameters of lead angle, cutting speed and feed rate in connection with chip thickness. Furthermore, analysis of variance was employed to determine the effects of the cutting parameters on surface roughness. Artificial neural network and regression analysis were used to predict surface roughness. The values thus predicted were compared with the collected experimental data, and the corresponding percentage error was computed. Analysis results revealed that the lead angle is the dominant factor affecting surface roughness. Experimental results indicated an improvement in the surface roughness value with decreasing lead angle value from 88° to 45°.

Keywords: CGI, milling, surface roughness, ANN, regression, modeling, analysis

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Authors: Ossama Al-Maliki

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Europay, MasterCard, and Visa (EMV) is one of the most popular payment protocol in the world. The EMV protocol supports Chip and PIN Transactions, Chip and Signature transactions, and Contactless transactions. This protocol suffers from tens of £ millions of lost per year due to many fraudulent payments. This is due to several reported vulnerable points in the protocols used for such payments that allow skimming, replay, cloning, Mole Point of Sale (POS), relay, and other attacks to be conducted. In this paper, we are focusing on the EMV contactless specification and we have proposed two proposal solutions to the addition of a localization factor to enhance the payment authentication of such transactions designed to prevent relay, cloning, and Mole-POS attacks. Our proposed solution is a back-end localization scheme to help the Issuer-Bank compare the location of the genuine cardholder in relation to the used POS. Our scheme uses 'something you have' which is the Cardholder Smartphone (CSP) to provide the location of the cardholder at the time of the transaction and without impacting the contactless payment time/protocol. The Issuer-bank obtain the CSP Location using tried and tested localization techniques, and independently of the cardholder. Both of our proposal solutions do not require infrastructure changes, and it uses existing EMV/SP protocol messages to communicate our scheme information.

Keywords: NFC, RFID, contactless card, authentication, location, EMV

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Authors: M. Iruleswari, A. Jeyapaul Murugan

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Most fundamental part used in many Digital Signal Processing (DSP) application is a Finite Impulse Response (FIR) filter because of its linear phase, stability and regular structure. Designing a high-speed and hardware efficient FIR filter is a very challenging task as the complexity increases with the filter order. In most applications the higher order filters are required but the memory usage of the filter increases exponentially with the order of the filter. Using multipliers occupy a large chip area and need high computation time. Multiplier-less memory-based techniques have gained popularity over past two decades due to their high throughput processing capability and reduced dynamic power consumption. This paper describes the design and implementation of highly efficient Look-Up Table (LUT) based circuit for the implementation of FIR filter using Distributed arithmetic algorithm. It is a multiplier less FIR filter. The LUT can be subdivided into a number of LUT to reduce the memory usage of the LUT for higher order filter. Analysis on the performance of various filter orders with different address length is done using Xilinx 14.5 synthesis tool. The proposed design provides less latency, less memory usage and high throughput.

Keywords: finite impulse response, distributed arithmetic, field programmable gate array, look-up table

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Authors: Ankit Shai

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CRC or Cyclic Redundancy Check is one of the most common, and one of the most powerful error-detecting codes implemented on modern computers. Most of the modern communication protocols use some error detection algorithms in digital networks and storage devices to detect accidental changes to raw data between transmission and reception. Cyclic Redundancy Check, or CRC, is the most popular one among these error detection codes. CRC properties are defined by the generator polynomial length and coefficients. The aim of this project is to implement an efficient FPGA based CRC-8 that accepts a 32 bit input, taking into consideration optimal chip area and high performance, using VHDL. The proposed architecture is implemented on Xilinx ISE Simulator. It is designed while keeping in mind the hardware design, complexity and cost factor.

Keywords: cyclic redundancy checker, CRC-8, 32-bit input, FPGA, VHDL, ModelSim, Xilinx

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Authors: Dar-Bin Shieh, Gwo-Bin Lee, Chen-Ming Chang, Chen Sheng Yeh, Chih-Chia Huang, Tsung-Ju Li

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Mitochondrial defects have a significant impact in many human diseases and aging associated phenotypes. The pathogenic mitochondrial DNA (mtDNA) mutations are diverse and usually present as heteroplasmic. mtDNA 4977bps deletion is one of the common mtDNA defects, and the ratio of mutated versus normal copy is significantly associated with clinical symptoms thus their quantitative detection has become an important unmet needs for advanced disease diagnosis and therapeutic guidelines. This study revealed a Micro-electro-mechanical-system (MEMS) enabled automatic microfluidic chip that only required minimal sample. The system integrated multiple laboratory operation steps into a Lab-on-a-Chip for high-sensitive and prompt measurement. The entire process including magnetic nanoparticle based mtDNA extraction in chip, mutation selective photonic DNA cleavage, and nanoparticle accelerated photonic quantitative polymerase chain reaction (qPCR). All subsystems were packed inside a miniature three-dimensional micro structured system and operated in an automatic manner. Integration of magnetic beads with microfluidic transportation could promptly extract and enrich the specific mtDNA. The near infrared responsive magnetic nanoparticles enabled micro-PCR to be operated by pulse-width-modulation controlled laser pulsing to amplify the desired mtDNA while quantified by fluorescence intensity captured by a complementary metal oxide system array detector. The proportions of pathogenic mtDNA in total DNA were thus obtained. Micro capillary electrophoresis module was used to analyze the amplicone products. In conclusion, this study demonstrated a new magnetophotonic based qPCR MEMS system that successfully detects and quantify specific disease related DNA mutations thus provides a promising future for rapid diagnosis of mitochondria diseases.

Keywords: mitochondrial DNA, micro-electro-mechanical-system, magnetophotonics, PCR

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Authors: Moustafa Osman Mohammed

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This paper introduces Luhmann’s autopoietic social systems starting with the original concept of autopoiesis by biologists and scientists, including the modification of general systems based on socialized medicine. A specific type of autopoietic system is explained in the three existing groups of the ecological phenomena: interaction, social and medical sciences. This hypothesis model, nevertheless, has a nonlinear interaction with its natural environment ‘interactional cycle’ for the exchange of photon energy with molecular without any changes in topology. The external forces in the systems environment might be concomitant with the natural fluctuations’ influence (e.g. radioactive radiation, electromagnetic waves). The cantilever sensor deploys insights to the future chip processor for prevention of social metabolic systems. Thus, the circuits with resonant electric and optical properties are prototyped on board as an intra–chip inter–chip transmission for producing electromagnetic energy approximately ranges from 1.7 mA at 3.3 V to service the detection in locomotion with the least significant power losses. Nowadays, therapeutic systems are assimilated materials from embryonic stem cells to aggregate multiple functions of the vessels nature de-cellular structure for replenishment. While, the interior actuators deploy base-pair complementarity of nucleotides for the symmetric arrangement in particular bacterial nanonetworks of the sequence cycle creating double-stranded DNA strings. The DNA strands must be sequenced, assembled, and decoded in order to reconstruct the original source reliably. The design of exterior actuators have the ability in sensing different variations in the corresponding patterns regarding beat-to-beat heart rate variability (HRV) for spatial autocorrelation of molecular communication, which consists of human electromagnetic, piezoelectric, electrostatic and electrothermal energy to monitor and transfer the dynamic changes of all the cantilevers simultaneously in real-time workspace with high precision. A prototype-enabled dynamic energy sensor has been investigated in the laboratory for inclusion of nanoscale devices in the architecture with a fuzzy logic control for detection of thermal and electrostatic changes with optoelectronic devices to interpret uncertainty associated with signal interference. Ultimately, the controversial aspect of molecular frictional properties is adjusted to each other and forms its unique spatial structure modules for providing the environment mutual contribution in the investigation of mass temperature changes due to pathogenic archival architecture of clusters.

Keywords: autopoiesis, nanoparticles, quantum photonics, portable energy, photonic structure, photodynamic therapeutic system

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Authors: Saleh Alshehri

Abstract:

Thermoelectric technology is currently being used in many industrial applications for cooling, heating and generating electricity. This research mainly focuses on using thermoelectric to cool down high-speed computer chips at different operating conditions. A previously developed and validated three-dimensional model for optimizing and assessing the performance of cascaded thermoelectric and non-cascaded thermoelectric is used in this study to investigate the possibility of decreasing the hotspot temperature of computer chip. Additionally, a test assembly is built and tested at steady-state and transient conditions. The obtained optimum thermoelectric current at steady-state condition is used to conduct a number of pulsed tests (i.e. transient tests) with different shapes to cool the computer chips hotspots. The results of the steady-state tests showed that at hotspot heat rate of 15.58 W (5.97 W/cm²), using thermoelectric current of 4.5 A has resulted in decreasing the hotspot temperature at open circuit condition (89.3 °C) by 50.1 °C. Maximum and minimum hotspot temperatures have been affected by ON and OFF duration of the electrical current pulse. Maximum hotspot temperature was resulted by longer OFF pulse period. In addition, longer ON pulse period has generated the minimum hotspot temperature.

Keywords: thermoelectric generator, TEG, thermoelectric cooler, TEC, chip hotspots, electronic cooling

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Authors: Surupa Shaw, Debjyoti Banerjee

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Enhancing heat transfer in compact volumes is a challenge when constrained by cost issues, especially those associated with requirements for minimizing pumping power consumption. This is particularly acute for electronic chip cooling applications. Technological advancements in microelectronics have led to development of chip architectures that involve increased power consumption. As a consequence packaging, technologies are saddled with needs for higher rates of power dissipation in smaller form factors. The increasing circuit density, higher heat flux values for dissipation and the significant decrease in the size of the electronic devices are posing thermal management challenges that need to be addressed with a better design of the cooling system. Maximizing surface area for heat exchanging surfaces (e.g., extended surfaces or “fins”) can enable dissipation of higher levels of heat flux. Fractal structures have been shown to maximize surface area in compact volumes. Self-replicating structures at multiple length scales are called “Fractals” (i.e., objects with fractional dimensions; unlike regular geometric objects, such as spheres or cubes whose volumes and surface area values scale as integer values of the length scale dimensions). Fractal structures are expected to provide an appropriate technology solution to meet these challenges for enhanced heat transfer in the microelectronic devices by maximizing surface area available for heat exchanging fluids within compact volumes. In this study, the effect of different fractal micro-channel architectures and flow structures on the enhancement of transport phenomena in heat exchangers is explored by parametric variation of fractal dimension. This study proposes a model that would enable cost-effective solutions for thermal-fluid transport for energy applications. The objective of this study is to ascertain the sensitivity of various parameters (such as heat flux and pressure gradient as well as pumping power) to variation in fractal dimension. The role of the fractal parameters will be instrumental in establishing the most effective design for the optimum cooling of microelectronic devices. This can help establish the requirement of minimal pumping power for enhancement of heat transfer during cooling. Results obtained in this study show that the proposed models for fractal architectures of microchannels significantly enhanced heat transfer due to augmentation of surface area in the branching networks of varying length-scales.

Keywords: fractals, microelectronics, constructal theory, heat transfer enhancement, pumping power enhancement

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Authors: Kareem Saber

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Many products’ design instructors search for how to help students to develop their designs simply by reducing design stages and extrapolating simple design process forms to achieve design creativity. So, the researcher extrapolated a new design process form called “hierarchical design” which reduced design process into three stages and he had tried that methodology on about two hundred students. That trial had led to great results as students could develop their designs which characterized by creativity and innovation. That proved the success and effectiveness of the proposed methodology.

Keywords: mind mapping, morphological analysis, product design, design process

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Authors: Gong Zhang, Hong Cai, Bin Dong, Jifang Tao, Aiqun Liu, Dim-Lee Kwong, Yuandong Gu

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An on-chip refractive index sensor with high sensitivity and large measurement range is demonstrated in this paper. The sensing structures are based on Mach-Zehnder interferometer configuration, built on the SOI substrate. The wavelength sensitivity of the sensor is estimated to be 3129 nm/RIU. Meanwhile, according to the interference pattern period changes, the measured period sensitivities are 2.9 nm/RIU (TE mode) and 4.21 nm/RIU (TM mode), respectively. As such, the wavelength shift and the period shift can be used for fine index change detection and larger index change detection, respectively. Therefore, the sensor design provides an approach for large index change measurement with high sensitivity.

Keywords: Mach-Zehnder interferometer, nanotechnology, refractive index sensing, sensors

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Authors: Jun Yu, Yat-Hei Lam, Boris Grinberg, Kevin Chai Tshun Chuan

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This paper presents a 5-V to 30-V current-mode boost converter for powering the drive circuit of a micro-electro-mechanical sensor. The design of a transconductance amplifier and an integrated current sensing circuit are presented. In addition, essential building blocks for power-on protection such as a soft-start and clamp block and supply and clock ready block are discussed in details. The chip is fabricated in a 0.18-μm CMOS process. Measurement results show that the soft-start and clamp block can effectively limit the inrush current during startup and protect the boost converter from startup failure.

Keywords: boost converter, current sensing, power-on protection, step-up converter, soft-start

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Authors: Jan Jezek, Zdenek Pilat, Filip Smatlo, Pavel Zemanek

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We present a device that combines fluorescence spectroscopy with fiber optics and dielectrophoretic micromanipulation in PDMS (poly-(dimethylsiloxane)) microfluidic chips. The device allows high speed detection (in the order of kHz) of the fluorescence signal, which is coming from the sample by an inserted optical fiber, e.g. from a micro-droplet flow in a microfluidic chip, or even from the liquid flowing in the transparent capillary, etc. The device uses a laser diode at a wavelength suitable for excitation of fluorescence, excitation and emission filters, optics for focusing the laser radiation into the optical fiber, and a highly sensitive fast photodiode for detection of fluorescence. The device is combined with dielectrophoretic sorting on a chip for sorting of micro-droplets according to their fluorescence intensity. The electrodes are created by lift-off technology on a glass substrate, or by using channels filled with a soft metal alloy or an electrolyte. This device found its use in screening of enzymatic reactions and sorting of individual fluorescently labelled microorganisms. The authors acknowledge the support from the Grant Agency of the Czech Republic (GA16-07965S) and Ministry of Education, Youth and Sports of the Czech Republic (LO1212) together with the European Commission (ALISI No. CZ.1.05/2.1.00/01.0017).

Keywords: dielectrophoretic sorting, fiber optics, laser, microfluidic chips, microdroplets, spectroscopy

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Authors: Zeynep Aytaç, Nuri Yücel

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Today, as the need for high efficiency and fuel-efficient engines have increased, centrifugal compressor designs are expected to be high-efficient and have high-pressure ratios than ever. The present study represents a design methodology of centrifugal compressor placed in a mini jet engine for the design and off-design points with the utilization of computational fluid dynamics (CFD) and compares the performance characteristics at the mentioned two points. Although the compressor is expected to provide the required specifications at the design point, it is known that it is important for the design to deliver the required parameters at the off-design point also as it will not operate at the design point always. It was observed that the obtained mass flow rate, pressure ratio, and efficiency values are within the limits of the design specifications for the design and off-design points. Despite having different design inputs for the mentioned two points, they reveal similar flow characteristics in the general frame.

Keywords: centrifugal compressor, computational fluid dynamics, design point, off-design point

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Authors: Bahram Talebjedi, Emily Earl, Mina Hoorfar

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One of the issues that arises with microscale lab-on-a-chip technology is that the laminar flow within the microchannels limits the mixing of fluids. To combat this, micromixers have been introduced as a means to try and incorporate turbulence into the flow to better aid the mixing process. This study presents an electroosmotic micromixer that balances vortex generation and degeneration with the inlet flow velocity to greatly increase the mixing efficiency. A comprehensive parametric study was performed to evaluate the role of the relevant parameters on the mixing efficiency. It was observed that the suggested micromixer is perfectly suited for biological applications due to its low pressure drop (below 10 Pa) and low shear rate. The proposed micromixer with optimized working parameters is able to attain a mixing efficiency of 95% in a span of 0.5 seconds using a frequency of 10 Hz, a voltage of 0.7 V, and an inlet velocity of 0.366 mm/s.

Keywords: microfluidics, active mixer, pulsed AC electroosmosis flow, micromixer

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Authors: Tien-Li Chang, Huang-Chi Huang, Zhao-Chi Chen, Wun-Yi Chen

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The droplet-based microfluidic are used as micro-reactors for chemical and biological assays. Hence, the precise addition of reagents into the droplets is essential for this function in the scope of lab-on-a-chip applications. To obtain the characteristics (size, velocity, pressure, and frequency of production) of droplets, this study describes an integrated on-chip method of real-time signal detection. By controlling and manipulating the fluids, the flow behavior can be obtained in the droplet-based microfluidics. The detection method is used a type of infrared sensor. Through the varieties of droplets in the microfluidic devices, the real-time conditions of velocity and pressure are gained from the sensors. Here the microfluidic devices are fabricated by polydimethylsiloxane (PDMS). To measure the droplets, the signal acquisition of sensor and LabVIEW program control must be established in the microchannel devices. The devices can generate the different size droplets where the flow rate of oil phase is fixed 30 μl/hr and the flow rates of water phase range are from 20 μl/hr to 80 μl/hr. The experimental results demonstrate that the sensors are able to measure the time difference of droplets under the different velocity at the voltage from 0 V to 2 V. Consequently, the droplets are measured the fastest speed of 1.6 mm/s and related flow behaviors that can be helpful to develop and integrate the practical microfluidic applications.

Keywords: microfluidic, droplets, sensors, single detection

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Authors: Ziyuan Wu, Yulong Jia, Xiang Zhang, Wanting Zhou, Lei Li

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The Internet of Things (IoT) is a rapidly evolving field involving a large number of interconnected embedded devices. In the design of embedded System-on-Chip (SoC), the key issues are power consumption, performance, and security. However, the easy-to-implement software and untrustworthy third-party IP cores may threaten the safety of hardware assets. Considering that illegal access and malicious attacks against SoC resources pass through the bus that integrates IPs, we propose a Lightweight Hardware Firewall (LHF) to protect SoC, which monitors and disallows the offending bus transactions based on physical addresses. Furthermore, under the LHF architecture, this paper refines two types of firewalls: Destination Hardware Firewall (DHF) and Source Hardware Firewall (SHF). The former is oriented to fine-grained detection and configuration, whose core technology is based on the method of dynamic grading units. In addition, we design the SHF based on static entries to achieve lightweight. Finally, we evaluate the hardware consumption of the proposed method by both Field-Programmable Gate Array (FPGA) and IC. Compared with the exciting efforts, LHF introduces a bus latency of zero clock cycles for every read or write transaction implemented on Xilinx Kintex-7 FPGAs. Meanwhile, the DC synthesis results based on TSMC 90nm show that the area is reduced by about 25% compared with the previous method.

Keywords: IoT, security, SoC, bus architecture, lightweight hardware firewall, FPGA

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Authors: Saurabh Chaudhury, Sanjeet Kumar Sinha

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The MOSFET has been the main building block in high performance and low power VLSI chips for the last several decades. Device scaling is fundamental to technological advancements, which allows more devices to be integrated on a single die providing greater functionality per chip. Ultimately, the goal of scaling is to build an individual transistor that is smaller, faster, cheaper, and consumes less power. Scaling continued following Moore's law initially and now we see an exponential growth in today's nano scaled chip. However, device scaling to deep nano meter regime leads to exponential increase in leakage currents and excessive heat generation. Moreover, fabrication process variability causing a limitation to further scaling. Researchers believe that with a mix of chemistry, physics, and engineering, nano electronics may provide a solution to increasing fabrication costs and may allow integrated circuits to be scaled beyond the limits of the modern transistor. Carbon nano tube (CNT) and nano wires (NW) based FETs have been analyzed and characterized in laboratory and also been demonstrated as prototypes. This work presents an extensive simulation based study and analysis of CNTFET and NW-FET devices and comparison of the results with conventional MOSFET. From this study, we can conclude that these devices have got some excellent properties and favorable characteristics which will definitely lead the future semiconductor devices in post silicon era.

Keywords: carbon nanotube, nanowire FET, low power, nanoscaled devices, VLSI

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Authors: Rojean Ghafariasar, Leili Nosrati

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The article introduces the categories and characteristics of cross-design, respectively, between industry and industry designers, artists, brands and brands, science, technology, and fashion. It focuses on the combination of technology and fashion cross-design methods, corresponding case studies on the combination of new technology fabrics, fashion design, smart devices, and also 3D printing technology, emphasizing the integration and application value of technology and fashion. The document also introduces design elements into fashion design through scientific and technological intelligence, promoting fashion innovation as well as research and development of new materials and functions, and incubates an ecosystem for the fashion industry through science and technology.

Keywords: fashion, design, industrial design, crossover design

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Authors: Yusuf Hesham Mohamed

Abstract:

Introduction: Three-dimensional printing technology includes multiple procedures that fabricate three-dimensional objects through consecutively layering two-dimensional cross-sections on top of each other. 3D bioprinting is a promising field of 3D printing, which fabricates tissues and organs by accurately controlling the proper arrangement of diverse biological components. 3D bioprinting uses software and prints biological materials and their supporting components layer-by-layer on a substrate or in a tissue culture plate to produce complex live tissues and organs. 3D food printing is an emerging field of 3D bioprinting in which the 3D printed products are food products that are cheap, require less effort to produce, and have more desirable traits. The Aim of the Study is the development of an affordable 3D bioprinter by altering a locally made CNC instrument with an open-source platform to suit the 3D bio-printer purposes. Later, we went through applying the prototype in several applications regarding food technology and drug testing, including the organ-On-Chip. Materials and Methods: An off-the-shelf 3D printer was modified by designing and fabricating the syringe unit, which was designed on the basis of the Milli-fluidics system. Sodium alginate and gelatin hydrogels were prepared, followed by leaf cell suspension preparation from narrow sections of Fragaria’s viable leaves. The desired 3D structure was modeled, and 3D printing preparations took place. Cell-free and cell-laden hydrogels were printed at room temperature under sterile conditions. Post printing curing process was performed. The printed structure was further studied. Results: Positive results have been achieved using the altered 3D bioprinter where a 3D hydrogel construct of two layers made of the combination of sodium alginate to gelatin (15%: 0.5%) has been printed. DLP 3D printer was used to design the syringe component with a transparent PLA-Pro resin for the creation of a microfluidics system having two channels altered to the double extruder. The hydrogel extruder’s design was based on peristaltic pumps, which utilized a stepper motor. The design and fabrication were made using DIY-3D printed parts. Hard plastic PLA was the material utilized for printing. SEM was used to carry out the porous 3D construct imaging. Multiple physical and chemical tests were performed in order to ensure that the cell line was suitable for hosting. Fragaria plant was developed by suspending Fragaria’s cells from its leaves using the 3D bioprinter. Conclusion: 3D bioprinting is considered to be an emerging scientific field that can facilitate and improve many scientific tests and studies. Thus, having a 3D bioprinter in labs is considered to be an essential requirement. 3D bioprinters are very expensive; however, the fabrication of a 3D printer into a 3D bioprinter can lower the cost of the bioprinter. The 3D bioprinter implemented made use of peristaltic pumps instead of syringe-based pumps in order to extend the ability to print multiple types of materials and cells.

Keywords: scaffold, eco on chip, 3D bioprinter, DLP printer

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Authors: Jiajia Yao, Guanlin Wu, Fang Liu, Junshuai Xue, Yue Hao

Abstract:

This study reports on the epitaxial growth of a GaN-based resonant tunneling diode (RTD) structure with stable and repeatable double negative differential resistance (NDR) characteristics at room temperature on a c-plane GaN-on-sapphire template using plasma-assisted molecular beam epitaxy (PA-MBE) technology. In this structure, two independent AlN/GaN RTDs are epitaxially connected in series in the vertical growth direction through a silicon-doped GaN layer. As the collector electrode bias voltage increases, the two RTDs respectively align the ground state energy level in the quantum well with the 2DEG energy level in the emitter accumulation well to achieve quantum resonant tunneling and then reach the negative differential resistance (NDR) region. The two NDR regions exhibit similar peak current densities and peak-to-valley current ratios, which are 230 kA/cm² and 249 kA/cm², 1.33 and 1.38, respectively, for a device with a collector electrode mesa diameter of 1 µm. The consistency of the NDR is much higher than the results of on-chip discrete RTD device interconnection, resulting from the smaller chip area, fewer interconnect parasitic parameters, and less process complexity. The methods and results presented in this paper show the brilliant prospects of GaN RTDs in the development of multi-value logic digital circuits.

Keywords: MBE, AlN/GaN, RTDs, double NDR

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Authors: Ö. Şenyiğit, A. Çolak

Abstract:

It is of great importance for an architectural student to know the parameters through which he/she can conduct his/her design and makes his/her design effective in architectural education. Therefore; an empirical application study was carried out through the designing activity using the emulation model to support the design and design approaches of architectural students. During the investigation period, studies were done on the basic design elements and principles of the fall semester, and the emulation model, one of the designing methods that constitute the subject of the study, was fictionalized as three phased “recognition-interpretation-application”. As a result of the study, it was observed that when students were given a key method during the design process, their awareness increased and their aspects improved as well.

Keywords: basic design, design education, design methods, emulation

Procedia PDF Downloads 204

Authors: Joni Agung Sudarmanto

Abstract:

The concept of design has historically been elusive and characterized by its fluidity, leading to divergent viewpoints on its fundamental nature. Guy Julier views design as inherent in material culture, while Sanders sees it as a collective endeavor focusing on the outcome. Design's dualistic nature, procedural and outcome-oriented, spans various domains, including objects, individuals, and the environment. This comprehensive view of design challenges the notion that design practice is distinct from research, highlighting their shared exploratory nature. The article explores methodological techniques in design research and the three prevalent approaches: "into design," "through design," and "for design." The contradictory meanings of design arise from its etymology and its duality as both process and result, leading to its integrative nature across objects, humans, and the environment. The parallels between design and research activities, underscoring their exploratory and knowledge-generating nature, are situated within creative research, challenging the perception of design practice as separate from research endeavors. The "into design" approach encourages interdisciplinary collaboration, enriching design research with diverse perspectives. The "through design" approach bridges theory and practice, producing more practical outcomes. The "for design" approach supports specific design solutions, providing designers with valuable guidance.

Keywords: dualistic nature of design, integrative perspectives, methodological approaches, design research

Procedia PDF Downloads 38

Authors: Yu Chen, Seong-Jin Kim, Jaehoon Chung

Abstract:

High throughput cells counting and sizing are often required for biomedical applications. Here we report design, fabrication and validating of a micro-machined Coulter counter device with multiple-channel to realize such application for low cost. Multiple vertical through-holes were fabricated on a silicon chip, combined with the PDMS micro-fluidics channel that serves as the sensing channel. In order to avoid the crosstalk introduced by the electrical connection, instead of measuring the current passing through, the potential of each channel is monitored, thus the high throughput is possible. A peak of the output potential can be captured when the cell/particle is passing through the microhole. The device was validated by counting and sizing the polystyrene beads with diameter of 6 μm, 10 μm and 15 μm. With the sampling frequency to be set at 100 kHz, up to 5000 counts/sec for each channel can be realized. The counting and enumeration of MCF7 cancer cells are also demonstrated.

Keywords: Coulter counter, cell enumeration, high through-put, cell sizing

Procedia PDF Downloads 572