Search results for: gate crossing time

Authors: Tsoi Kim Ming, Yu King Pong

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Background: With powered wheelchair, patients can travel more easily and conveniently. However, some patients suffer from other difficulties, such as visual impairment, cognitive disorder, or psychological issues, which make them unable to control powered wheelchair safely. Purpose: Therefore, those patients are required to complete a comprehensive driving training by therapists on confined area, which simulates narrow paths in daily live. During the training, therapists will give series of driving instruction to patients, which may be unaware of patients crossing out the boundary of area. To facilitate the training, it is needed to develop a device to provide warning to patients during training Method: We adopt LIDAR for distance sensing started from center of confined area. Then, we program the LIDAR with linear geometry to remember each side of the area. The LIDAR will sense the location of wheelchair continuously. Once the wheelchair is driven out of the boundary, audio alert will be given to patient. Result: Patients can pay their attention to the particular driving situation followed by audio alert during driving training, which can learn how to avoid out of boundary in similar situation next time. Conclusion: Instead of only instructed by therapist, the LIDAR can facilitate the powered wheelchair training by patients actively pay their attention to driving situation. After training, they are able to control the powered wheelchair safely when facing difficult and narrow path in real life.

Keywords: PWC, training, rehab, AT

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Authors: Moh’d A. AL-Shboul

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Recently, and due to Arab spring and terrorism around the globe, pushing and driving most governments potentially to harmonize their border measures particularly the regional and an international transit trade within and among Customs Unions. The main purpose of this study is to investigate and provide an insight for monitoring and controlling the trade supply chain within and among different countries by using technological advancement (i.e. an electronic tracking system, etc.); furthermore, facilitate the local and intra-regional trade among countries through reviewing the recent trends and practical implementation of an electronic transit traffic and cargo that related to customs measures by introducing and supporting some case studies of several international and landlocked transit trade countries. The research methodology employed in this study was described as qualitative by conducting few interviews with managers, transit truck drivers, and traders and reviewing the related literature to collect qualitative data from secondary sources such as statistical reports, previous studies, etc. The results in this study show that Jordan and other countries around the globe that used an electronic tracking system for monitoring transit trade has led to a significant reduction in cost, effort and time in physical movement of goods internally and crossing through other countries. Therefore, there is no need to escort transit trucks by customs staff; hence, the rate of escort transit trucks is reduced by more than ninety percent, except the bulky and high duty goods. Electronic transit traffic has been increased; the average transit time journey has been reduced by more than seventy percent and has led to decrease in rates of smuggling up to fifty percent. The researcher recommends considering Jordan as regional and international office for tracking electronically and monitoring the transit trade for many considerations.

Keywords: electronic tracking system, facilitation system, regional and international corridor, supply chain security, transit trade

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Authors: Kiana Zeighami, Morteza Ozlati Moghadam

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Designing a high accuracy and high precision motion controller is one of the important issues in today’s industry. There are effective solutions available in the industry but the real-time performance, smoothness and accuracy of the movement can be further improved. This paper discusses a complete solution to carry out the movement of three stepper motors in three dimensions. The objective is to provide a method to design a fully integrated System-on-Chip (SOC)-based motion controller to reduce the cost and complexity of production by incorporating Field Programmable Gate Array (FPGA) into the design. In the proposed method the FPGA receives its commands from a host computer via wireless internet communication and calculates the motion trajectory for three axes. A profile generator module is designed to realize the interpolation algorithm by translating the position data to the real-time pulses. This paper discusses an approach to implement the linear interpolation algorithm, since it is one of the fundamentals of robots’ movements and it is highly applicable in motion control industries. Along with full profile trajectory, the triangular drive is implemented to eliminate the existence of error at small distances. To integrate the parallelism and real-time performance of FPGA with the power of Central Processing Unit (CPU) in executing complex and sequential algorithms, the NIOS II soft-core processor was added into the design. This paper presents different operating modes such as absolute, relative positioning, reset and velocity modes to fulfill the user requirements. The proposed approach was evaluated by designing a custom-made FPGA board along with a mechanical structure. As a result, a precise and smooth movement of stepper motors was observed which proved the effectiveness of this approach.

Keywords: 3-axis linear interpolation, FPGA, motion controller, micro-stepping

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Authors: Olivia Martina Dalla Torre

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The aim of this paper is to describe and analyse some urban writings that emerge in politically disputed areas, namely the Occupied Palestinian Territories, and more specifically in Deheishe refugee camp. These graffiti are visible on the walls of houses, all around the camp, and they convey messages of protest but also of hope or claim about the complex political situation in the occupied territories. These graffiti can be then interpreted as political and politicized semiotic resources. In this paper, after having introduced the political situation of the Palestinian Territories in a historical perspective, we will question a specific dimension of these writings, i.e., their multilingual and ideological aspect. To do this, we will focus on ethnographic fieldwork on Deheishe refugee camp and we will draw on the theoretical framework of the critical communication studies which assert that language practices are not neutral and that they need to be understood through the lens of the historical context of production, crossing space and time. By analysing the relationship between the discursive constructions of the messages and the languages used, we will point out some of the possible reasons and functions of the presence of these multilingual discursive productions. We will show that if, on the one hand, these graffiti confirm the huge presence of Western actors in the region, on the other hand, they attest the presence of an international movement against the Israeli occupation and against other struggles as well. Concluding, we will argue that multilingualism certainly represents a diversification of the linguistic landscape and that it gives a transnational and political dimension to the graffiti.

Keywords: communication, graffiti, multilingualism, Palestine, transnationalism

Procedia PDF Downloads 184

Authors: Michael Granado

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The French philosopher Gaston Bachelard’s philosophy of time is articulated in his two works on the subject, the Intuition of the Instant (1932) and his The Dialectic of Duration (1936). Both works present a systematic methodology predicated upon the assumption that our understanding of time has radically changed as a result of Einstein and subsequently needs to be reimagined. Bachelard makes a major distinction in his discussion of time: 1. Time as it is (physical time), 2. Time as we experience it (phenomenological time). This paper will focus on the second distinction, phenomenological time, and explore the connections between Bachelard’s work and contemporary psychology. Several aspects of Bachelard’s philosophy of time nicely complement our current understanding of memory and self and clarify how the self relates to experienced time. Two points, in particular, stand out; the first is the relative nature of subjective time, and the second is the implications of subjective time in the formation of the narrative self. Bachelard introduces two philosophical concepts to explain these points: rhythmanalysis and reverie. By exploring these concepts, it will become apparent that there is an undeniable link between memory, self, and time. Through the use of narrative self, the individual connects and links memories and time together to form a sense of personal identity.

Keywords: Gaston Bachelard, memory, self, time

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Authors: Seyed Abbas Tabatabaei, Marjan Naderan Tahan, Arman Kadkhodai

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An efficient optimization approach, called feasible gate (FG), is developed to enhance the computation efficiency and solution quality of the previously developed highway alignment optimization (HAO) model. This approach seeks to realistically represent various user preferences and environmentally sensitive areas and consider them along with geometric design constraints in the optimization process. This is done by avoiding the generation of infeasible solutions that violate various constraints and thus focusing the search on the feasible solutions. The proposed method is simple, but improves significantly the model’s computation time and solution quality. On the other, highway alignment optimization through Feasible Gates, eventuates only economic model by considering minimum design constrains includes minimum reduce of circular curves, minimum length of vertical curves and road maximum gradient. This modelling can reduce passenger comfort and road safety. In most of highway optimization models, by adding penalty function for each constraint, final result handles to satisfy minimum constraint. In this paper, we want to propose a safety-function solution by introducing gift function.

Keywords: safety, highway geometry, optimization, alignment

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Authors: M. Iruleswari, A. Jeyapaul Murugan

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Most fundamental part used in many Digital Signal Processing (DSP) application is a Finite Impulse Response (FIR) filter because of its linear phase, stability and regular structure. Designing a high-speed and hardware efficient FIR filter is a very challenging task as the complexity increases with the filter order. In most applications the higher order filters are required but the memory usage of the filter increases exponentially with the order of the filter. Using multipliers occupy a large chip area and need high computation time. Multiplier-less memory-based techniques have gained popularity over past two decades due to their high throughput processing capability and reduced dynamic power consumption. This paper describes the design and implementation of highly efficient Look-Up Table (LUT) based circuit for the implementation of FIR filter using Distributed arithmetic algorithm. It is a multiplier less FIR filter. The LUT can be subdivided into a number of LUT to reduce the memory usage of the LUT for higher order filter. Analysis on the performance of various filter orders with different address length is done using Xilinx 14.5 synthesis tool. The proposed design provides less latency, less memory usage and high throughput.

Keywords: finite impulse response, distributed arithmetic, field programmable gate array, look-up table

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Authors: Amr AbdelAzim Ali, G. A. Elsheikh, Moutaz M. Hegazy

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Reaction wheels (RWs) are generally used as main actuator in the attitude control system (ACS) of spacecraft (SC) for fast orientation and high pointing accuracy. In order to achieve the required accuracy for the RWs model, the main characteristics of the RWs that necessitate analysis during the ACS design phase include: technical features, sequence of operating and RW control logic are included in function (behavior) model. A mathematical model is developed including the various errors source. The errors in control torque including relative, absolute, and error due to time delay. While the errors in angular velocity due to differences between average and real speed, resolution error, loose in installation of angular sensor, and synchronization errors. The friction torque is presented in the model include the different feature of friction phenomena: steady velocity friction, static friction and break-away torque, and frictional lag. The model response is compared with the experimental torque and frequency-response characteristics of tested RWs. Based on the created RW model, some criteria of optimization based control torque allocation problem can be recommended like: avoiding the zero speed crossing, bias angular velocity, or preventing wheel from running on the same angular velocity.

Keywords: friction torque, reaction wheels modeling, software in the loop, spacecraft attitude control

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Authors: Svetlana Strinyuk, Viacheslav Lanin

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Academic English has become lingua franca for international scientific community which stimulates universities to introduce English for Specific Purposes (EAP) courses into curriculum. Teaching L2 EAP students might be fulfilled with corpus technologies and digital stylistics. A special software developed to reach the manifold task of teaching, assessing and researching academic writing of L2 students on basis of digital stylistics and multidimensional analysis was created. A set of annotations (style markers) – grammar, lexical and syntactic features most significant of academic writing was built. Contrastive comparison of two corpora “model corpus”, subject domain limited papers published by competent writers in leading academic journals, and “students’ corpus”, subject domain limited papers written by last year students allows to receive data about the features of academic writing underused or overused by L2 EAP student. Both corpora are tagged with a special software created in GATE Developer. Style markers within the framework of research might be replaced depending on the relevance and validity of the result which is achieved from research corpora. Thus, selecting relevant (high frequency) style markers and excluding less relevant, i.e. less frequent annotations, high validity of the model is achieved. Software allows to compare the data received from processing model corpus to students’ corpus and get reports which can be used in teaching and assessment. The less deviation from the model corpus students demonstrates in their writing the higher is academic writing skill acquisition. The research showed that several style markers (hedging devices) were underused by L2 EAP students whereas lexical linking devices were used excessively. A special software implemented into teaching of EAP courses serves as a successful visual aid, makes assessment more valid; it is indicative of the degree of writing skill acquisition, and provides data for further research.

Keywords: corpus technologies in EAP teaching, multidimensional analysis, GATE Developer, corpus stylistics

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Authors: Mesbah Tarek, Kelaiaia Samia, Chiheb Sofien, Kelaiaia Mounia Samira, Labar Hocine

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Short circuit causes important damage in power systems. The aim of this paper is the investigation of the effect of short circuit at the AC side inverter in HVDC transmission line. The cutoff of HVDC transmission line implies important economic losses. In this paper it is proposed an efficient procedure which can protect and eliminate the fault quickly. The theoretical development and simulation are well detailed and illustrated.

Keywords: AC inverter, HVDC, short circuit, switcher gate, power system

Procedia PDF Downloads 563

Authors: Hanan Mikhael Dawood, Afaneen Anwer Abood Al-Khazraji

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The paper presents an investigation of field oriented control strategy of Permanent Magnet Synchronous Motor (PMSM) based on hardware in the loop simulation (HIL) over a wide speed range. A sensorless rotor position estimation using sliding mode observer for permanent magnet synchronous motor is illustrated considering the effects of magnetic saturation between the d and q axes. The cross saturation between d and q axes has been calculated by finite-element analysis. Therefore, the inductance measurement regards the saturation and cross saturation which are used to obtain the suitable id-characteristics in base and flux weakening regions. Real time matrix multiplication in Field Programmable Gate Array (FPGA) using floating point number system is used utilizing Quartus-II environment to develop FPGA designs and then download these designs files into development kit. dSPACE DS1103 is utilized for Pulse Width Modulation (PWM) switching and the controller. The hardware in the loop results conducted to that from the Matlab simulation. Various dynamic conditions have been investigated.

Keywords: magnetic saturation, rotor position estimation, sliding mode observer, hardware in the loop (HIL)

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Authors: Ami Nkumbuye

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Background: Every year 1.3 million people die due to Road crashes, according to the Global status report. Road crashes remain the greatest killer aged between 15-29 years. Young people are paying an unacceptable price for their own safer mobility. 23,498 students attending class daily from home crossing the roads of 3 districts Kigali and Southern province is showing a similar trend with 40320 cross road daily. As most of them don't have any idea about the safety, they should have when they are crossing roads and traffic rules and signs as well. Despite the high number of mortality related to road crashes in Rwanda, we don't have any approved calendar to teach young people road safety as the most affected age group. Objective: The objective of this study was to identify the causes of road crashes and the outcome of victims after being involved in road crashes over a period of two years, from January 2020 to December 2021, in Huye district and Kigali City. Methods: A retrospective descriptive study with open questions and then data analysis, students were identified from 15 schools in Kigali City and Southern Province and through the Local Action Project supported by Global Youth Coalition for Road Safety and Youth for Road Safety (YOURS), students asked about the cause of road crashes through open and closed question and data analyzed. Result: There were 354 students from 15 schools: 198 males and 156 females. Their age ranged from 10 to 25 years. The commonest cause of road crashes among students attending schools daily was: high speed, lack of education on safe behavior on the road, drinking and driving, and poor road infrastructures, with 47%, 32%, 13% and 8 %, respectively. The hospital admission after road crashes for the victims was 32.3%. In most scenes where road crashes occur, students report that they didn't see any person who could provide post-crash care until the ambulance came, in some cases, resulted in bad outcomes for the victims after road crashes. Conclusion: This study revealed that high speed and lack of education n road safety are the major cause of road crashes among young people in Rwanda. If local Non-Governmental Organization and Decision makers work on these issues like never before, we can see a decrease in road crash among young people and adult as well. We would like to give a recommendation to two institutions: the first is the Rwanda National Police Traffic department to set 30km/m as the maximum speed limit in City and near schools. The second is for the Ministry of Education to put Road Safety and Post Crash Care curricula in both Primary and Secondary schools.

Keywords: road safety, post-crash care, young people, students

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Authors: Chhavi Saxena

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FinFETs can be a replacement for bulk-CMOS transistors in many different designs. Its low leakage/standby power property makes FinFETs a desirable option for memory sub-systems. Memory modules are widely used in most digital and computer systems. Leakage power is very important in memory cells since most memory applications access only one or very few memory rows at a given time. As technology scales down, the importance of leakage current and power analysis for memory design is increasing. In this paper, we discover an option for low power interconnect synthesis at the 32nm node and beyond, using Fin-type Field-Effect Transistors (FinFETs) which are a promising substitute for bulk CMOS at the considered gate lengths. We consider a mechanism for improving FinFETs efficiency, called variable supply voltage schemes. In this paper, we’ve illustrated the design and implementation of FinFET based 4x4 SRAM cell array by means of one bit 7T SRAM. FinFET based 7T SRAM has been designed and analysis have been carried out for leakage current, dynamic power and delay. For the validation of our design approach, the output of FinFET SRAM array have been compared with standard CMOS SRAM and significant improvements are obtained in proposed model.

Keywords: FinFET, 7T SRAM cell, leakage current, delay

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Authors: Thomas Lauer

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The paper aims to give an overview of change management research by using bibliometric methodology. Based on research papers of the last decade, which are listed on Research Gate, a multidimensional categorization is done. Considering categories like topic (e.g., success factors), industry, or research methodology, the development of the discipline is traced and, in a second step, confronted with external developments of the business environment, such as climate change, gen Z or COVID, to name a few. Based on these findings, a final evaluation concerning the thematical fit of previous research topics is also made, as well as a preview of likely future trends in change management sciences.

Keywords: change management, bibliometrics, scientific trends, research topics

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Authors: A. Alshebani, Y. Swesi, S. Mrayed, F. Altaher, I. Musbah

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Cs-type nanocomposite zeolite membrane was successfully synthesized on an alumina ceramic hollow fibre with a mean outer diameter of 1.7 mm; cesium cationic exchange test was carried out inside test module with mean wall thickness of 230 μm and an average crossing pore size smaller than 0.2 μm. Separation factor of n-butane/H2 obtained indicate that a relatively high quality closed to 20. Maxwell-Stefan modeling provides an equivalent thickness lower than 1 µm. To compare the difference an application to CO2/N2 separation has been achieved, reaching separation factors close to (4,18) before and after cation exchange on H-zeolite membrane formed within the pores of a ceramic alumina substrate.

Keywords: MFI membrane, nanocomposite, ceramic hollow fibre, CO2, ion-exchange

Procedia PDF Downloads 300

Authors: A. Alshebani, Y. Swesi, S. Mrayed, F. Altaher, I. Musbah

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Cs-type nanocomposite zeolite membrane was successfully synthesized on a alumina ceramic hollow fibre with a mean outer diameter of 1.7 mm, cesium cationic exchange test was carried out inside test module with mean wall thickness of 230 μm and an average crossing pore size smaller than 0.2 μm. Separation factor of n-butane/H2 obtained indicate that a relatively high quality closed to 20. Maxwell-Stefan modeling provides an equivalent thickness lower than 1 µm. To compare the difference an application to CO2/N2 separation has been achieved, reaching separation factors close to (4,18) before and after cation exchange on H-zeolite membrane formed within the pores of a ceramic alumina substrate.

Keywords: MFI membrane, CO2, nanocomposite, ceramic hollow fibre, ion-exchange

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Authors: Muhammad Arif Jalil, Xaythavay Luangvilay, Montree Bunruangses, Somchat Sonasang, Preecha Yupapin

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Black and white holes form the entangled pair⟨BH│WH⟩, where a white hole occurs when the particle moves at the same speed as light. The entangled black-white hole pair is at the center with the radian between the gap. When the speed of particle motion is slower than light, the black hole is gravitational (positive gravity), where the white hole is smaller than the black hole. On the downstream side, the entangled pair appears to have a black hole outside the gap increases until the white holes disappear, which is the emptiness paradox. On the upstream side, when moving faster than light, white holes form times tunnels, with black holes becoming smaller. It will continue to move faster and further when the black hole disappears and becomes a wormhole (Singularity) that is only a white hole in emptiness (Emptiness). This research studies use of black and white holes generated by a two-level circuit for communication transmission carriers, in which high ability and capacity of data transmission can be obtained. The black and white hole pair can be generated by the two-level system circuit when the speech of a particle on the circuit is equal to the speed of light. The black hole forms when the particle speed has increased from slower to equal to the light speed, while the white hole is established when the particle comes down faster than light. They are bound by the entangled pair, signal and idler, ⟨Signal│Idler⟩, and the virtual ones for the white hole, which has an angular displacement of half of π radian. A two-level system is made from an electronic circuit to create black and white holes bound by the entangled bits that are immune or cloning-free from thieves. Start by creating a wave-particle behavior when its speed is equal to light black hole is in the middle of the entangled pair, which is the two bit gate. The required information can be input into the system and wrapped by the black hole carrier. A timeline (Tunnel) occurs when the wave-particle speed is faster than light, from which the entangle pair is collapsed. The transmitted information is safely in the time tunnel. The required time and space can be modulated via the input for the downlink operation. The downlink is established when the particle speed is given by a frequency(energy) form is down and entered into the entangled gap, where this time the white hole is established. The information with the required destination is wrapped by the white hole and retrieved by the clients at the destination. The black and white holes are disappeared, and the information can be recovered and used.

Keywords: cloning free, time machine, teleportation, two-level system

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Authors: Nan Hu, Chao Wang, Xi Li, Xuehai Zhou

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The field-programmable gate array (FPGA) has been widely adopted in the high-performance computing domain. In recent years, the embedded system-on-a-chip (SoC) contains coarse granularity multi-core CPU (central processing unit) and mobile GPU (graphics processing unit) that can be used as general-purpose accelerators. The motivation is that algorithms of various parallel characteristics can be efficiently mapped to the heterogeneous architecture coupled with these three processors. The CPU and GPU offload partial computationally intensive tasks from the FPGA to reduce the resource consumption and lower the overall cost of the system. However, in present common scenarios, the applications always utilize only one type of accelerator because the development approach supporting the collaboration of the heterogeneous processors faces challenges. Therefore, a systematic approach takes advantage of write-once-run-anywhere portability, high execution performance of the modules mapped to various architectures and facilitates the exploration of design space. In this paper, A servant-execution-flow model is proposed for the abstraction of the cooperation of the heterogeneous processors, which supports task partition, communication and synchronization. At its first run, the intermediate language represented by the data flow diagram can generate the executable code of the target processor or can be converted into high-level programming languages. The instantiation parameters efficiently control the relationship between the modules and computational units, including two hierarchical processing units mapping and adjustment of data-level parallelism. An embedded system of a three-dimensional waveform oscilloscope is selected as a case study. The performance of algorithms such as contrast stretching, etc., are analyzed with implementations on various combinations of these processors. The experimental results show that the heterogeneous computing system with less than 35% resources achieves similar performance to the pure FPGA and approximate energy efficiency.

Keywords: FPGA-CPU-GPU collaboration, design space exploration, heterogeneous computing, intermediate language, parameterized instantiation

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Authors: Andrés Gomez-Casseres, Rubén Contreras

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In this paper, a bidirectional boost converter operated in Discontinuous Conduction Mode (DCM) is presented as a suitable power conditioning circuit for tuning of kinetic energy harvesters without the need of a battery. A nonlinear control scheme, composed by two linear controllers, is used to control the average value of the input current, enabling the synthesization of complex loads. The converter, along with the control system, is validated through SPICE simulations using the LTspice tool. The converter model and the controller transfer functions are derived. From the simulation results, it was found that the input current distortion increases with the introduced phase shift and that, such distortion, is almost entirely present at the zero-crossing point of the input voltage.

Keywords: average current control, boost converter, electrical tuning, energy harvesting

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Authors: Mohammad Rahmani Rezaiyeh, Mojtaba Rahmani Rezaiyeh, Mehrdad Rahmani Rezaiyeh

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Smart speed bump is a new invention and I am invented it. Smart speed bump is a system that can change the position of speed bumps either active or passive in necessary situations. The basic system of smart speed bumps is based on a robotic system which includes mechanic, electronic and artificial intelligence. The smart speed bump is capable of smart decision making and can change its position by anticipating the peak of terrific hours. It can be noted to the advantages of this system such as preventing the waste of petrol while crossing speed bumps, traffic management, accelerating, flowing and securing traffic, reducing accidents and judicial records.

Keywords: invention, smart, robotic system, speed bump, traffic, management

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Authors: Dace Grauda, Inta Belogrudova, Alexei Katashev, Linda Lancere, Isaak Rashal

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The goal of study was the elaboration of easy applicable flow cytometry method for detection of influence of abiotic stress factors on plants, which could be useful for detection of environmental stresses in urban areas. The lime tree Tillia vulgaris H. is a popular tree species used for urban landscaping in Europe and is one of the main species of street greenery in Riga, Latvia. Tree decline and low vitality has observed in the central part of Riga. For this reason lime trees were select as a model object for the investigation. During the period of end of June and beginning of July 12 samples from different urban environment locations as well as plant material from a greenhouse were collected. BD FACSJazz® cell sorter (BD Biosciences, USA) with flow cytometer function was used to test viability of plant cells. The method was based on changes of relative fluorescence intensity of cells in blue laser (488 nm) after influence of stress factors. SpheroTM rainbow calibration particles (3.0–3.4 μm, BD Biosciences, USA) in phosphate buffered saline (PBS) were used for calibration of flow cytometer. BD PharmingenTM PBS (BD Biosciences, USA) was used for flow cytometry assays. The mean fluorescence intensity information from the purified cell suspension samples was recorded. Preliminary, multiple gate sizes and shapes were tested to find one with the lowest CV. It was found that low CV can be obtained if only the densest part of plant cells forward scatter/side scatter profile is analysed because in this case plant cells are most similar in size and shape. The young pollen cells in one nucleus stage were found as the best for detection of influence of abiotic stress. For experiments only fresh plant material was used– the buds of Tillia vulgaris with diameter 2 mm. For the cell suspension (in vitro culture) establishment modified protocol of microspore culture was applied. The cells were suspended in the MS (Murashige and Skoog) medium. For imitation of dust of urban area SiO2 nanoparticles with concentration 0.001 g/ml were dissolved in distilled water. Into 10 ml of cell suspension 1 ml of SiO2 nanoparticles suspension was added, then cells were incubated in speed shaking regime for 1 and 3 hours. As a stress factor the irradiation of cells for 20 min by UV was used (Hamamatsu light source L9566-02A, L10852 lamp, A10014-50-0110), maximum relative intensity (100%) at 365 nm and at ~310 nm (75%). Before UV irradiation the suspension of cells were placed onto a thin layer on a filter paper disk (diameter 45 mm) in a Petri dish with solid MS media. Cells without treatment were used as a control. Experiments were performed at room temperature (23-25 °C). Using flow cytometer BS FACS Software cells plot was created to determine the densest part, which was later gated using oval-shaped gate. Gate included from 95 to 99% of all cells. To determine relative fluorescence of cells logarithmic fluorescence scale in arbitrary fluorescence units were used. 3x103 gated cells were analysed from the each sample. The significant differences were found among relative fluorescence of cells from different trees after treatment with SiO2 nanoparticles and UV irradiation in comparison with the control.

Keywords: flow cytometry, fluorescence, SiO2 nanoparticles, UV irradiation

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Authors: Jaouadi Ikram, Machhout Mohsen

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The development of a quantum key distribution (QKD) system on a field-programmable gate array (FPGA) platform is the subject of this paper. A quantum cryptographic protocol is designed based on the properties of quantum information and the characteristics of FPGAs. The proposed protocol performs key extraction, reconciliation, error correction, and privacy amplification tasks to generate a perfectly secret final key. We modeled the presence of the spy in our system with a strategy to reveal some of the exchanged information without being noticed. Using an FPGA card with a 100 MHz clock frequency, we have demonstrated the evolution of the error rate as well as the amounts of mutual information (between the two interlocutors and that of the spy) passing from one step to another in the key generation process.

Keywords: QKD, BB84, protocol, cryptography, FPGA, key, security, communication

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Authors: Sule Sahin, Basak Bulut Karageyik

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This paper introduces a hazard rate function for the time of ruin to calculate the conditional probability of ruin for very small intervals. We call this function the force of ruin (FoR). We obtain the expected time of ruin and conditional expected time of ruin from the exact finite time ruin probability with exponential claim amounts. Then we introduce the FoR which gives the conditional probability of ruin and the condition is that ruin has not occurred at time t. We analyse the behavior of the FoR function for different initial surpluses over a specific time interval. We also obtain FoR under the excess of loss reinsurance arrangement and examine the effect of reinsurance on the FoR.

Keywords: conditional time of ruin, finite time ruin probability, force of ruin, reinsurance

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Authors: Amine Benmoussa, Mebrouk Rebhi, Rahmani Lakhdar

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Mechanically agitated vessels are commonly used for various operations within a wide range process in chemical, pharmaceutical, polymer, biochemical, mineral, petroleum industries. Depending on the purpose of the operation carried out in mixer, the best choice for geometry of the tank and agitator type can vary widely. In this paper, the laminar 2D agitation flow and power consumption of viscoplastic fluids with straight and circular gate impellers in a stirring tank is studied by using computational fluid dynamics (CFD), where the velocity profile, the velocity fields and power consumption was analyzed.

Keywords: CFD, mechanical stirring, power consumption, yield stress fluid

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Authors: Imren Kutlu, Nurdilek Gulmezoglu

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Triticale (Triticosecale Wittmack) is a man-made crop developed by crossing wheat (Triticum L.) and rye (Secale cereale L.). Triticale has until now been used mostly for animal feed; however, it can be consumed by humans in the form of biscuits, cookies, and unleavened bread. Moreover, one of the reasons for the development of triticale is that it is more efficient in nutrient deficient soil than wheat cultivars. After nitrogen fertilizer, phosphorus (P) is the most used fertilizer for crop production because P fixation occurs highly when it is applied the soil. The aim of the present study was to evaluate P uptake of winter triticale genotypes under different P fertilizer rates in different growth stages. The experiment was conducted in Eskisehir, Central Anatolia, Turkey. Treatments consisted of five triticale lines and one triticale cultivars (Samursortu) with four rates of P fertilization (0, 30, 60 and 120 kg P2O5 ha⁻¹). Phosphorus uptake of triticale genotypes in tillering, heading, as well as grain and straw at harvest stage and yield of grain and straw were determined. The results showed that a P rate of 60 kg/ha and the TCL-25 genotype produced the highest yields of straw and grain at harvest. Phosphorus uptake was the highest in tillering stage, and it decreased towards to harvest time. Phosphorus uptake of all growth stage increased as P rates raised and the application of 120 kg/ha P₂O₅ had the highest P uptake. Phosphorus uptake of genotypes was found differently. The regression analyses indicated that P uptake at tillering stage was the most effective on grain yield. These results will provide useful information to triticale growers about suitable phosphorus fertilization for both forage and food usage.

Keywords: grain yield, growth stage, phosphorus fertilization, phosphorus uptake, triticale

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Authors: Benmessaoud Hassen

Abstract:

The sensitivity to the desertification map of the south of Aurès region has been elaborated by the crossing of four thematic layers capable to have an impact on the process of desertification. The following step is inspired of MEDALUS (Mediterranean desertification and land Use), which use qualitative index to define the environment zones sensitive to the desertification. The cartographical information of vegetation, the climate, the soil and the socioeconomic state descended from cartographic data transformed to numerical data then seized on, structured and managed by an algorithm dedicated to a geographical information system. In step with information, each layer makes object of 3 or 4 classes, the geometrical median of the four layers used are leaded to sensitivity classes (ISD) of different mapped environment.

Keywords: information systems, thematic layers, the sensitivity to the desertification map, concept MEDALUS, South of Aurès

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Authors: Nabila Dwi Agustin, Ria Septitis Mentari, Nugroho Adi Sasongko

Abstract:

Indonesia is experiencing a crisis in the development of defense equipment. Most of Indonesia's defense equipment must import its parts from other countries. Moreover, the area of Indonesia is 2/3 of its territory is the sea areas. For the protection of marine areas, Indonesia relies solely on submarines in monitoring conditions and whether or not intruders enter their territory. In fact, we know the submarine has a large size so that the expenses are getting bigger, the time it takes longer and needs a big maneuver to operate the submarine. Indeed, the submarine can only be operated for deeper seas. Many other countries enter the underwater world of Indonesia but Indonesia could not do anything due to the limitations of underwater monitoring system. At the same time, reconnaissance and monitor for shallow seas cannot be done by submarine. Equipment that can be used for surveillance of shallow underwater areas shall be made. This study reviewed the current research and development initiative of the submarine unmanned vehicle (SUV) or unmanned undersea vehicle (UUV) in Indonesia. This can explore underwater without the need for an operator to operate in it, but we can monitor it from a long distance. UUV has several advantages that size can be reduced as we desired, rechargeable ship batteries, has a detection sonar commonly found on a submarine and agile movement to detect at shallow sea depth. In the sonar sensors consisted of MEMS (Micro Electro Mechanical System), the sonar system runs more efficiently and effectively to monitor the target. UUV that has been developed will be very useful if the equipment is used around the outlying islands and outer from Indonesia especially the island frequented by foreign submarines without us know. The impact of this may not be felt now but it will allow foreign countries to attack Indonesia from within for the future. In addition, UUV needs to be equipped with a anti-radar system so that submarines of other countries crossing borders cannot detect it and Indonesia anti-submarine vessels can take further security measures. As the recommendation, Indonesia should take decisive steps in the state border rules, especially submarines of other countries that deliberately cross the borders of the state. This decisive action not only by word alone but also action as well. Indonesia government should show the strength and sovereignty as the entire society unites and applies the principle of universal peace.

Keywords: submarine unmanned vehicle, submarine, development of defense equipment, the border of Indonesia

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Authors: Zineb Nougrara

Abstract:

In this paper, we propose a novel methodology for extracting a road network and its nodes from satellite images of Algeria country. This developed technique is a progress of our previous research works. It is founded on the information theory and the mathematical morphology; the information theory and the mathematical morphology are combined together to extract and link the road segments to form a road network and its nodes. We, therefore, have to define objects as sets of pixels and to study the shape of these objects and the relations that exist between them. In this approach, geometric and radiometric features of roads are integrated by a cost function and a set of selected points of a crossing road. Its performances were tested on satellite images of Algeria country.

Keywords: satellite image, road network, nodes, image analysis and processing

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Authors: Rajesh Kumar Ulaganathan, Yi-Ying Lu, Chia-Jung Kuo, Srinivasa Reddy Tamalampudi, Raman Sankar, Fang Cheng Chou, Yit-Tsong Chen

Abstract:

In this paper, we report the optoelectronic properties of multi-layered GeS nanosheets (~28 nm thick)-based field-effect transistors (called GeS-FETs). The multi-layered GeS-FETs exhibit remarkably high photoresponsivity of Rλ ~ 206 AW-1 under illumination of 1.5 µW/cm2 at  = 633 nm, Vg = 0 V, and Vds = 10 V. The obtained Rλ ~ 206 AW-1 is excellent as compared with a GeS nanoribbon-based and the other family members of group IV-VI-based photodetectors in the two-dimensional (2D) realm, such as GeSe and SnS2. The gate-dependent photoresponsivity of GeS-FETs was further measured to be able to reach Rλ ~ 655 AW-1 operated at Vg = -80 V. Moreover, the multi-layered GeS photodetector holds high external quantum efficiency (EQE ~ 4.0 × 104 %) and specific detectivity (D* ~ 2.35 × 1013 Jones). The measured D* is comparable to those of the advanced commercial Si- and InGaAs-based photodiodes. The GeS photodetector also shows an excellent long-term photoswitching stability with a response time of ~7 ms over a long period of operation (>1 h). These extraordinary properties of high photocurrent generation, broad spectral range, fast response, and long-term stability make the GeS-FET photodetector a highly qualified candidate for future optoelectronic applications.

Keywords: germanium sulfide, photodetector, photoresponsivity, external quantum efficiency, specific detectivity

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Authors: Mahsa Mousavi, Hamid Reza Pourshaghaghi, Mohammad Tahghighi, Henk Corporaal

Abstract:

Recently, Statistic Random-Access Memory-based (SRAM-based) Field-Programmable Gate Arrays (FPGAs) are widely used in aeronautics and space systems where high dependability is demanded and considered as a mandatory requirement. Since design’s circuit is stored in configuration memory in SRAM-based FPGAs; they are very sensitive to Single Event Upsets (SEUs). In addition, the adverse effects of SEUs on the electronics used in space are much higher than in the Earth. Thus, developing fault tolerant techniques play crucial roles for the use of SRAM-based FPGAs in space. However, fault tolerance techniques introduce additional penalties in system parameters, e.g., area, power, performance and design time. In this paper, an accurate estimation of configuration memory vulnerability to SEUs is proposed for approximate-tolerant applications. This vulnerability estimation is highly required for compromising between the overhead introduced by fault tolerance techniques and system robustness. In this paper, we study applications in which the exact final output value is not necessarily always a concern meaning that some of the SEU-induced changes in output values are negligible. We therefore define and propose Approximate-based Configuration Memory Vulnerability Factor (ACMVF) estimation to avoid overestimating configuration memory vulnerability to SEUs. In this paper, we assess the vulnerability of configuration memory by injecting SEUs in configuration memory bits and comparing the output values of a given circuit in presence of SEUs with expected correct output. In spite of conventional vulnerability factor calculation methods, which accounts any deviations from the expected value as failures, in our proposed method a threshold margin is considered depending on user-case applications. Given the proposed threshold margin in our model, a failure occurs only when the difference between the erroneous output value and the expected output value is more than this margin. The ACMVF is subsequently calculated by acquiring the ratio of failures with respect to the total number of SEU injections. In our paper, a test-bench for emulating SEUs and calculating ACMVF is implemented on Zynq-7000 FPGA platform. This system makes use of the Single Event Mitigation (SEM) IP core to inject SEUs into configuration memory bits of the target design implemented in Zynq-7000 FPGA. Experimental results for 32-bit adder show that, when 1% to 10% deviation from correct output is considered, the counted failures number is reduced 41% to 59% compared with the failures number counted by conventional vulnerability factor calculation. It means that estimation accuracy of the configuration memory vulnerability to SEUs is improved up to 58% in the case that 10% deviation is acceptable in output results. Note that less than 10% deviation in addition result is reasonably tolerable for many applications in approximate computing domain such as Convolutional Neural Network (CNN).

Keywords: fault tolerance, FPGA, single event upset, approximate computing

Procedia PDF Downloads 199