Search results for: short circuit current
11830 Issues on Optimizing the Structural Parameters of the Induction Converter
Authors: Marinka K. Baghdasaryan, Siranush M. Muradyan, Avgen A. Gasparyan
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Analytical expressions of the current and angular errors, as well as the frequency characteristics of an induction converter describing the relation with its structural parameters, the core and winding characteristics are obtained. Based on estimation of the dependences obtained, a mathematical problem of parametric optimization is formulated which can successfully be used for investigation and diagnosing an induction converter.Keywords: induction converters, magnetic circuit material, current and angular errors, frequency response, mathematical formulation, structural parameters
Procedia PDF Downloads 34511829 The Effect of Manure Loaded Biochar on Soil Microbial Communities
Authors: T. Weber, D. MacKenzie
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The script in this paper describes the use of advanced simulation environment using electronic systems (microcontroller, operational amplifiers, and FPGA). The simulation was used for non-linear dynamic systems behaviour with required observer structure working with parallel real-time simulation based on state-space representation. The proposed deposited model was used for electrodynamic effects including ionising effects and eddy current distribution also. With the script and proposed method, it is possible to calculate the spatial distribution of the electromagnetic fields in real-time and such systems. For further purpose, the spatial temperature distribution may also be used. With upon system, the uncertainties and disturbances may be determined. This provides the estimation of the more precise system states for the required system and additionally the estimation of the ionising disturbances that arise due to radiation effects in space systems. The results have also shown that a system can be developed specifically with the real-time calculation (estimation) of the radiation effects only. Electronic systems can take damage caused by impacts with charged particle flux in space or radiation environment. TID (Total Ionising Dose) of 1 Gy and Single Effect Transient (SET) free operation up to 50 MeVcm²/mg may assure certain functions. Single-Event Latch-up (SEL) results on the placement of several transistors in the shared substrate of an integrated circuit; ionising radiation can activate an additional parasitic thyristor. This short circuit between semiconductor-elements can destroy the device without protection and measurements. Single-Event Burnout (SEB) on the other hand, increases current between drain and source of a MOSFET and destroys the component in a short time. A Single-Event Gate Rupture (SEGR) can destroy a dielectric of semiconductor also. In order to be able to react to these processes, it must be calculated within a shorter time that ionizing radiation and dose is present. For this purpose, sensors may be used for the realistic evaluation of the diffusion and ionizing effects of the test system. For this purpose, the Peltier element is used for the evaluation of the dynamic temperature increases (dT/dt), from which a measure of the ionization processes and thus radiation will be detected. In addition, the piezo element may be used to record highly dynamic vibrations and oscillations to absorb impacts of charged particle flux. All available sensors shall be used to calibrate the spatial distributions also. By measured value of size and known location of the sensors, the entire distribution in space can be calculated retroactively or more accurately. With the formation, the type of ionisation and the direct effect to the systems and thus possible prevent processes can be activated up to the shutdown. The results show possibilities to perform more qualitative and faster simulations independent of space-systems and radiation environment also. The paper gives additionally an overview of the diffusion effects and their mechanisms.Keywords: cattle, biochar, manure, microbial activity
Procedia PDF Downloads 10311828 Design and Development of Power Sources for Plasma Actuators to Control Flow Separation
Authors: Himanshu J. Bahirat, Apoorva S. Janawlekar
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Plasma actuators are essential for aerodynamic flow separation control due to their lack of mechanical parts, lightweight, and high response frequency, which have numerous applications in hypersonic or supersonic aircraft. The working of these actuators is based on the formation of a low-temperature plasma between a pair of parallel electrodes by the application of a high-voltage AC signal across the electrodes, after which air molecules from the air surrounding the electrodes are ionized and accelerated through the electric field. The high-frequency operation is required in dielectric discharge barriers to ensure plasma stability. To carry out flow separation control in a hypersonic flow, the optimal design and construction of a power supply to generate dielectric barrier discharges is carried out in this paper. In this paper, it is aspired to construct a simplified circuit topology to emulate the dielectric barrier discharge and study its various frequency responses. The power supply can generate high voltage pulses up to 20kV at the repetitive frequency range of 20-50kHz with an input power of 500W. The power supply has been designed to be short circuit proof and can endure variable plasma load conditions. Its general outline is to charge a capacitor through a half-bridge converter and then later discharge it through a step-up transformer at a high frequency in order to generate high voltage pulses. After simulating the circuit, the PCB design and, eventually, lab tests are carried out to study its effectiveness in controlling flow separation.Keywords: aircraft propulsion, dielectric barrier discharge, flow separation control, power source
Procedia PDF Downloads 12711827 Design and Implementation of 3kVA Grid-Tied Transformerless Power Inverter for Solar Photovoltaic Application
Authors: Daniel O. Johnson, Abiodun A. Ogunseye, Aaron Aransiola, Majors Samuel
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Power Inverter is a very important device in renewable energy use particularly for solar photovoltaic power application because it is the effective interface between the DC power generator and the load or the grid. Transformerless inverter is getting more and more preferred to the power converter with galvanic isolation transformer and may eventually supplant it. Transformerless inverter offers advantages of improved DC to AC conversion and power delivery efficiency; and reduced system cost, weight and complexity. This work presents thorough analysis of the design and prototyping of 3KVA grid-tie transformerless inverter. The inverter employs electronic switching method with minimised heat generation in the system and operates based on the principle of pulse-width modulation (PWM). The design is such that it can take two inputs, one from PV arrays and the other from Battery Energy Storage BES and addresses the safety challenge of leakage current. The inverter system was designed around microcontroller system, modeled with Proteus® software for simulation and testing of the viability of the designed inverter circuit. The firmware governing the operation of the grid-tied inverter is written in C language and was developed using MicroC software by Mikroelectronica® for writing sine wave signal code for synchronization to the grid. The simulation results show that the designed inverter circuit performs excellently with very high efficiency, good quality sinusoidal output waveform, negligible harmonics and gives very stable performance under voltage variation from 36VDC to 60VDC input. The prototype confirmed the simulated results and was successfully synchronized with the utility supply. The comprehensive analyses of the circuit design, the prototype and explanation on overall performance will be presented.Keywords: grid-tied inverter, leakage current, photovoltaic system, power electronic, transformerless inverter
Procedia PDF Downloads 29211826 Performance Monitoring and Environmental Impact Analysis of a Photovoltaic Power Plant: A Numerical Modeling Approach
Authors: Zahzouh Zoubir
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The widespread adoption of photovoltaic panel systems for global electricity generation is a prominent trend. Algeria, demonstrating steadfast commitment to strategic development and innovative projects for harnessing solar energy, emerges as a pioneering force in the field. Heat and radiation, being fundamental factors in any solar system, are currently subject to comprehensive studies aiming to discern their genuine impact on crucial elements within photovoltaic systems. This endeavor is particularly pertinent given that solar module performance is exclusively assessed under meticulously defined Standard Test Conditions (STC). Nevertheless, when deployed outdoors, solar modules exhibit efficiencies distinct from those observed under STC due to the influence of diverse environmental factors. This discrepancy introduces ambiguity in performance determination, especially when surpassing test conditions. This article centers on the performance monitoring of an Algerian photovoltaic project, specifically the Oued El Keberite power (OKP) plant boasting a 15 megawatt capacity, situated in the town of Souk Ahras in eastern Algeria. The study elucidates the behavior of a subfield within this facility throughout the year, encompassing various conditions beyond the STC framework. To ensure the optimal efficiency of solar panels, this study integrates crucial factors, drawing on an authentic technical sheet from the measurement station of the OKP photovoltaic plant. Numerical modeling and simulation of a sub-field of the photovoltaic station were conducted using MATLAB Simulink. The findings underscore how radiation intensity and temperature, whether low or high, impact the short-circuit current, open-circuit voltage; fill factor, and overall efficiency of the photovoltaic system.Keywords: performance monitoring, photovoltaic system, numerical modeling, radiation intensity
Procedia PDF Downloads 6911825 Design-Analysis and Optimization of 10 MW Permanent Magnet Surface Mounted Off-Shore Wind Generator
Authors: Mamidi Ramakrishna Rao, Jagdish Mamidi
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With advancing technology, the market environment for wind power generation systems has become highly competitive. The industry has been moving towards higher wind generator power ratings, in particular, off-shore generator ratings. Current off-shore wind turbine generators are in the power range of 10 to 12 MW. Unlike traditional induction motors, slow-speed permanent magnet surface mounted (PMSM) high-power generators are relatively challenging and designed differently. In this paper, PMSM generator design features have been discussed and analysed. The focus attention is on armature windings, harmonics, and permanent magnet. For the power ratings under consideration, the generator air-gap diameters are in the range of 8 to 10 meters, and active material weigh ~60 tons and above. Therefore, material weight becomes one of the critical parameters. Particle Swarm Optimization (PSO) technique is used for weight reduction and performance improvement. Four independent variables have been considered, which are air gap diameter, stack length, magnet thickness, and winding current density. To account for core and teeth saturation, preventing demagnetization effects due to short circuit armature currents, and maintaining minimum efficiency, suitable penalty functions have been applied. To check for performance satisfaction, a detailed analysis and 2D flux plotting are done for the optimized design.Keywords: offshore wind generator, PMSM, PSO optimization, design optimization
Procedia PDF Downloads 15511824 Oxide Based Memristor and Its Potential Application in Analog-Digital Electronics
Authors: P. Michael Preetam Raj, Souri Banerjee, Souvik Kundu
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Oxide based memristors were fabricated in order to establish its potential applications in analog/digital electronics. BaTiO₃-BiFeO₃ (BT-BFO) was employed as an active material, whereas platinum (Pt) and Nb-doped SrTiO₃ (Nb:STO) were served as a top and bottom electrodes, respectively. Piezoelectric force microscopy (PFM) was utilized to present the ferroelectricity and repeatable polarization inversion in the BT-BFO, demonstrating its effectiveness for resistive switching. The fabricated memristors exhibited excellent electrical characteristics, such as hysteresis current-voltage (I-V), high on/off ratio, high retention time, cyclic endurance, and low operating voltages. The band-alignment between the active material BT-BFO and the substrate Nb:STO was experimentally investigated using X-Ray photoelectron spectroscopy, and it attributed to staggered heterojunction alignment. An energy band diagram was proposed in order to understand the electrical transport in BT-BFO/Nb:STO heterojunction. It was identified that the I-V curves of these memristors have several discontinuities. Curve fitting technique was utilized to analyse the I-V characteristic, and the obtained I-V equations were found to be parabolic. Utilizing this analysis, a non-linear BT-BFO memristors equivalent circuit model was developed. Interestingly, the obtained equivalent circuit of the BT-BFO memristors mimics the identical electrical performance, those obtained in the fabricated devices. Based on the developed equivalent circuit, a finite state machine (FSM) design was proposed. Efforts were devoted to fabricate the same FSM, and the results were well matched with those in the simulated FSM devices. Its multilevel noise filtering and immunity to external noise characteristics were also studied. Further, the feature of variable negative resistance was established by controlling the current through the memristor.Keywords: band alignment, finite state machine, polarization inversion, resistive switching
Procedia PDF Downloads 13311823 A Test Methodology to Measure the Open-Loop Voltage Gain of an Operational Amplifier
Authors: Maninder Kaur Gill, Alpana Agarwal
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It is practically not feasible to measure the open-loop voltage gain of the operational amplifier in the open loop configuration. It is because the open-loop voltage gain of the operational amplifier is very large. In order to avoid the saturation of the output voltage, a very small input should be given to operational amplifier which is not possible to be measured practically by a digital multimeter. A test circuit for measurement of open loop voltage gain of an operational amplifier has been proposed and verified using simulation tools as well as by experimental methods on breadboard. The main advantage of this test circuit is that it is simple, fast, accurate, cost effective, and easy to handle even on a breadboard. The test circuit requires only the device under test (DUT) along with resistors. This circuit has been tested for measurement of open loop voltage gain for different operational amplifiers. The underlying goal is to design testable circuits for various analog devices that are simple to realize in VLSI systems, giving accurate results and without changing the characteristics of the original system. The DUTs used are LM741CN and UA741CP. For LM741CN, the simulated gain and experimentally measured gain (average) are calculated as 89.71 dB and 87.71 dB, respectively. For UA741CP, the simulated gain and experimentally measured gain (average) are calculated as 101.15 dB and 105.15 dB, respectively. These values are found to be close to the datasheet values.Keywords: Device Under Test (DUT), open loop voltage gain, operational amplifier, test circuit
Procedia PDF Downloads 44711822 Bending the Consciousnesses: Uncovering Environmental Issues Through Circuit Bending
Authors: Enrico Dorigatti
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The growing pile of hazardous e-waste produced especially by those developed and wealthy countries gets relentlessly bigger, composed of the EEDs (Electric and Electronic Device) that are often thrown away although still well functioning, mainly due to (programmed) obsolescence. As a consequence, e-waste has taken, over the last years, the shape of a frightful, uncontrollable, and unstoppable phenomenon, mainly fuelled by market policies aiming to maximize sales—and thus profits—at any cost. Against it, governments and organizations put some efforts in developing ambitious frameworks and policies aiming to regulate, in some cases, the whole lifecycle of EEDs—from the design to the recycling. Incidentally, however, such regulations sometimes make the disposal of the devices economically unprofitable, which often translates into growing illegal e-waste trafficking—an activity usually undertaken by criminal organizations. It seems that nothing, at least in the near future, can stop the phenomenon of e-waste production and accumulation. But while, from a practical standpoint, a solution seems hard to find, much can be done regarding people's education, which translates into informing and promoting good practices such as reusing and repurposing. This research argues that circuit bending—an activity rooted in neo-materialist philosophy and post-digital aesthetic, and based on repurposing EEDs into novel music instruments and sound generators—could have a great potential in this. In particular, it asserts that circuit bending could expose ecological, environmental, and social criticalities related to the current market policies and economic model. Not only thanks to its practical side (e.g., sourcing and repurposing devices) but also to the artistic one (e.g., employing bent instruments for ecological-aware installations, performances). Currently, relevant literature and debate lack interest and information about the ecological aspects and implications of the practical and artistic sides of circuit bending. This research, therefore, although still at an early stage, aims to fill in this gap by investigating, on the one side, the ecologic potential of circuit bending and, on the other side, its capacity of sensitizing people, through artistic practice, about e-waste-related issues. The methodology will articulate in three main steps. Firstly, field research will be undertaken—with the purpose of understanding where and how to source, in an ecologic and sustainable way, (discarded) EEDs for circuit bending. Secondly, artistic installations and performances will be organized—to sensitize the audience about environmental concerns through sound art and music derived from bent instruments. Data, such as audiences' feedback, will be collected at this stage. The last step will consist in realising workshops to spread an ecologically-aware circuit bending practice. Additionally, all the data and findings collected will be made available and disseminated as resources.Keywords: circuit bending, ecology, sound art, sustainability
Procedia PDF Downloads 17111821 Novel Approach to Design of a Class-EJ Power Amplifier Using High Power Technology
Authors: F. Rahmani, F. Razaghian, A. R. Kashaninia
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This article proposes a new method for application in communication circuit systems that increase efficiency, PAE, output power and gain in the circuit. The proposed method is based on a combination of switching class-E and class-J and has been termed class-EJ. This method was investigated using both theory and simulation to confirm ~72% PAE and output power of > 39 dBm. The combination and design of the proposed power amplifier accrues gain of over 15dB in the 2.9 to 3.5 GHz frequency bandwidth. This circuit was designed using MOSFET and high power transistors. The load- and source-pull method achieved the best input and output networks using lumped elements. The proposed technique was investigated for fundamental and second harmonics having desirable amplitudes for the output signal.Keywords: power amplifier (PA), high power, class-J and class-E, high efficiency
Procedia PDF Downloads 49211820 Series Connected GaN Resonant Tunneling Diodes for Multiple-Valued Logic
Authors: Fang Liu, JunShuai Xue, JiaJia Yao, XueYan Yang, ZuMao Li, GuanLin Wu, HePeng Zhang, ZhiPeng Sun
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III-Nitride resonant tunneling diode (RTD) is one of the most promising candidates for multiple-valued logic (MVL) elements. Here, we report a monolithic integration of GaN resonant tunneling diodes to realize multiple negative differential resistance (NDR) regions for MVL application. GaN RTDs, composed of a 2 nm quantum well embedded in two 1 nm quantum barriers, are grown by plasma-assisted molecular beam epitaxy on free-standing c-plane GaN substrates. Negative differential resistance characteristic with a peak current density of 178 kA/cm² in conjunction with a peak-to-valley current ratio (PVCR) of 2.07 is observed. Statistical properties exhibit high consistency showing a peak current density standard deviation of almost 1%, laying the foundation for the monolithic integration. After complete electrical isolation, two diodes of the designed same area are connected in series. By solving the Poisson equation and Schrodinger equation in one dimension, the energy band structure is calculated to explain the transport mechanism of the differential negative resistance phenomenon. Resonant tunneling events in a sequence of the series-connected RTD pair (SCRTD) form multiple NDR regions with nearly equal peak current, obtaining three stable operating states corresponding to ternary logic. A frequency multiplier circuit achieved using this integration is demonstrated, attesting to the robustness of this multiple peaks feature. This article presents a monolithic integration of SCRTD with multiple NDR regions driven by the resonant tunneling mechanism, which can be applied to a multiple-valued logic field, promising a fast operation speed and a great reduction of circuit complexity and demonstrating a new solution for nitride devices to break through the limitations of binary logic.Keywords: GaN resonant tunneling diode, multiple-valued logic system, frequency multiplier, negative differential resistance, peak-to-valley current ratio
Procedia PDF Downloads 8111819 Analysis of Vertical Hall Effect Device Using Current-Mode
Authors: Kim Jin Sup
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This paper presents a vertical hall effect device using current-mode. Among different geometries that have been studied and simulated using COMSOL Multiphysics, optimized cross-shaped model displayed the best sensitivity. The cross-shaped model emerged as the optimum plate to fit the lowest noise and residual offset and the best sensitivity. The symmetrical cross-shaped hall plate is widely used because of its high sensitivity and immunity to alignment tolerances resulting from the fabrication process. The hall effect device has been designed using a 0.18-μm CMOS technology. The simulation uses the nominal bias current of 12μA. The applied magnetic field is from 0 mT to 20 mT. Simulation results achieved in COMSOL and validated with respect to the electrical behavior of equivalent circuit for Cadence. Simulation results of the one structure over the 13 available samples shows for the best geometry a current-mode sensitivity of 6.6 %/T at 20mT. Acknowledgment: This work was supported by Institute for Information & communications Technology Promotion (IITP) grant funded by the Korea government (MSIP) (No. R7117-16-0165, Development of Hall Effect Semiconductor for Smart Car and Device).Keywords: vertical hall device, current-mode, crossed-shaped model, CMOS technology
Procedia PDF Downloads 29211818 Detailed Quantum Circuit Design and Evaluation of Grover's Algorithm for the Bounded Degree Traveling Salesman Problem Using the Q# Language
Authors: Wenjun Hou, Marek Perkowski
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The Traveling Salesman problem is famous in computing and graph theory. In short, it asks for the Hamiltonian cycle of the least total weight in a given graph with N nodes. All variations on this problem, such as those with K-bounded-degree nodes, are classified as NP-complete in classical computing. Although several papers propose theoretical high-level designs of quantum algorithms for the Traveling Salesman Problem, no quantum circuit implementation of these algorithms has been created up to our best knowledge. In contrast to previous papers, the goal of this paper is not to optimize some abstract complexity measures based on the number of oracle iterations, but to be able to evaluate the real circuit and time costs of the quantum computer. Using the emerging quantum programming language Q# developed by Microsoft, which runs quantum circuits in a quantum computer simulation, an implementation of the bounded-degree problem and its respective quantum circuit were created. To apply Grover’s algorithm to this problem, a quantum oracle was designed, evaluating the cost of a particular set of edges in the graph as well as its validity as a Hamiltonian cycle. Repeating the Grover algorithm with an oracle that finds successively lower cost each time allows to transform the decision problem to an optimization problem, finding the minimum cost of Hamiltonian cycles. N log₂ K qubits are put into an equiprobablistic superposition by applying the Hadamard gate on each qubit. Within these N log₂ K qubits, the method uses an encoding in which every node is mapped to a set of its encoded edges. The oracle consists of several blocks of circuits: a custom-written edge weight adder, node index calculator, uniqueness checker, and comparator, which were all created using only quantum Toffoli gates, including its special forms, which are Feynman and Pauli X. The oracle begins by using the edge encodings specified by the qubits to calculate each node that this path visits and adding up the edge weights along the way. Next, the oracle uses the calculated nodes from the previous step and check that all the nodes are unique. Finally, the oracle checks that the calculated cost is less than the previously-calculated cost. By performing the oracle an optimal number of times, a correct answer can be generated with very high probability. The oracle of the Grover Algorithm is modified using the recalculated minimum cost value, and this procedure is repeated until the cost cannot be further reduced. This algorithm and circuit design have been verified, using several datasets, to generate correct outputs.Keywords: quantum computing, quantum circuit optimization, quantum algorithms, hybrid quantum algorithms, quantum programming, Grover’s algorithm, traveling salesman problem, bounded-degree TSP, minimal cost, Q# language
Procedia PDF Downloads 19011817 AFM Probe Sensor Designed for Cellular Membrane Components
Authors: Sarmiza Stanca, Wolfgang Fritzsche, Christoph Krafft, Jürgen Popp
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Independent of the cell type a thin layer of a few nanometers thickness surrounds the cell interior as the cellular membrane. The transport of ions and molecules through the membrane is achieved in a very precise way by pores. Understanding the process of opening and closing the pores due to an electrochemical gradient across the membrane requires knowledge of the pore constitutive proteins. Recent reports prove the access to the molecular level of the cellular membrane by atomic force microscopy (AFM). This technique also permits an electrochemical study in the immediate vicinity of the tip. Specific molecules can be electrochemically localized in the natural cellular membrane. Our work aims to recognize the protein domains of the pores using an AFM probe as a miniaturized amperometric sensor, and to follow the protein behavior while changing the applied potential. The intensity of the current produced between the surface and the AFM probe is amplified and detected simultaneously with the surface imaging. The AFM probe plays the role of the working electrode and the substrate, a conductive glass on which the cells are grown, represent the counter electrode. For a better control of the electric potential on the probe, a third electrode Ag/AgCl wire is mounted in the circuit as a reference electrode. The working potential is applied between the electrodes with a programmable source and the current intensity in the circuit is recorded with a multimeter. The applied potential considers the overpotential at the electrode surface and the potential drop due to the current flow through the system. The reported method permits a high resolved electrochemical study of the protein domains on the living cell membrane. The amperometric map identifies areas of different current intensities on the pore depending on the applied potential. The reproducibility of this method is limited by the tip shape, the uncontrollable capacitance, which occurs at the apex and a potential local charge separation.Keywords: AFM, sensor, membrane, pores, proteins
Procedia PDF Downloads 30711816 TRAC: A Software Based New Track Circuit for Traffic Regulation
Authors: Jérôme de Reffye, Marc Antoni
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Following the development of the ERTMS system, we think it is interesting to develop another software-based track circuit system which would fit secondary railway lines with an easy-to-work implementation and a low sensitivity to rail-wheel impedance variations. We called this track circuit 'Track Railway by Automatic Circuits.' To be internationally implemented, this system must not have any mechanical component and must be compatible with existing track circuit systems. For example, the system is independent from the French 'Joints Isolants Collés' that isolate track sections from one another, and it is equally independent from component used in Germany called 'Counting Axles,' in French 'compteur d’essieux.' This track circuit is fully interoperable. Such universality is obtained by replacing the train detection mechanical system with a space-time filtering of train position. The various track sections are defined by the frequency of a continuous signal. The set of frequencies related to the track sections is a set of orthogonal functions in a Hilbert Space. Thus the failure probability of track sections separation is precisely calculated on the basis of signal-to-noise ratio. SNR is a function of the level of traction current conducted by rails. This is the reason why we developed a very powerful algorithm to reject noise and jamming to obtain an SNR compatible with the precision required for the track circuit and SIL 4 level. The SIL 4 level is thus reachable by an adjustment of the set of orthogonal functions. Our major contributions to railway engineering signalling science are i) Train space localization is precisely defined by a calibration system. The operation bypasses the GSM-R radio system of the ERTMS system. Moreover, the track circuit is naturally protected against radio-type jammers. After the calibration operation, the track circuit is autonomous. ii) A mathematical topology adapted to train space localization by following the train through a linear time filtering of the received signal. Track sections are numerically defined and can be modified with a software update. The system was numerically simulated, and results were beyond our expectations. We achieved a precision of one meter. Rail-ground and rail-wheel impedance sensitivity analysis gave excellent results. Results are now complete and ready to be published. This work was initialised as a research project of the French Railways developed by the Pi-Ramses Company under SNCF contract and required five years to obtain the results. This track circuit is already at Level 3 of the ERTMS system, and it will be much cheaper to implement and to work. The traffic regulation is based on variable length track sections. As the traffic growths, the maximum speed is reduced, and the track section lengths are decreasing. It is possible if the elementary track section is correctly defined for the minimum speed and if every track section is able to emit with variable frequencies.Keywords: track section, track circuits, space-time crossing, adaptive track section, automatic railway signalling
Procedia PDF Downloads 33111815 Prediction of the Performance of a Bar-Type Piezoelectric Vibration Actuator Depending on the Frequency Using an Equivalent Circuit Analysis
Authors: J. H. Kim, J. H. Kwon, J. S. Park, K. J. Lim
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This paper has investigated a technique that predicts the performance of a bar-type unimorph piezoelectric vibration actuator depending on the frequency. This paper has been proposed an equivalent circuit that can be easily analyzed for the bar-type unimorph piezoelectric vibration actuator. In the dynamic analysis, rigidity and resonance frequency, which are important mechanical elements, were derived using the basic beam theory. In the equivalent circuit analysis, the displacement and bandwidth of the piezoelectric vibration actuator depending on the frequency were predicted. Also, for the reliability of the derived equations, the predicted performance depending on the shape change was compared with the result of a finite element analysis program.Keywords: actuator, piezoelectric, performance, unimorph
Procedia PDF Downloads 46411814 Musical Tesla Coil with Faraday Box Controlled by a GNU Radio
Authors: Jairo Vega, Fabian Chamba, Jordy Urgiles
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In this work, the implementation of a Matlabcontrolled Musical Tesla Coil and external audio signals was presented. First, the audio signal was obtained from a mobile device and processed in Matlab to modify it, adding noise or other desired effects. Then, the processed signal was passed through a preamplifier to increase its amplitude to a level suitable for further amplification through a power amplifier, which was part of the current driver circuit of the Tesla coil. To get the Tesla coil to generate music, a circuit capable of modulating and generating the audio signal by manipulating electrical discharges was used. To visualize and listen to these discharges, a small Faraday cage was built to attenuate the external electric fields. Finally, the implementation of the musical Tesla coil was concluded. However, it was observed that the audio signal volume was very low, and the components used heated up quickly. Due to these limitations, it was determined that the project could not be connected to power for long periods of time.Keywords: Tesla coil, plasma, electrical signals, GNU Radio
Procedia PDF Downloads 9711813 A Soft Error Rates (SER) Evaluation Method of Combinational Logic Circuit Based on Linear Energy Transfers
Authors: Man Li, Wanting Zhou, Lei Li
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Communication stability is the primary concern of communication satellites. Communication satellites are easily affected by particle radiation to generate single event effects (SEE), which leads to soft errors (SE) of the combinational logic circuit. The existing research on soft error rates (SER) of the combined logic circuit is mostly based on the assumption that the logic gates being bombarded have the same pulse width. However, in the actual radiation environment, the pulse widths of the logic gates being bombarded are different due to different linear energy transfers (LET). In order to improve the accuracy of SER evaluation model, this paper proposes a soft error rate evaluation method based on LET. In this paper, the authors analyze the influence of LET on the pulse width of combinational logic and establish the pulse width model based on the LET. Based on this model, the error rate of test circuit ISCAS'85 is calculated. The effectiveness of the model is proved by comparing it with previous experiments.Keywords: communication satellite, pulse width, soft error rates, LET
Procedia PDF Downloads 17211812 Improving the LDMOS Temperature Compensation Bias Circuit to Optimize Back-Off
Authors: Antonis Constantinides, Christos Yiallouras, Christakis Damianou
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The application of today's semiconductor transistors in high power UHF DVB-T linear amplifiers has evolved significantly by utilizing LDMOS technology. This fact provides engineers with the option to design a single transistor signal amplifier which enables output power and linearity that was unobtainable previously using bipolar junction transistors or later type first generation MOSFETS. The quiescent current stability in terms of thermal variations of the LDMOS guarantees a robust operation in any topology of DVB-T signal amplifiers. Otherwise, progressively uncontrolled heat dissipation enhancement on the LDMOS case can degrade the amplifier’s crucial parameters in regards to the gain, linearity, and RF stability, resulting in dysfunctional operation or a total destruction of the unit. This paper presents one more sophisticated approach from the traditional biasing circuits used so far in LDMOS DVB-T amplifiers. It utilizes a microprocessor control technology, providing stability in topologies where IDQ must be perfectly accurate.Keywords: LDMOS, amplifier, back-off, bias circuit
Procedia PDF Downloads 33911811 Design and Characterization of CMOS Readout Circuit for ISFET and ISE Based Sensors
Authors: Yuzman Yusoff, Siti Noor Harun, Noor Shelida Salleh, Tan Kong Yew
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This paper presents the design and characterization of analog readout interface circuits for ion sensitive field effect transistor (ISFET) and ion selective electrode (ISE) based sensor. These interface circuits are implemented using MIMOS’s 0.35um CMOS technology and experimentally characterized under 24-leads QFN package. The characterization evaluates the circuit’s functionality, output sensitivity and output linearity. Commercial sensors for both ISFET and ISE are employed together with glass reference electrode during testing. The test result shows that the designed interface circuits manage to readout signals produced by both sensors with measured sensitivity of ISFET and ISE sensor are 54mV/pH and 62mV/decade, respectively. The characterized output linearity for both circuits achieves above 0.999 rsquare. The readout also has demonstrated reliable operation by passing all qualifications in reliability test plan.Keywords: readout interface circuit (ROIC), analog interface circuit, ion sensitive field effect transistor (ISFET), ion selective electrode (ISE), ion sensor electronics
Procedia PDF Downloads 31411810 Integration from Laboratory to Industrialization for Hybrid Printed Electronics
Authors: Ahmed Moulay, Mariia Zhuldybina, Mirko Torres, Mike Rozel, Ngoc Duc Trinh, Chloé Bois
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Hybrid printed electronics technology (HPE) provides innovative opportunities to enhance conventional electronics applications, which are often based on printed circuit boards (PCB). By combining the best of both performance from conventional electronic components and the flexibility from printed circuits makes it possible to manufacture HPE at high volumes using roll-to-roll printing processes. However, several challenges must be overcome in order to accurately integrate an electronic component on a printed circuit. In this presentation, we will demonstrate the integration process of electronic components from the lab scale to the industrialization. Both the printing quality and the integration technique must be studied to define the optimal conditions. To cover the parameters that influence the print quality of the printed circuit, different printing processes, flexible substrates, and conductive inks will be used to determine the optimized printing process/ink/substrate system. After the systems is selected, an electronic component of 2.5 mm2 chip size will be integrated to validate the functionality of the printed, electronic circuit. Critical information such as the conductive adhesive, the curing conditions, and the chip encapsulation will be determined. Thanks to these preliminary results, we are able to demonstrate the chip integration on a printed circuit using industrial equipment, showing the potential of industrialization, compatible using roll-to-roll printing and integrating processes.Keywords: flat bed screen-printing, hybrid printed electronics, integration, large-scale production, roll-to-roll printing, rotary screen printing
Procedia PDF Downloads 17711809 Design and Characterization of a CMOS Process Sensor Utilizing Vth Extractor Circuit
Authors: Rohana Musa, Yuzman Yusoff, Chia Chieu Yin, Hanif Che Lah
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This paper presents the design and characterization of a low power Complementary Metal Oxide Semiconductor (CMOS) process sensor. The design is targeted for implementation using Silterra’s 180 nm CMOS process technology. The proposed process sensor employs a voltage threshold (Vth) extractor architecture for detection of variations in the fabrication process. The process sensor generates output voltages in the range of 401 mV (fast-fast corner) to 443 mV (slow-slow corner) at nominal condition. The power dissipation for this process sensor is 6.3 µW with a supply voltage of 1.8V with a silicon area of 190 µm X 60 µm. The preliminary result of this process sensor that was fabricated indicates a close resemblance between test and simulated results.Keywords: CMOS process sensor, PVT sensor, threshold extractor circuit, Vth extractor circuit
Procedia PDF Downloads 17511808 A Novel Approach to Asynchronous State Machine Modeling on Multisim for Avoiding Function Hazards
Authors: Parisi L., Hamili D., Azlan N.
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The aim of this study was to design and simulate a particular type of Asynchronous State Machine (ASM), namely a ‘traffic light controller’ (TLC), operated at a frequency of 0.5 Hz. The design task involved two main stages: firstly, designing a 4-bit binary counter using J-K flip flops as the timing signal and subsequently, attaining the digital logic by deploying ASM design process. The TLC was designed such that it showed a sequence of three different colours, i.e. red, yellow and green, corresponding to set thresholds by deploying the least number of AND, OR and NOT gates possible. The software Multisim was deployed to design such circuit and simulate it for circuit troubleshooting in order for it to display the output sequence of the three different colours on the traffic light in the correct order. A clock signal, an asynchronous 4-bit binary counter that was designed through the use of J-K flip flops along with an ASM were used to complete this sequence, which was programmed to be repeated indefinitely. Eventually, the circuit was debugged and optimized, thus displaying the correct waveforms of the three outputs through the logic analyzer. However, hazards occurred when the frequency was increased to 10 MHz. This was attributed to delays in the feedback being too high.Keywords: asynchronous state machine, traffic light controller, circuit design, digital electronics
Procedia PDF Downloads 42911807 Depth of Penetration and Nature of Interferential Current in Cutaneous, Subcutaneous and Muscle Tissues
Authors: A. Beatti, L. Chipchase, A. Rayner, T. Souvlis
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The aims of this study were to investigate the depth of interferential current (IFC) penetration through soft tissue and to investigate the area over which IFC spreads during clinical application. Premodulated IFC and ‘true’ IFC at beat frequencies of 4, 40 and 90Hz were applied via four electrodes to the distal medial thigh of 15 healthy subjects. The current was measured via three Teflon coated fine needle electrodes that were inserted into the superficial layer of skin, then into the subcutaneous tissue (≈1 cm deep) and then into muscle tissue (≈2 cm deep). The needle electrodes were placed in the middle of the four IFC electrodes, between two channels and outside the four electrodes. Readings were taken at each tissue depth from each electrode during each treatment frequency then digitized and stored for analysis. All voltages were greater at all depths and locations than baseline (p < 0.01) and voltages decreased with depth (P=0.039). Lower voltages of all currents were recorded in the middle of the four electrodes with the highest voltage being recorded outside the four electrodes in all depths (P=0.000).For each frequency of ‘true’ IFC, the voltage was higher in the superficial layer outside the electrodes (P ≤ 0.01).Premodulated had higher voltages along the line of one circuit (P ≤ 0.01). Clinically, IFC appears to pass through skin layers to depth and is more efficient than premodulated IFC when targeting muscle tissue.Keywords: electrotherapy, interferential current, interferential therapy, medium frequency current
Procedia PDF Downloads 34711806 Piezoelectric based Passive Vibration Control of Composite Turbine Blade using Shunt Circuit
Authors: Kouider Bendine, Zouaoui Satla, Boukhoulda Farouk Benallel, Shun-Qi Zhang
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Turbine blades are subjected to a variety of loads, lead to an undesirable vibration. Such vibration can cause serious damages or even lead to a total failure of the blade. The present paper addresses the vibration control of turbine blade. The study aims to propose a passive vibration control using piezoelectric material. the passive control is effectuated by shunting an RL circuit to the piezoelectric patch in a parallel configuration. To this end, a Finite element model for the blade with the piezoelectric patch is implemented in ANSYS APDL. The model is then subjected to a harmonic frequency-based analysis for the case of control on and off. The results show that the proposed methodology was able to reduce blade vibration by 18%.Keywords: blade, active piezoelectric vibration control, finite element., shunt circuit
Procedia PDF Downloads 10211805 Frequency Selective Filters for Estimating the Equivalent Circuit Parameters of Li-Ion Battery
Authors: Arpita Mondal, Aurobinda Routray, Sreeraj Puravankara, Rajashree Biswas
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The most difficult part of designing a battery management system (BMS) is battery modeling. A good battery model can capture the dynamics which helps in energy management, by accurate model-based state estimation algorithms. So far the most suitable and fruitful model is the equivalent circuit model (ECM). However, in real-time applications, the model parameters are time-varying, changes with current, temperature, state of charge (SOC), and aging of the battery and this make a great impact on the performance of the model. Therefore, to increase the equivalent circuit model performance, the parameter estimation has been carried out in the frequency domain. The battery is a very complex system, which is associated with various chemical reactions and heat generation. Therefore, it’s very difficult to select the optimal model structure. As we know, if the model order is increased, the model accuracy will be improved automatically. However, the higher order model will face the tendency of over-parameterization and unfavorable prediction capability, while the model complexity will increase enormously. In the time domain, it becomes difficult to solve higher order differential equations as the model order increases. This problem can be resolved by frequency domain analysis, where the overall computational problems due to ill-conditioning reduce. In the frequency domain, several dominating frequencies can be found in the input as well as output data. The selective frequency domain estimation has been carried out, first by estimating the frequencies of the input and output by subspace decomposition, then by choosing the specific bands from the most dominating to the least, while carrying out the least-square, recursive least square and Kalman Filter based parameter estimation. In this paper, a second order battery model consisting of three resistors, two capacitors, and one SOC controlled voltage source has been chosen. For model identification and validation hybrid pulse power characterization (HPPC) tests have been carried out on a 2.6 Ah LiFePO₄ battery.Keywords: equivalent circuit model, frequency estimation, parameter estimation, subspace decomposition
Procedia PDF Downloads 15011804 Low Power, Highly Linear, Wideband LNA in Wireless SOC
Authors: Amir Mahdavi
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In this paper a highly linear CMOS low noise amplifier (LNA) for ultra-wideband (UWB) applications is proposed. The proposed LNA uses a linearization technique to improve second and third-order intercept points (IIP3). The linearity is cured by repealing the common-mode section of all intermodulation components from the cascade topology current with optimization of biasing current use symmetrical and asymmetrical circuits for biasing. Simulation results show that maximum gain and noise figure are 6.9dB and 3.03-4.1dB over a 3.1–10.6 GHz, respectively. Power consumption of the LNA core and IIP3 are 2.64 mW and +4.9dBm respectively. The wideband input impedance matching of LNA is obtained by employing a degenerating inductor (|S11|<-9.1 dB). The circuit proposed UWB LNA is implemented using 0.18 μm based CMOS technology.Keywords: highly linear LNA, low-power LNA, optimal bias techniques
Procedia PDF Downloads 28011803 Use of Short Piles for Stabilizing the Side Slope of the Road Embankment along the Canal
Authors: Monapat Sasingha, Suttisak Soralump
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This research presents the behavior of slope of the road along the canal stabilized by short piles. In this investigation, the centrifuge machine was used, modelling the condition of the water levels in the canal. The centrifuge tests were performed at 35 g. To observe the movement of the soil, visual analysis was performed to evaluate the failure behavior. Conclusively, the use of short piles to stabilize the canal slope proved to be an effective solution. However, the certain amount of settlement was found behind the short pile rows.Keywords: centrifuge test, slope failure, embankment, stability of slope
Procedia PDF Downloads 26811802 Current Characteristic of Water Electrolysis to Produce Hydrogen, Alkaline, and Acid Water
Authors: Ekki Kurniawan, Yusuf Nur Jayanto, Erna Sugesti, Efri Suhartono, Agus Ganda Permana, Jaspar Hasudungan, Jangkung Raharjo, Rintis Manfaati
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The purpose of this research is to study the current characteristic of the electrolysis of mineral water to produce hydrogen, alkaline water, and acid water. Alkaline and hydrogen water are believed to have health benefits. Alkaline water containing hydrogen can be an anti-oxidant that captures free radicals, which will increase the immune system. In Indonesia, there are two existing types of alkaline water producing equipment, but the installation is complicated, and the price is relatively expensive. The electrolysis process is slow (6-8 hours) since they are locally made using 311 VDC full bridge rectifier power supply. This paper intends to discuss how to make hydrogen and alkaline water by a simple portable mineral water ionizer. This is an electrolysis device that is easy to carry and able to separate ions of mineral water into acidic and alkaline water. With an electric field, positive ions will be attracted to the cathode, while negative ions will be attracted to the anode. The circuit equivalent can be depicted as RLC transient ciruit. The diode component ensures that the electrolytic current is direct current. Switch S divides the switching times t1, t2, and t3. In the first stage up to t1, the electrolytic current increases exponentially, as does the inductor charging current (L). The molecules in drinking water experience magnetic properties. The direction of the dipole ions, which are random in origin, will regularly flare with the direction of the electric field. In the second stage up to t2, the electrolytic current decreases exponentially, just like the charging current of a capacitor (C). In the 3rd stage, start t3 until it tends to be constant, as is the case with the current flowing through the resistor (R).Keywords: current electrolysis, mineral water, ions, alkaline and acid waters, inductor, capacitor, resistor
Procedia PDF Downloads 11311801 Analysis of a Power Factor Correction Converter for Light Emitting Diode Driver Application
Authors: Edwina G. Rodrigues, S. J. Bindhu, A. V. Rajesh
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This paper proposes a switched capacitor based driver circuit for high power light emitting diodes with a front end rectifier. LEDs are low-voltage light sources, requiring a constant DC voltage or current to operate optimally. LEDs, therefore, require a device that can convert incoming AC power to the proper DC voltage, and regulate the current flowing through the LED during operation. Proposed topology has a front end converter. It is an AC-DC rectifier that works on bridgeless boost topology which shapes the input current waveform. The front end converter is followed by a DC-DC converter which provides a constant DC voltage across the LEDs. A 12V AC input is given to the input of frontend converter which rectifies and boost the voltage to 24v DC and gives it to the DC-DC converter. The DC-DC converter converts the 24V DC and regulates this constant DC voltage across the LEDs.Keywords: bridgeless rectifier, power factor correction(PFC), SC converter, total harmonic distortion (THD)
Procedia PDF Downloads 873