Search results for: studio architecture

Authors: Siddhartha Bhattacharyya, Paramartha Dutta, Ujjwal Maulik, Prashanta Kumar Nandi

Abstract:

The paper describes a self supervised parallel self organizing neural network (PSONN) architecture for true color image segmentation. The proposed architecture is a parallel extension of the standard single self organizing neural network architecture (SONN) and comprises an input (source) layer of image information, three single self organizing neural network architectures for segmentation of the different primary color components in a color image scene and one final output (sink) layer for fusion of the segmented color component images. Responses to the different shades of color components are induced in each of the three single network architectures (meant for component level processing) by applying a multilevel version of the characteristic activation function, which maps the input color information into different shades of color components, thereby yielding a processed component color image segmented on the basis of the different shades of component colors. The number of target classes in the segmented image corresponds to the number of levels in the multilevel activation function. Since the multilevel version of the activation function exhibits several subnormal responses to the input color image scene information, the system errors of the three component network architectures are computed from some subnormal linear index of fuzziness of the component color image scenes at the individual level. Several multilevel activation functions are employed for segmentation of the input color image scene using the proposed network architecture. Results of the application of the multilevel activation functions to the PSONN architecture are reported on three real life true color images. The results are substantiated empirically with the correlation coefficients between the segmented images and the original images.

Keywords: Colour image segmentation, fuzzy set theory, multi-level activation functions, parallel self-organizing neural network.

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Authors: Adrian Perreau de Pinninck, David Dupplaw, Spyros Kotoulas, Ronny Siebes

Abstract:

Web services are pieces of software that can be invoked via a standardized protocol. They can be combined via formalized taskflow languages. The Open Knowledge system is a fully distributed system using P2P technology, that allows users to publish the setaskflows, and programmers to register their web services or publish implementations of them, for the roles described in these workflows.Besides this, the system offers the functionality to select a peer that could coordinate such an interaction model and inform web services when it is their 'turn'. In this paper we describe the architecture and implementation of the Open Knowledge Kernel which provides the core functionality of the Open Knowledge system.

Keywords: Architecture, P2P, Web Services, Semantic Web

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Authors: M. Bakhouya, S. A. Bahra, T. El-Ghazawi

Abstract:

The Partitioned Global Address Space (PGAS) programming paradigm offers ease-of-use in expressing parallelism through a global shared address space while emphasizing performance by providing locality awareness through the partitioning of this address space. Therefore, the interest in PGAS programming languages is growing and many new languages have emerged and are becoming ubiquitously available on nearly all modern parallel architectures. Recently, new parallel machines with multiple cores are designed for targeting high performance applications. Most of the efforts have gone into benchmarking but there are a few examples of real high performance applications running on multicore machines. In this paper, we present and evaluate a parallelization technique for implementing a local DNA sequence alignment algorithm using a PGAS based language, UPC (Unified Parallel C) on a chip multithreading architecture, the UltraSPARC T1.

Keywords: Partitioned Global Address Space, Unified Parallel C, Multicore machines, Multi-threading Architecture, Sequence alignment.

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Authors: Dody Ismoyo, Mohammad Awan, Norashikin Yahya

Abstract:

The presence of harmonic in power system is a major concerned to power engineers for many years. With the increasing usage of nonlinear loads in power systems, the harmonic pollution becomes more serious. One of the widely used computation algorithm for harmonic analysis is fast Fourier transform (FFT). In this paper, a harmonic analyzer using FFT was implemented on TMS320C6713 DSK. The supply voltage of 240 V 59 Hz is stepped down to 5V using a voltage divider in order to match the power rating of the DSK input. The output from the DSK was displayed on oscilloscope and Code Composer Studio™ software. This work has demonstrated the possibility of analyzing the 240V power supply harmonic content using the DSK board.

Keywords: Harmonic Analysis, DSP.

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Authors: Ionel Zagan, Vasile Gheorghita Gaitan

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The development of CPUs and of real-time systems based on them made it possible to use time at increasingly low resolutions. Together with the scheduling methods and algorithms, time organizing has been improved so as to respond positively to the need for optimization and to the way in which the CPU is used. This presentation contains both a detailed theoretical description and the results obtained from research on improving the performances of the nMPRA (Multi Pipeline Register Architecture) processor by implementing specific functions in hardware. The proposed CPU architecture has been developed, simulated and validated by using the FPGA Virtex-7 circuit, via a SoC project. Although the nMPRA processor hardware structure with five pipeline stages is very complex, the present paper presents and analyzes the tests dedicated to the implementation of the CPU and of the memory on-chip for instructions and data. In order to practically implement and test the entire SoC project, various tests have been performed. These tests have been performed in order to verify the drivers for peripherals and the boot module named Bootloader.

Keywords: Hardware scheduler, nMPRA processor, real-time systems, scheduling methods.

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Authors: Mohammad Ehson Rangiha, Bill Karakostas

Abstract:

Social Business Process Management (SBPM) promises to overcome limitations of traditional BPM by allowing flexible process design and enactment through the involvement of users from a social community. This paper proposes a meta-model and architecture for socially driven business process management systems. It discusses the main facets of the architecture such as goalbased role assignment that combines social recommendations with user profile, and process recommendation, through a real example of a charity organization.

Keywords: Business Process Management, Goal-Based Modelling, Process Recommendation Social Collaboration, Social BPM.

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Authors: Muthana Saleh Alalaki, Michael Opoku Agyeman

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The growth in the number of Intellectual Properties (IPs) or the number of cores on the same chip becomes a critical issue in System-on-Chip (SoC) due to the intra-communication problem between the chip elements. As a result, Network-on-Chip (NoC) has emerged as a system architecture to overcome intra-communication issues. This paper presents a study of recent contributions on simulation tools for NoC. Furthermore, an overview of NoC is covered as well as a comparison between some NoC simulators to help facilitate research in on-chip communication.

Keywords: Network-on-Chip, System-on-Chip, embedded systems, computer architecture.

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Authors: Mr. Khalid I. Saad, Ms. Nusrat Afrin, Mr. Rajib Mikail

Abstract:

The stop watch is used to measure the time required for a certain event. This is different from normal clocks in many ways, one of which is the accuracy of time. The stop watch requires much more accuracy than the normal clocks. In this paper, an ATmega8535 microcontroller was used to control the stop watch, by which perfect accuracy can be ensured. For compiling the C code and for loading the compiled .hex file into the microcontroller, AVR studio and PonyProg were used respectively. The stop watch is also different from traditional stop watches, as it contains two different timing modes namely 'Split timing' and 'Lap timing'.

Keywords: Stop Watch, Microcontroller, Split timing, Laptiming, LCD.

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Authors: Rahmatollah Amirjani

Abstract:

By the emergence of the debate over the failure of Regionalism in the late 1970s, Critical Regional­ism was introduced as a different way to respond to the state of architecture in the post-war era. Critical Regionalism is most often understood as a discourse that not only mediates the language of modern architecture with the local cultures but also revives the relation between architecture and spectator as indexed by capitalism. Since the inception of Critical Regionalism, a large number of architectural practices have emerged around the globe; however, the work of the well-known Portuguese architect, Álvaro Siza, is considered as a unique case amongst works associated with the discourse of Critical Regionalism. This paper intends to respond to a number of questions, including; what are the origins of Critical Regionalism? How does Siza’s design strategy correspond to the thematic of Critical Regionalism? How does Siza recover the relation between object and subject in most of his projects? Using Siza’s housing project for the Malagueira district in Évora, Portugal, this article will attempt to answer these questions, and highlight Alvaro Siza’s design procedure which goes beyond the existing discourse of Critical Regionalism and contributes to our understanding of this practice.

Keywords: Alvaro Siza, critical regionalism, Malagueira Housing, placelessness.

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Authors: Umar Manzoor, Kiran Ijaz, Wajiha Shamim, Arshad Ali Shahid

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Transaction management is one of the most crucial requirements for enterprise application development which often require concurrent access to distributed data shared amongst multiple application / nodes. Transactions guarantee the consistency of data records when multiple users or processes perform concurrent operations. Existing Fault Tolerance Infrastructure for Mobile Agents (FTIMA) provides a fault tolerant behavior in distributed transactions and uses multi-agent system for distributed transaction and processing. In the existing FTIMA architecture, data flows through the network and contains personal, private or confidential information. In banking transactions a minor change in the transaction can cause a great loss to the user. In this paper we have modified FTIMA architecture to ensure that the user request reaches the destination server securely and without any change. We have used triple DES for encryption/ decryption and MD5 algorithm for validity of message.

Keywords: Distributed Transaction, Security, Mobile Agents, FTIMA Architecture.

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Authors: S.S.Mohanavalli, Sheila Anand

Abstract:

This paper proposes a novel architecture for At- Home medical care which enables senior citizens, patients with chronic ailments and patients requiring post- operative care to be remotely monitored in the comfort of their homes. This architecture is implemented using sensors and wireless networking for transmitting patient data to the hospitals, health- care centers for monitoring by medical professionals. Patients are equipped with sensors to measure their physiological parameters, like blood pressure, pulse rate etc. and a Wearable Data Acquisition Unit is used to transmit the patient sensor data. Medical professionals can be alerted to any abnormal variations in these values for diagnosis and suitable treatment. Security threats and challenges inherent to wireless communication and sensor network have been discussed and a security mechanism to ensure data confidentiality and source authentication has been proposed. Symmetric key algorithm AES has been used for encrypting the data and a patent-free, two-pass block cipher mode CCFB has been used for implementing semantic security.

Keywords: data confidentiality, integrity, remotemonitoring, source authentication

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Authors: M. Balfaqih, S. Haseeb, M. H. Mazlan, S. N. Hasnan, O. Mahmoud, A. Hashim

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Wireless LAN technologies have picked up momentum in the recent years due to their ease of deployment, cost and availability. The era of wireless LAN has also given rise to unique applications like VOIP, IPTV and unified messaging. However, these real-time applications are very sensitive to network and handoff latencies. To successfully support these applications, seamless roaming during the movement of mobile station has become crucial. Nowadays, centralized architecture models support roaming in WLANs. They have the ability to manage, control and troubleshoot large scale WLAN deployments. This model is managed by Control and Provision of Wireless Access Point protocol (CAPWAP). This paper covers the CAPWAP architectural solution along with its proposals that have emerged. Based on the literature survey conducted in this paper, we found that the proposed algorithms to reduce roaming latency in CAPWAP architecture do not support seamless roaming. Additionally, they are not sufficient during the initial period of the network. This paper also suggests important design consideration for mobility support in future centralized IEEE 802.11 networks.

Keywords: 802.11, centralized Architecture, CAPWAP, Roaming.

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Authors: A. El Hamdouni, J. Zbitou, A. Tajmouati, L. El Abdellaoui, A. Errkik, A. Tribak, M. Latrach

Abstract:

This paper presents a novel fractal antenna structure proposed for UWB (Ultra – Wideband) applications. The frequency band 3.1-10.6GHz released by FCC (Federal Communication Commission) as the commercial operation of UWB has been chosen as frequency range for this antenna based on coplanar waveguide (CPW) feed and circular shapes fulfilled according to fractal geometry. The proposed antenna is validated and designed by using an FR4 substrate with overall area of 34x43 mm2. The simulated results performed by CST-Microwave Studio and compared by ADS (Advanced Design System) show good matching input impedance with return loss less than -10dB between 2.9 GHz and 11 GHz.

Keywords: Fractal antenna, Fractal Geometry, CPW Feed, UWB, FCC.

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Authors: Jihan Abdulazeez Ahmed, Adnan Mohsin Abdulazeez Brifcani

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This paper suggests a new internal architecture of holon based on feature selection model using the combination of Bees Algorithm (BA) and Artificial Neural Network (ANN). BA is used to generate features while ANN is used as a classifier to evaluate the produced features. Proposed system is applied on the Wine dataset, the statistical result proves that the proposed system is effective and has the ability to choose informative features with high accuracy.

Keywords: Artificial Neural Networks, Holonic Approach, Feature Selection, Bee Algorithm.

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Authors: Bing Yu , Xingshi He

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In this paper, Differential Evolution (DE) algorithm, a new promising evolutionary algorithm, is proposed to train Radial Basis Function (RBF) network related to automatic configuration of network architecture. Classification tasks on data sets: Iris, Wine, New-thyroid, and Glass are conducted to measure the performance of neural networks. Compared with a standard RBF training algorithm in Matlab neural network toolbox, DE achieves more rational architecture for RBF networks. The resulting networks hence obtain strong generalization abilities.

Keywords: differential evolution, neural network, Rbf function

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Authors: Ahmed Madian, Muaz Aljarhi

Abstract:

Coordinate Rotation Digital Computer (CORDIC) is a unique digital computing unit intended for the computation of mathematical operations and functions. This paper presents A multi CORDIC processor that integrates different CORDIC architectures on a single FPGA chip and allows the user to select the CORDIC architecture to proceed with based on what he wants to calculate and his needs. Synthesis show that radix 2 CORDIC has the lowest clock delay, radix 8 CORDIC has the highest LUT usage and lowest register usage while Hybrid Radix 4 CORDIC had the highest clock delay.

Keywords: Multi, CORDIC, FPGA, Processor.

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Authors: Rizwan Asghar, Dake Liu

Abstract:

A hardware efficient, multi mode, re-configurable architecture of interleaver/de-interleaver for multiple standards, like DVB, WiMAX and WLAN is presented. The interleavers consume a large part of silicon area when implemented by using conventional methods as they use memories to store permutation patterns. In addition, different types of interleavers in different standards cannot share the hardware due to different construction methodologies. The novelty of the work presented in this paper is threefold: 1) Mapping of vital types of interleavers including convolutional interleaver onto a single architecture with flexibility to change interleaver size; 2) Hardware complexity for channel interleaving in WiMAX is reduced by using 2-D realization of the interleaver functions; and 3) Silicon cost overheads reduced by avoiding the use of small memories. The proposed architecture consumes 0.18mm2 silicon area for 0.12μm process and can operate at a frequency of 140 MHz. The reduced complexity helps in minimizing the memory utilization, and at the same time provides strong support to on-the-fly computation of permutation patterns.

Keywords: Hardware interleaver implementation, WiMAX, DVB, block interleaver, convolutional interleaver, hardwaremultiplexing.

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Authors: Patrycja J. Haupt

Abstract:

Today we tend to go back to the past to our root relation to nature. Therefore in search of friendly spaces there are elements of natural environment introduced as elements of spatial composition. Though reinvented through the use of the new substance such as greenery, water etc. made possible by state of the art technologies, still, in principal, they remain the same. As a result, sustainable design, based upon the recognized means of composition in addition to the relation of architecture and urbanism vs. nature introduces a new aesthetical values into architectural and urban space.

Keywords: architectural composition, biodiversity, elements of composition, green architecture, sustainable design, urban composition, water management.

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Authors: Amal A. Abdel-Sattar

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The curriculum of architecture department in Prince Sultan University includes ‘Building Surveying’ course which is usually a part of civil engineering courses. As a fundamental requirement of the course, it requires a strong background in mathematics and physics, which are not usually preferred subjects to the architecture students and many of them are not giving the required and necessary attention to these courses during their preparation year before commencing their architectural study. This paper introduces the concept and the methodology of the student-centered learning approach in the course of building surveying for architects. One of the major outcomes is the improvement in the students’ involvement in the course and how this will cover and strength their analytical weak points and improve their mathematical skills. The study is conducted through three semesters with a total number of 99 students. The effectiveness of the student-centered learning approach is studied using the student survey at the end of each semester and teacher observations. This survey showed great acceptance of the students for these methods. Also, the teachers observed a great improvement in the students’ mathematical abilities and how keener they became in attending the classes which were clearly reflected on the low absence record.

Keywords: Architecture, building surveying, student-centered learning, teaching, and learning.

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Authors: Mikulas Patocka

Abstract:

This paper presents an architecture of current filesystem implementations as well as our new filesystem SpadFS and operating system Spad with rewritten VFS layer targeted at high performance I/O applications. The paper presents microbenchmarks and real-world benchmarks of different filesystems on the same kernel as well as benchmarks of the same filesystem on different kernels – enabling the reader to make conclusion how much is the performance of various tasks affected by operating system and how much by physical layout of data on disk. The paper describes our novel features–most notably continuous allocation of directories and cross-file readahead – and shows their impact on performance.

Keywords: Filesystem, operating system, VFS, performance, readahead

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Authors: Rinkaj Goyal, Pravin Chandra, Yogesh Singh

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In this paper we describe our efforts to design and implement an agent development framework that has the potential to scale to the size of any underlying network suitable for various ECommerce activities. The main novelty in our framework is it-s capability to allow the development of sophisticated, secured agents which are simple enough to be practical. We have adopted FIPA agent platform reference Model as backbone for implementation along with XML for agent Communication and Java Cryptographic Extension and architecture to realize the security of communication information between agents. The advantage of our architecture is its support of agents development in different languages and Communicating with each other using a more open standard i.e. XML

Keywords: Agent, Agent Development Framework, Agent Coordination, Security

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Authors: Serin Lee, Takashi Kubota, Ichiro Nakatani

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The approaches to make an agent generate intelligent actions in the AI field might be roughly categorized into two ways–the classical planning and situated action system. It is well known that each system have its own strength and weakness. However, each system also has its own application field. In particular, most of situated action systems do not directly deal with the logical problem. This paper first briefly mentions the novel action generator to situatedly extract a set of actions, which is likely to help to achieve the goal at the current situation in the relaxed logical space. After performing the action set, the agent should recognize the situation for deciding the next likely action set. However, since the extracted action is an approximation of the action which helps to achieve the goal, the agent could be caught into the deadlock of the problem. This paper proposes the newly developed hybrid architecture to solve the problem, which combines the novel situated action generator with the conventional planner. The empirical result in some planning domains shows that the quality of the resultant path to the goal is mostly acceptable as well as deriving the fast response time, and suggests the correlation between the structure of problems and the organization of each system which generates the action.

Keywords: Situated reasoning, situated action, planning, hybrid architecture

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Authors: Hatice Özbek, Caner Çil, Ahmet Rodoplu

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Automotive lighting is the leading function in the configuration of vehicle architecture. Especially headlights and taillights from external lighting functions are among the structures that determine the stylistic character of the vehicle. At the same time, the fact that lighting functions are related to many other functions brings along difficulties in design. Customers expect maximum quality from the vehicle. In these circumstances, it is necessary to make designs that aim to keep the performance of bulbs with limited working lives at the highest level. With this study, the factors that influence the working lives of filament lamps were examined and bulb explosions that can occur sooner than anticipated in the future were prevented while the vehicle was still in the design phase by determining the relations with electrical, dynamical and static variables. Especially the filaments of the bulbs used in the front lighting of the vehicle are deformed in a shorter time due to the high voltage requirement. In addition to this, rear lighting lamps vibrate as a result of the tailgate opening and closing and cause the filaments to be exposed to high stress. With this study, the findings that cause bulb explosions were evaluated. Among the most important findings: 1. The structure of the cables to the lighting functions of the vehicle and the effect of the voltage values are drawn; 2. The effect of the vibration to bulb throughout the life of the vehicle; 3 The effect of the loads carried to bulb while the vehicle doors are opened and closed. At the end of the study, the maximum performance was established in the bulb lifetimes with the optimum changes made in the vehicle architecture based on the findings obtained.

Keywords: Vehicle architecture, automotive lighting functions, filament lamps, bulb lifetime.

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Authors: Chih-Jian Hu, Chung-Chih Cheng, Hsiao-Yuan Wu., Nien-Tzu Chao

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Increasing user comfort and reducing operation costs have always been primary objectives of lighting control strategies in a building. This paper proposes an architecture of the lighting control system for a daylit office. The system consists of the lighting controller, A/D & D/A converter, dimmable LED lights, and the lighting management software. Verification tests are conducted using the proposed system specialized for the interior lighting of a open-plan office. The results showed the proposed architecture of the lighting system would improve the overall system reliability, lower the system cost, and provide ease of installation and maintenance.

Keywords: control, dimming, LED, lighting.

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Authors: Mohamed Kholif, Suaad Awad Mohamed

Abstract:

In this paper we present semantic assistant agent (SAA), an open source digital library agent which takes user query for finding information in the digital library and takes resources- metadata and stores it semantically. SAA uses Semantic Web to improve browsing and searching for resources in digital library. All metadata stored in the library are available in RDF format for querying and processing by SemanSreach which is a part of SAA architecture. The architecture includes a generic RDF-based model that represents relationships among objects and their components. Queries against these relationships are supported by an RDF triple store.

Keywords: Digital Library, Dublin Core, Ontology, Semantic web.

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Authors: Takahiro Togawa, Nguyen Huu Phuc, Shigeyuki Haruyama, Oke Oktavianty

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Our research focuses on a framework which analyses the relationship between product/process architecture, manufacturing organizational capability and manufacturing "implicit competitiveness" in order to improve manufacturing implicit competitiveness. We found that 1) there is a relationship between architecture-based manufacturing organizational capability and manufacturing implicit competitiveness, and 2) analysis and measures conducted in manufacturing organizational capability proved effective to improve manufacturing implicit competitiveness.

Keywords: Implicit competitiveness, QCD, Monozukuri capability.

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Authors: Nadeem Iftikhar, Zouhaib Zafar, Shaukat Ali

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Efficient retrieval of multimedia objects has gained enormous focus in recent years. A number of techniques have been suggested for retrieval of textual information; however, relatively little has been suggested for efficient retrieval of multimedia objects. In this paper we have proposed a generic architecture for contextaware retrieval of multimedia objects. The proposed framework combines the well-known approaches of text-based retrieval and context-aware retrieval to formulate architecture for accurate retrieval of multimedia data.

Keywords: Context-aware retrieval, information retrieval, multimedia databases, multimedia data.

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Authors: Ridha Ghayoula, ElAmjed Hajlaoui, Talel Korkobi, Mbarek Traii, Hichem Trabelsi

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In this paper, the hardware implementation of the RSA public-key cryptographic algorithm is presented. The RSA cryptographic algorithm is depends on the computation of repeated modular exponentials. The Montgomery algorithm is used and modified to reduce hardware resources and to achieve reasonable operating speed for FPGA. An efficient architecture for modular multiplications based on the array multiplier is proposed. We have implemented a RSA cryptosystem based on Montgomery algorithm. As a result, it is shown that proposed architecture contributes to small area and reasonable speed.

Keywords: RSA, Cryptosystem, Montgomery, Implementation.FPGA.

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Authors: Rizwan Asghar, Dake Liu

Abstract:

The direct implementation of interleaver functions in WiMAX is not hardware efficient due to presence of complex functions. Also the conventional method i.e. using memories for storing the permutation tables is silicon consuming. This work presents a 2-D transformation for WiMAX channel interleaver functions which reduces the overall hardware complexity to compute the interleaver addresses on the fly. A fully reconfigurable architecture for address generation in WiMAX channel interleaver is presented, which consume 1.1 k-gates in total. It can be configured for any block size and any modulation scheme in WiMAX. The presented architecture can run at a frequency of 200 MHz, thus fully supporting high bandwidth requirements for WiMAX.

Keywords: Interleaver, deinterleaver, WiMAX, 802.16e.

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Authors: Anastasis Kounoudes, Stephanos Mavromoustakos

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Electronic commerce is growing rapidly with on-line sales already heading for hundreds of billion dollars per year. Due to the huge amount of money transferred everyday, an increased security level is required. In this work we present the architecture of an intelligent speaker verification system, which is able to accurately verify the registered users of an e-commerce service using only their voices as an input. According to the proposed architecture, a transaction-based e-commerce application should be complemented by a biometric server where customer-s unique set of speech models (voiceprint) is stored. The verification procedure requests from the user to pronounce a personalized sequence of digits and after capturing speech and extracting voice features at the client side are sent back to the biometric server. The biometric server uses pattern recognition to decide whether the received features match the stored voiceprint of the customer who claims to be, and accordingly grants verification. The proposed architecture can provide e-commerce applications with a higher degree of certainty regarding the identity of a customer, and prevent impostors to execute fraudulent transactions.

Keywords: Speaker Recognition, Biometrics, E-commercesecurity.

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