Search results for: switching voltage
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1546

Search results for: switching voltage

1306 Analysis of Different Space Vector Pulse Width Modulation Techniques for a Five-Phase Inverter

Authors: K. A. Chinmaya, M. Udaya Bhaskar

Abstract:

Multiphase motor drives are now a day considered for numerous applications due to the advantages that they offer when compared to their three-phase counterparts. Proper modeling of inverters and motors are important in devising an appropriate control algorithm. This paper develops a complete modeling of a five-phase inverter and five-phase space vector modulation schemes which can be used for five-phase motor drives. A novel modified algorithm is introduced which enables the sinusoidal output voltages up to certain voltage value. The waveforms of phase to neutral voltage are compared with the different modulation techniques and also different modulation indexes in terms of Low-order Harmonic (LH) voltage of 3rd and 7th present. A detailed performance evolution of existing and newly modified schemes is done in terms of Total Harmonic Distortion (THD).

Keywords: multi-phase drives, space vector modulation, voltage source inverter, low order harmonic voltages, total harmonic distortion

Procedia PDF Downloads 369
1305 Least Squares Method Identification of Corona Current-Voltage Characteristics and Electromagnetic Field in Electrostatic Precipitator

Authors: H. Nouri, I. E. Achouri, A. Grimes, H. Ait Said, M. Aissou, Y. Zebboudj

Abstract:

This paper aims to analysis the behaviour of DC corona discharge in wire-to-plate electrostatic precipitators (ESP). Current-voltage curves are particularly analysed. Experimental results show that discharge current is strongly affected by the applied voltage. The proposed method of current identification is to use the method of least squares. Least squares problems that of into two categories: linear or ordinary least squares and non-linear least squares, depending on whether or not the residuals are linear in all unknowns. The linear least-squares problem occurs in statistical regression analysis; it has a closed-form solution. A closed-form solution (or closed form expression) is any formula that can be evaluated in a finite number of standard operations. The non-linear problem has no closed-form solution and is usually solved by iterative.

Keywords: electrostatic precipitator, current-voltage characteristics, least squares method, electric field, magnetic field

Procedia PDF Downloads 403
1304 Between Subscribers of Two Telecommunication Providers in Indonesia: Factors Involved in Customer Retention

Authors: Frista Dearetha Marasabessy, Usep Suhud, Mohammad Rizan

Abstract:

The study objective was to compare influencing factors on customer retention of two brands – SimPATI and IM3 – of telecommunication services owned by Telkomsel and Indosat, two giant mobile telecommunication providers in Indonesia. The authors applied predictor variables including perceived tariff, perceived quality, switching barriers, and customer satisfaction. These variables were used after reviewing literature in quantitative studies on consumer behaviour relating to telecommunication services. This study used indicators adopted and adapted from literature. The quantitative data were gathered in Jakarta, involving 205 subscribers of SimPATI and 202 subscribers of IM3. The authors selected respondents purposively. Data were analysed using both exploratory and confirmatory factor analyses. Two fitted models were developed confirming factors that were involved in customer retention as stated on the proposed model: perceived tariff, perceived quality, switching barriers, and customer satisfaction. However, parts of the hypotheses were rejected.

Keywords: customer retention, switching barriers, telecommunication providers, structural equation model, SimPATI, IM3, Indonesia

Procedia PDF Downloads 321
1303 Development of a Firmware Downloader for AVR Microcontrollers for Educational Purposes

Authors: Jungho Moon, Lae Jeong Park

Abstract:

This paper introduces the development of a firmware downloader for students attending microcontroller-related courses taught by the authors In the courses, AVR microcontroller experiment kits are used for programming exercise and the AVR microcontroller is programmed through a serial communication interface using a bootloader preinstalled on it. To use the bootloader, a matching firmware downloader that runs on a host computer and communicates with the bootloader is also required. When firmware downloading is completed, the serial port used for it needs to be closed. If the downloaded firmware uses serial communication, the serial port needs to be reopened in a serial terminal. As a result, the programmer of the AVR board switches from the downloader program and the serial terminal and vice versa. It is a simple task but quite a hassle to do each time new firmware needs downloading. To provide a more convenient programming environment for the courses, the authors developed a downloader program that includes a serial terminal in it. The program operates in downloader or terminal mode and the mode switching is performed automatically; therefore manual mode switching is not necessary. The feature provides a more convenient development environment by eliminating the need for manual mode switching each time firmware downloading is required.

Keywords: bootloader, firmware downloader, microcontroller, serial communication

Procedia PDF Downloads 165
1302 A High Step-Up DC-DC Converter for Renewable Energy System Applications

Authors: Sopida Vacharasukpo, Sudarat Khwan-On

Abstract:

This paper proposes a high step-up DC-DC converter topology for renewable energy system applications. The proposed converter employs only a single power switch instead of using several switches. Compared to the conventional DC-DC step-up converters the higher voltage gain with small output ripples can be achieved by using the proposed high step-up DC-DC converter topology. It can step up the low input voltage (20-50Vdc) generated from the photovoltaic modules to the high output voltage level approximately 600Vdc in order to supply the three-phase inverter fed the three-phase motor drive. In this paper, the operating principle of the proposed converter topology and its control strategy under the continuous conduction mode (CCM) are described. Finally, simulation results are shown to demonstrate the effectiveness of the proposed high step-up DC-DC converter with its control strategy to increase the voltage step-up conversion ratio.

Keywords: DC-DC converter, high step-up ratio, renewable energy, single switch

Procedia PDF Downloads 1158
1301 Characterization of Electrical Transport across Ultra-Thin SrTiO₃ and BaTiO₃ Barriers in Tunnel Junctions

Authors: Henry Navarro, Martin Sirena, Nestor Haberkorn

Abstract:

We report the electrical transport through voltage-current curves (I-V) in tunnels junction GdBa₂Cu₃O₇-d/ insulator/ GdBa₂Cu₃O₇-d, and Nb/insulator/ GdBa₂Cu₃O₇-d is analyzed using a conducting atomic force microscope (CAFM) at room temperature. The measurements were obtained on tunnel junctions with different areas (900 μm², 400 μm² and 100 μm²). Trilayers with GdBa₂Cu₃O₇-d (GBCO) as the bottom electrode, SrTiO₃ (STO) or BaTiO₃ (BTO) as the insulator barrier (thicknesses between 1.6 nm and 4 nm), and GBCO or Nb as the top electrode were grown by DC sputtering on (100) SrTiO₃ substrates. For STO and BTO barriers, asymmetric IV curves at positive and negative polarization can be obtained using electrodes with different work function. The main difference is that the BTO is a ferroelectric material, while in the STO the ferroelectricity can be produced by stress or deformation at the interfaces. In addition, hysteretic IV curves are obtained for BTO barriers, which can be ascribed to a combined effect of the FE reversal switching polarization and an oxygen vacancy migration. For GBCO/ BTO/ GBCO heterostructures, the IV curves correspond to that expected for asymmetric interfaces, which indicates that the disorder affects differently the properties at the bottom and top interfaces. Our results show the role of the interface disorder on the electrical transport of conducting/ insulator/ conduction heterostructures, which is relevant for different applications, going from resistive switching memories (at room temperature) to Josephson junctions (at low temperatures). The superconducting transition of the GBCO electrode was characterized by electrical transport using the 4-prong configuration with low density of topological defects and with Tc over liquid N₂ can be obtained for thicknesses of 16 nm, our results demonstrate that GBCO films with an average root-mean-square (RMS) smaller than 1 nm and areas (up 100 um²) free of 3-D topological defects can be obtained.

Keywords: thin film, sputtering, conductive atomic force microscopy, tunnel junctions

Procedia PDF Downloads 130
1300 Large-Scale Photovoltaic Generation System Connected to HVDC Grid with Centralized High Voltage and High Power DC/DC Converter

Authors: Xinke Huang, Huan Wang, Lidong Guo, Changbin Ju, Runbiao Liu, Shanshan Meng, Yibo Wang, Honghua Xu

Abstract:

Large-scale photovoltaic (PV) generation system connected to HVDC grid has many advantages compared to its counterpart of AC grid. DC connection can solve many problems that AC connection faces, such as the grid-connection and power transmission, and DC connection is the tendency. DC/DC converter as the most important device in the system has become one of the hot spots recently. The paper proposes a centralized DC/DC converter which uses Boost Full Bridge Isolated DC/DC Converter(BFBIC) topology and combination through input parallel output series(IPOS) method to improve power capacity and output voltage to match with the HVDC grid voltage. Meanwhile, it adopts input current sharing control strategy to realize input current and output voltage balance. A ±30kV/1MW system is modeled in MATLAB/SIMULINK, and a downscaled ±10kV/200kW DC/DC converter platform is built to verify the proposed topology and control strategy.

Keywords: photovoltaic generation, cascaded dc/dc converter, galvanic isolation, high-voltage, direct current (HVDC)

Procedia PDF Downloads 412
1299 Optimal Placement and Sizing of Distributed Generation in Microgrid for Power Loss Reduction and Voltage Profile Improvement

Authors: Ferinar Moaidi, Mahdi Moaidi

Abstract:

Environmental issues and the ever-increasing in demand of electrical energy make it necessary to have distributed generation (DG) resources in the power system. In this research, in order to realize the goals of reducing losses and improving the voltage profile in a microgrid, the allocation and sizing of DGs have been used. The proposed Genetic Algorithm (GA) is described from the array of artificial intelligence methods for solving the problem. The algorithm is implemented on the IEEE 33 buses network. This study is presented in two scenarios, primarily to illustrate the effect of location and determination of DGs has been done to reduce losses and improve the voltage profile. On the other hand, decisions made with the one-level assumptions of load are not universally accepted for all levels of load. Therefore, in this study, load modelling is performed and the results are presented for multi-levels load state.

Keywords: distributed generation, genetic algorithm, microgrid, load modelling, loss reduction, voltage improvement

Procedia PDF Downloads 118
1298 A Low-Cost Memristor Based on Hybrid Structures of Metal-Oxide Quantum Dots and Thin Films

Authors: Amir Shariffar, Haider Salman, Tanveer Siddique, Omar Manasreh

Abstract:

According to the recent studies on metal-oxide memristors, researchers tend to improve the stability, endurance, and uniformity of resistive switching (RS) behavior in memristors. Specifically, the main challenge is to prevent abrupt ruptures in the memristor’s filament during the RS process. To address this problem, we are proposing a low-cost hybrid structure of metal oxide quantum dots (QDs) and thin films to control the formation of filaments in memristors. We aim to use metal oxide quantum dots because of their unique electronic properties and quantum confinement, which may improve the resistive switching behavior. QDs have discrete energy spectra due to electron confinement in three-dimensional space. Because of Coulomb repulsion between electrons, only a few free electrons are contained in a quantum dot. This fact might guide the growth direction for the conducting filaments in the metal oxide memristor. As a result, it is expected that QDs can improve the endurance and uniformity of RS behavior in memristors. Moreover, we use a hybrid structure of intrinsic n-type quantum dots and p-type thin films to introduce a potential barrier at the junction that can smooth the transition between high and low resistance states. A bottom-up approach is used for fabricating the proposed memristor using different types of metal-oxide QDs and thin films. We synthesize QDs including, zinc oxide, molybdenum trioxide, and nickel oxide combined with spin-coated thin films of titanium dioxide, copper oxide, and hafnium dioxide. We employ fluorine-doped tin oxide (FTO) coated glass as the substrate for deposition and bottom electrode. Then, the active layer composed of one type of quantum dots, and the opposite type of thin films is spin-coated onto the FTO. Lastly, circular gold electrodes are deposited with a shadow mask by using electron-beam (e-beam) evaporation at room temperature. The fabricated devices are characterized using a probe station with a semiconductor parameter analyzer. The current-voltage (I-V) characterization is analyzed for each device to determine the conduction mechanism. We evaluate the memristor’s performance in terms of stability, endurance, and retention time to identify the optimal memristive structure. Finally, we assess the proposed hypothesis before we proceed to the optimization process for fabricating the memristor.

Keywords: memristor, quantum dot, resistive switching, thin film

Procedia PDF Downloads 96
1297 Performance Analysis of Different Power Electronics Structures for Electric Vehicles (EVs)

Authors: Sekkak Abdelmalek

Abstract:

The aim of this paper is to establish an energy balance of the drivetrain of a low power electric vehicle (around ten kilowatts). The study is based on two topologies of power electronics converter, the voltage source inverter and cascaded H-Bridge inverter. For each of these solutions, two voltage levels are studied for the drivetrain. At first a discussion of cascaded H-Bridge inverters will be performed on the potential benefits of this structure for its use to other functions such as macroscopic batteries management system. In a second step, the performances of the traction chain are compared according to the structure of the power converter and the voltage level of the traction chain.

Keywords: power electronics, static converters, cascaded H-Bridge, traction chain, efficiency, losses, batteries balancing

Procedia PDF Downloads 481
1296 Optimal Analysis of Grounding System Design for Distribution Substation

Authors: Thong Lantharthong, Nattchote Rugthaicharoencheep, Att Phayomhom

Abstract:

This paper presents the electrical effect of two neighboring distribution substation during the construction phase. The size of auxiliary grounding grid have an effect on entire grounding system. The bigger the size of auxiliary grounding grid, the lower the GPR and maximum touch voltage, with the exception that when the two grids are unconnected, i.e. the bigger the size of auxiliary grounding grid, the higher the maximum step voltage. The results in this paper could be served as design guideline of grounding system, and perhaps remedy of some troublesome grounding grids in power distribution’s system. Modeling and simulation is carried out on the Current Distribution Electromagnetic interference Grounding and Soil structure (CDEGS) program. The simulation results exhibit the design and analysis of power system grounding and perhaps could be set as a standard in grounding system design and modification in distribution substations.

Keywords: grounding system, touch voltage, step voltage, safety criteria

Procedia PDF Downloads 416
1295 Implementation of Multi-Carrier Pulse Width Modulation Techniques in Multilevel Inverter

Authors: M. Suresh Kumar, K. Ramani

Abstract:

This paper proposed the Multi-Carrier Pulse Width Modulation for the minimization of Total Harmonic Distortion in Cascaded H-Bridge Multi-Level Inverter. Multicarrier Pulse Width Modulation method uses Alternate Position of Disposition scheme to determine the appropriate switching angle to Multi-Level Inverter. In this paper simulation results shows that the validation of Multi-Carrier Pulse Width Modulation method does capably eliminate a great number of precise harmonics and minimize the Total Harmonic Distortion value in output voltage waveform.

Keywords: alternate position, fast fourier analysis, multi-carrier pulse width modulation, multi-level inverter, total harmonic distortion

Procedia PDF Downloads 617
1294 Enhancement of the Performance of Al-Qatraneh 33-kV Transmission Line Using STATCOM: A Case Study

Authors: Ali Hamad, Ibrahim Al-Drous, Saleh Al-Jufout

Abstract:

This paper presents a case study of using STATCOM to enhance the performance of Al-Qatraneh 33-kV transmission line. The location of the STATCOM was identified maintaining minimum voltage drops at the 110 load nodes. The transmission line and the 110 load nodes have been modeled by MATLAB/Simulink. The suggested STATCOM and its location will increase the transmission capability of this transmission line and overcome the overload expected in the year 2020. The annual percentage loading rise has been considered as 14%. A graphical representation of the line voltages and the voltage drops at different load nodes has been illustrated.

Keywords: FACTS, MATLAB, STATCOM, transmission line, voltage drop

Procedia PDF Downloads 408
1293 Electrical Degradation of GaN-based p-channel HFETs Under Dynamic Electrical Stress

Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

Abstract:

The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

Procedia PDF Downloads 64
1292 Transient Enhanced LDO Voltage Regulator with Improved Feed Forward Path Compensation

Authors: A. Suresh, Sreehari Rao Patri, K. S. R. Krishnaprasad

Abstract:

An ultra low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gain-enhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 µA. An undershoot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 µs for the output voltage undershoot case. The load regulation is of 2.77 µV/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: capacitor-less LDO, frequency compensation, transient response, latch, self-biased differential amplifier

Procedia PDF Downloads 427
1291 A Case Study of Limited Dynamic Voltage Frequency Scaling in Low-Power Processors

Authors: Hwan Su Jung, Ahn Jun Gil, Jong Tae Kim

Abstract:

Power management techniques are necessary to save power in the microprocessor. By changing the frequency and/or operating voltage of processor, DVFS can control power consumption. In this paper, we perform a case study to find optimal power state transition for DVFS. We propose the equation to find the optimal ratio between executions of states while taking into account the deadline of processing time and the power state transition delay overhead. The experiment is performed on the Cortex-M4 processor, and average 6.5% power saving is observed when DVFS is applied under the deadline condition.

Keywords: deadline, dynamic voltage frequency scaling, power state transition

Procedia PDF Downloads 421
1290 Air-Blast Ultrafast Disconnectors and Solid-State Medium Voltage DC Breaker: A Modified Version to Lower Losses and Higher Speed

Authors: Ali Kadivar, Kaveh Niayesh

Abstract:

MVDC markets for green power generations, Navy, subsea oil and gas electrification, and transportation electrification are extending rapidly. The lack of fast and powerful DC circuit breakers (CB) is the most significant barrier to realizing the medium voltage DC (MVDC) networks. A concept of hybrid circuit breakers (HCBs) benefiting from ultrafast disconnectors (UFD) is proposed. A set of mechanical switches substitute the power electronic commutation switches to reduce the losses during normal operation in HCB. The success of current commutation in such breakers relies on the behaviour of elongated, wall constricted arcs during the opening across the contacts inside the UFD. The arc voltage dependencies on the contact speed of UFDs is discussed through multiphysics simulations contact opening speeds of 10, 20 and 40 m/s. The arc voltage at a given current increases exponentially with the contact opening velocity. An empirical equation for the dynamic arc characteristics is presented for the tested UFD, and the experimentally verfied characteristics for voltage-current are utilized for the current commutation simulation prior to apply on a 14 kV experimental setup. Different failures scenarios due to the current commutation are investigated

Keywords: MVDC breakers, DC circuit breaker, fast operating breaker, ultra-fast elongated arc

Procedia PDF Downloads 53
1289 Oxide Based Memristor and Its Potential Application in Analog-Digital Electronics

Authors: P. Michael Preetam Raj, Souri Banerjee, Souvik Kundu

Abstract:

Oxide based memristors were fabricated in order to establish its potential applications in analog/digital electronics. BaTiO₃-BiFeO₃ (BT-BFO) was employed as an active material, whereas platinum (Pt) and Nb-doped SrTiO₃ (Nb:STO) were served as a top and bottom electrodes, respectively. Piezoelectric force microscopy (PFM) was utilized to present the ferroelectricity and repeatable polarization inversion in the BT-BFO, demonstrating its effectiveness for resistive switching. The fabricated memristors exhibited excellent electrical characteristics, such as hysteresis current-voltage (I-V), high on/off ratio, high retention time, cyclic endurance, and low operating voltages. The band-alignment between the active material BT-BFO and the substrate Nb:STO was experimentally investigated using X-Ray photoelectron spectroscopy, and it attributed to staggered heterojunction alignment. An energy band diagram was proposed in order to understand the electrical transport in BT-BFO/Nb:STO heterojunction. It was identified that the I-V curves of these memristors have several discontinuities. Curve fitting technique was utilized to analyse the I-V characteristic, and the obtained I-V equations were found to be parabolic. Utilizing this analysis, a non-linear BT-BFO memristors equivalent circuit model was developed. Interestingly, the obtained equivalent circuit of the BT-BFO memristors mimics the identical electrical performance, those obtained in the fabricated devices. Based on the developed equivalent circuit, a finite state machine (FSM) design was proposed. Efforts were devoted to fabricate the same FSM, and the results were well matched with those in the simulated FSM devices. Its multilevel noise filtering and immunity to external noise characteristics were also studied. Further, the feature of variable negative resistance was established by controlling the current through the memristor.

Keywords: band alignment, finite state machine, polarization inversion, resistive switching

Procedia PDF Downloads 107
1288 Depletion Layer Parameters of Al-MoO3-P-CdTe-Al MOS Structures

Authors: A. C. Sarmah

Abstract:

The Al-MoO3-P-CdTe-Al MOS sandwich structures were fabricated by vacuum deposition method on cleaned glass substrates. Capacitance versus voltage measurements were performed at different frequencies and sweep rates of applied voltages for oxide and semiconductor films of different thicknesses. In the negative voltage region of the C-V curve a high differential capacitance of the semiconductor was observed and at high frequencies (<10 kHz) the transition from accumulation to depletion and further to deep depletion was observed as the voltage was swept from negative to positive. A study have been undertaken to determine the value of acceptor density and some depletion layer parameters such as depletion layer capacitance, depletion width, impurity concentration, flat band voltage, Debye length, flat band capacitance, diffusion or built-in-potential, space charge per unit area etc. These were determined from C-V measurements for different oxide and semiconductor thicknesses.

Keywords: debye length, depletion width, flat band capacitance, impurity concentration

Procedia PDF Downloads 429
1287 Development of a Very High Sensitivity Magnetic Field Sensor Based on Planar Hall Effect

Authors: Arnab Roy, P. S. Anil Kumar

Abstract:

Hall bar magnetic field sensors based on planar hall effect were fabricated from permalloy (Ni¬80Fe20) thin films grown by pulsed laser ablation. As large as 400% planar Hall voltage change was observed for a magnetic field sweep within ±4 Oe, a value comparable with present day TMR sensors at room temperature. A very large planar Hall sensitivity of 1200 Ω/T was measured close to switching fields, which was not obtained so far apart from 2DEG Hall sensors. In summary, a highly sensitive low magnetic field sensor has been constructed which has the added advantage of simple architecture, good signal to noise ratio and robustness.

Keywords: planar hall effect, permalloy, NiFe, pulsed laser ablation, low magnetic field sensor, high sensitivity magnetic field sensor

Procedia PDF Downloads 490
1286 Proactive SoC Balancing of Li-ion Batteries for Automotive Application

Authors: Ali Mashayekh, Mahdiye Khorasani, Thomas weyh

Abstract:

The demand for battery electric vehicles (BEV) is steadily increasing, and it can be assumed that electric mobility will dominate the market for individual transportation in the future. Regarding BEVs, the focus of state-of-the-art research and development is on vehicle batteries since their properties primarily determine vehicles' characteristic parameters, such as price, driving range, charging time, and lifetime. State-of-the-art battery packs consist of invariable configurations of battery cells, connected in series and parallel. A promising alternative is battery systems based on multilevel inverters, which can alter the configuration of the battery cells during operation via semiconductor switches. The main benefit of such topologies is that a three-phase AC voltage can be directly generated from the battery pack, and no separate power inverters are required. Therefore, modular battery systems based on different multilevel inverter topologies and reconfigurable battery systems are currently under investigation. Another advantage of the multilevel concept is that the possibility to reconfigure the battery pack allows battery cells with different states of charge (SoC) to be connected in parallel, and thus low-loss balancing can take place between such cells. In contrast, in conventional battery systems, parallel connected (hard-wired) battery cells are discharged via bleeder resistors to keep the individual SoCs of the parallel battery strands balanced, ultimately reducing the vehicle range. Different multilevel inverter topologies and reconfigurable batteries have been described in the available literature that makes the before-mentioned advantages possible. However, what has not yet been described is how an intelligent operating algorithm needs to look like to keep the SoCs of the individual battery strands of a modular battery system with integrated power electronics balanced. Therefore, this paper suggests an SoC balancing approach for Battery Modular Multilevel Management (BM3) converter systems, which can be similarly used for reconfigurable battery systems or other multilevel inverter topologies with parallel connectivity. The here suggested approach attempts to simultaneously utilize all converter modules (bypassing individual modules should be avoided) because the parallel connection of adjacent modules reduces the phase-strand's battery impedance. Furthermore, the presented approach tries to reduce the number of switching events when changing the switching state combination. Thereby, the ohmic battery losses and switching losses are kept as low as possible. Since no power is dissipated in any designated bleeder resistors and no designated active balancing circuitry is required, the suggested approach can be categorized as a proactive balancing approach. To verify the algorithm's validity, simulations are used.

Keywords: battery management system, BEV, battery modular multilevel management (BM3), SoC balancing

Procedia PDF Downloads 100
1285 A Systemic Review and Comparison of Non-Isolated Bi-Directional Converters

Authors: Rahil Bahrami, Kaveh Ashenayi

Abstract:

This paper presents a systematic classification and comparative analysis of non-isolated bi-directional DC-DC converters. The increasing demand for efficient energy conversion in diverse applications has spurred the development of various converter topologies. In this study, we categorize bi-directional converters into three distinct classes: Inverting, Non-Inverting, and Interleaved. Each category is characterized by its unique operational characteristics and benefits. Furthermore, a practical comparison is conducted by evaluating the results of simulation of each bi-directional converter. BDCs can be classified into isolated and non-isolated topologies. Non-isolated converters share a common ground between input and output, making them suitable for applications with minimal voltage change. They are easy to integrate, lightweight, and cost-effective but have limitations like limited voltage gain, switching losses, and no protection against high voltages. Isolated converters use transformers to separate input and output, offering safety benefits, high voltage gain, and noise reduction. They are larger and more costly but are essential for automotive designs where safety is crucial. The paper focuses on non-isolated systems.The paper discusses the classification of non-isolated bidirectional converters based on several criteria. Common factors used for classification include topology, voltage conversion, control strategy, power capacity, voltage range, and application. These factors serve as a foundation for categorizing converters, although the specific scheme might vary depending on contextual, application, or system-specific requirements. The paper presents a three-category classification for non-isolated bi-directional DC-DC converters: inverting, non-inverting, and interleaved. In the inverting category, converters produce an output voltage with reversed polarity compared to the input voltage, achieved through specific circuit configurations and control strategies. This is valuable in applications such as motor control and grid-tied solar systems. The non-inverting category consists of converters maintaining the same voltage polarity, useful in scenarios like battery equalization. Lastly, the interleaved category employs parallel converter stages to enhance power delivery and reduce current ripple. This classification framework enhances comprehension and analysis of non-isolated bi-directional DC-DC converters. The findings contribute to a deeper understanding of the trade-offs and merits associated with different converter types. As a result, this work aids researchers, practitioners, and engineers in selecting appropriate bi-directional converter solutions for specific energy conversion requirements. The proposed classification framework and experimental assessment collectively enhance the comprehension of non-isolated bi-directional DC-DC converters, fostering advancements in efficient power management and utilization.The simulation process involves the utilization of PSIM to model and simulate non-isolated bi-directional converter from both inverted and non-inverted category. The aim is to conduct a comprehensive comparative analysis of these converters, considering key performance indicators such as rise time, efficiency, ripple factor, and maximum error. This systematic evaluation provides valuable insights into the dynamic response, energy efficiency, output stability, and overall precision of the converters. The results of this comparison facilitate informed decision-making and potential optimizations, ensuring that the chosen converter configuration aligns effectively with the designated operational criteria and performance goals.

Keywords: bi-directional, DC-DC converter, non-isolated, energy conversion

Procedia PDF Downloads 46
1284 Hardware-in-the-Loop Test for Automatic Voltage Regulator of Synchronous Condenser

Authors: Ha Thi Nguyen, Guangya Yang, Arne Hejde Nielsen, Peter Højgaard Jensen

Abstract:

Automatic voltage regulator (AVR) plays an important role in volt/var control of synchronous condenser (SC) in power systems. Test AVR performance in steady-state and dynamic conditions in real grid is expensive, low efficiency, and hard to achieve. To address this issue, we implement hardware-in-the-loop (HiL) test for the AVR of SC to test the steady-state and dynamic performances of AVR in different operating conditions. Startup procedure of the system and voltage set point changes are studied to evaluate the AVR hardware response. Overexcitation, underexcitation, and AVR set point loss are tested to compare the performance of SC with the AVR hardware and that of simulation. The comparative results demonstrate how AVR will work in a real system. The results show HiL test is an effective approach for testing devices before deployment and is able to parameterize the controller with lower cost, higher efficiency, and more flexibility.

Keywords: automatic voltage regulator, hardware-in-the-loop, synchronous condenser, real time digital simulator

Procedia PDF Downloads 225
1283 Application of Imperialist Competitive Algorithm for Optimal Location and Sizing of Static Compensator Considering Voltage Profile

Authors: Vahid Rashtchi, Ashkan Pirooz

Abstract:

This paper applies the Imperialist Competitive Algorithm (ICA) to find the optimal place and size of Static Compensator (STATCOM) in power systems. The output of the algorithm is a two dimensional array which indicates the best bus number and STATCOM's optimal size that minimizes all bus voltage deviations from their nominal value. Simulations are performed on IEEE 5, 14, and 30 bus test systems. Also some comparisons have been done between ICA and the famous Particle Swarm Optimization (PSO) algorithm. Results show that how this method can be considered as one of the most precise evolutionary methods for the use of optimum compensator placement in electrical grids.

Keywords: evolutionary computation, imperialist competitive algorithm, power systems compensation, static compensators, voltage profile

Procedia PDF Downloads 579
1282 Optimal Capacitor Placement in Distribution Systems

Authors: Sana Ansari, Sirus Mohammadi

Abstract:

In distribution systems, shunt capacitors are used to reduce power losses, to improve voltage profile, and to increase the maximum flow through cables and transformers. This paper presents a new method to determine the optimal locations and economical sizing of fixed and/or switched shunt capacitors with a view to power losses reduction and voltage stability enhancement. General Algebraic Modeling System (GAMS) has been used to solve the maximization modules using the MINOS optimization software with Linear Programming (LP). The proposed method is tested on 33 node distribution system and the results show that the algorithm suitable for practical implementation on real systems with any size.

Keywords: power losses, voltage stability, radial distribution systems, capacitor

Procedia PDF Downloads 619
1281 A Qualitative Evidence of the Markedness of Code Switching during Commercial Bank Service Encounters in Ìbàdàn Metropolis

Authors: A. Robbin

Abstract:

In a multilingual setting like Nigeria, the success of service encounters is enhanced by the use of a language that ensures the linguistic and persuasive demands of the interlocutors. This study examined motivations for code switching as a negotiation strategy in bank-hall desk service encounters in Ìbàdàn metropolis using Myers-Scotton’s exploration on markedness in language use. The data consisted of transcribed audio recording of bank-hall service encounters, and direct observation of bank interactions in two purposively sampled commercial banks in Ìbàdàn metropolis. The data was subjected to descriptive linguistic analysis using Myers Scotton’s Markedness Model.  Findings reveal that code switching is frequently employed during different stages of service encounter: greeting, transaction and closing to fulfil relational, bargaining and referential functions. Bank staff and customers code switch to make unmarked, marked and explanatory choices. A strategy used to identify with customer’s cultural affiliation, close status gap, and appeal to begrudged customer; or as an explanatory choice with non-literate customers for ease of communication. Bankers select English to maintain customers’ perceptions of prestige which is retained or diverged from depending on their linguistic preference or ability.  Yoruba is seen as an efficient negotiation strategy with both bankers and their customers, making choices within conversation to achieve desired conversational and functional aims.

Keywords: banking, bilingualism, code-switching, markedness, service encounter

Procedia PDF Downloads 178
1280 Role of Self-Concept in the Relationship between Emotional Abuse and Mental Health of Employees in the North West Province, South Africa

Authors: L. Matlawe, E. S. Idemudia

Abstract:

The stability is an important topic to plan and manage the energy in the microgrids as the same as the conventional power systems. The voltage and frequency stability is one of the most important issues recently studied in microgrids. The objectives of this paper are the modeling and designing of the components and optimal controllers for the voltage and frequency control of the AC/DC hybrid microgrid under the different disturbances. Since the PI controllers have the advantages of simple structure and easy implementation, so they were designed and modeled in this paper. The harmony search (HS) algorithm is used to optimize the controllers’ parameters. According to the achieved results, the PI controllers have a good performance in voltage and frequency control of the microgrid.

Keywords: emotional abuse, employees, mental health, self-concept

Procedia PDF Downloads 218
1279 Hybrid Control Strategy for Nine-Level Asymmetrical Cascaded H-Bridge Inverter

Authors: Bachir Belmadani, Rachid Taleb, M’hamed Helaimi

Abstract:

Multilevel inverters are well used in high power electronic applications because of their ability to generate a very good quality of waveforms, reducing switching frequency, and their low voltage stress across the power devices. This paper presents the hybrid pulse-width modulation (HPWM) strategy of a uniform step asymmetrical cascaded H-bridge nine-level Inverter (USACHB9LI). The HPWM approach is compared to the well-known sinusoidal pulse-width modulation (SPWM) strategy. Simulation results demonstrate the better performances and technical advantages of the HPWM controller in feeding a high power induction motor.

Keywords: uniform step asymmetrical cascaded h-bridge high-level inverter, hybrid pwm, sinusoidal pwm, high power induction motor

Procedia PDF Downloads 539
1278 Learners’ Perceptions of Tertiary Level Teachers’ Code Switching: A Vietnamese Perspective

Authors: Hoa Pham

Abstract:

The literature on language teaching and second language acquisition has been largely driven by monolingual ideology with a common assumption that a second language (L2) is best taught and learned in the L2 only. The current study challenges this assumption by reporting learners' positive perceptions of tertiary level teachers' code switching practices in Vietnam. The findings of this study contribute to our understanding of code switching practices in language classrooms from a learners' perspective. Data were collected from student participants who were working towards a Bachelor degree in English within the English for Business Communication stream through the use of focus group interviews. The literature has documented that this method of interviewing has a number of distinct advantages over individual student interviews. For instance, group interactions generated by focus groups create a more natural environment than that of an individual interview because they include a range of communicative processes in which each individual may influence or be influenced by others - as they are in their real life. The process of interaction provides the opportunity to obtain the meanings and answers to a problem that are "socially constructed rather than individually created" leading to the capture of real-life data. The distinct feature of group interaction offered by this technique makes it a powerful means of obtaining deeper and richer data than those from individual interviews. The data generated through this study were analysed using a constant comparative approach. Overall, the students expressed positive views of this practice indicating that it is a useful teaching strategy. Teacher code switching was seen as a learning resource and a source supporting language output. This practice was perceived to promote student comprehension and to aid the learning of content and target language knowledge. This practice was also believed to scaffold the students' language production in different contexts. However, the students indicated their preference for teacher code switching to be constrained, as extensive use was believed to negatively impact on their L2 learning and trigger cognitive reliance on the L1 for L2 learning. The students also perceived that when the L1 was used to a great extent, their ability to develop as autonomous learners was negatively impacted. This study found that teacher code switching was supported in certain contexts by learners, thus suggesting that there is a need for the widespread assumption about the monolingual teaching approach to be re-considered.

Keywords: codeswitching, L1 use, L2 teaching, learners’ perception

Procedia PDF Downloads 287
1277 An Approach For Evolving a Relaible Low Power Ultra Wide Band Transmitter with Capacitve Sensing

Authors: N.Revathy, C.Gomathi

Abstract:

This work aims for a tunable capacitor as a sensor which can vary the control voltage of a voltage control oscillator in a ultra wide band (UWB) transmitter. In this paper power consumption is concentrated. The reason for choosing a capacitive sensing is it give slow temperature drift, high sensitivity and robustness. Previous works report a resistive sensing in a voltage control oscillator (VCO) not aiming at power consumption. But this work aims for power consumption of a capacitive sensing in ultra wide band transmitter. The ultra wide band transmitter to be used is a direct modulation of pulses. The VCO which is the heart of pulse generator of UWB transmitter works on the principle of voltage to frequency conversion. The VCO has and odd number of inverter stages which works on the control voltage input this input is now from a variable capacitor and the buffer stages is reduced from the previous work to maintain the oscillating frequency. The VCO is also aimed to consume low power. Then the concentration in choosing a variable capacitor is aimed. A compact model of a capacitor with the transient characteristics is to be designed with a movable dielectric and multi metal membranes. Previous modeling of the capacitor transient characteristics is with a movable membrane and a fixed membrane. This work aims at a membrane with a wide tuning suitable for ultra wide band transmitter.This is used in this work because a capacitive in a ultra wide transmitter need to be tuned in such a way that all satisfies FCC regulations.

Keywords: capacitive sensing, ultra wide band transmitter, voltage control oscillator, FCC regulation

Procedia PDF Downloads 371