Search results for: buffer amplifier
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 476

Search results for: buffer amplifier

446 Wavelength Conversion of Dispersion Managed Solitons at 100 Gbps through Semiconductor Optical Amplifier

Authors: Kadam Bhambri, Neena Gupta

Abstract:

All optical wavelength conversion is essential in present day optical networks for transparent interoperability, contention resolution, and wavelength routing. The incorporation of all optical wavelength convertors leads to better utilization of the network resources and hence improves the efficiency of optical networks. Wavelength convertors that can work with Dispersion Managed (DM) solitons are attractive due to their superior transmission capabilities. In this paper, wavelength conversion for dispersion managed soliton signals was demonstrated at 100 Gbps through semiconductor optical amplifier and an optical filter. The wavelength conversion was achieved for a 1550 nm input signal to1555nm output signal. The output signal was measured in terms of BER, Q factor and system margin.    

Keywords: all optical wavelength conversion, dispersion managed solitons, semiconductor optical amplifier, cross gain modultation

Procedia PDF Downloads 420
445 A Low-Power, Low-Noise and High Linearity 60 GHz LNA for WPAN Applications

Authors: Noha Al Majid, Said Mazer, Moulhime El Bekkali, Catherine Algani, Mahmoud Mehdi

Abstract:

A low noise figure (NF) and high linearity V-band Low Noise Amplifier (LNA) is reported in this article. The LNA compromises a three-stage cascode configuration. This LNA will be used as a part of a WPAN (Wireless Personal Area Network) receiver in the millimeter-wave band at 60 GHz. It is designed according to the MMIC technology (Monolithic Microwave Integrated Circuit) in PH 15 process from UMS foundry and uses a 0.15 μm GaAs PHEMT (Pseudomorphic High Electron Mobility Transistor). The particularity of this LNA compared to other LNAs in literature is its very low noise figure which is equal to 1 dB and its high linearity (IIP3 is about 22 dB). The LNA consumes 0.24 Watts, achieving a high gain which is about 23 dB, an input return loss better than -10 dB and an output return loss better than -8 dB.

Keywords: low noise amplifier, V-band, MMIC technology, LNA, amplifier, cascode, pseudomorphic high electron mobility transistor (PHEMT), high linearity

Procedia PDF Downloads 479
444 Symbolic Analysis of Input Impedance of CMOS Floating Active Inductors with Application in Fully Differential Bandpass Amplifier

Authors: Kittipong Tripetch

Abstract:

This paper proposes studies of input impedance of two types of the CMOS active inductor. It derives two input impedance formulas. The first formula is the input impedance of a grounded active inductor. The second formula is an input impedance of floating active inductor. After that, these formulas can be used to simulate magnitude and phase response of input impedance as a function of current consumption with MATLAB. Common mode rejection ratio (CMRR) of a fully differential bandpass amplifier is derived based on superposition principle. CMRR as a function of input frequency is plotted as a function of current consumption

Keywords: grounded active inductor, floating active inductor, fully differential bandpass amplifier

Procedia PDF Downloads 398
443 Experimental Demonstration of Broadband Erbium-Doped Fiber Amplifier

Authors: Belloui Bouzid

Abstract:

In this paper, broadband design of erbium doped fiber amplifier (EDFA) is demonstrated and proved experimentally. High and broad gain is covered in C and L bands. The used technique combines, in one configuration, two double passes with split band structure for the amplification of two traveled signals one for the C band and the other for L band. This new topology is to investigate the trends of high gain and wide amplification at different status of pumping power, input wavelength, and input signal power. The presented paper is to explore the performance of EDFA gain using what it can be called double pass double branch wide band amplification configuration. The obtained results show high gain and wide broadening range of 44.24 dB and 80 nm amplification respectively.

Keywords: erbium doped fiber amplifier, erbium doped fiber laser, optical amplification, fiber laser

Procedia PDF Downloads 231
442 Multi Objective Simultaneous Assembly Line Balancing and Buffer Sizing

Authors: Saif Ullah, Guan Zailin, Xu Xianhao, He Zongdong, Wang Baoxi

Abstract:

Assembly line balancing problem is aimed to divide the tasks among the stations in assembly lines and optimize some objectives. In assembly lines the workload on stations is different from each other due to different tasks times and the difference in workloads between stations can cause blockage or starvation in some stations in assembly lines. Buffers are used to store the semi-finished parts between the stations and can help to smooth the assembly production. The assembly line balancing and buffer sizing problem can affect the throughput of the assembly lines. Assembly line balancing and buffer sizing problems have been studied separately in literature and due to their collective contribution in throughput rate of assembly lines, balancing and buffer sizing problem are desired to study simultaneously and therefore they are considered concurrently in current research. Current research is aimed to maximize throughput, minimize total size of buffers in assembly line and minimize workload variations in assembly line simultaneously. A multi objective optimization objective is designed which can give better Pareto solutions from the Pareto front and a simple example problem is solved for assembly line balancing and buffer sizing simultaneously. Current research is significant for assembly line balancing research and it can be significant to introduce optimization approaches which can optimize current multi objective problem in future.

Keywords: assembly line balancing, buffer sizing, Pareto solutions

Procedia PDF Downloads 465
441 Best Option for Countercyclical Capital Buffer Implementation: Scenarios for Baltic States

Authors: Ģirts Brasliņš, Ilja Arefjevs, Nadežda Tarakanova

Abstract:

The objective of countercyclical capital buffer is to encourage banks to build up buffers in good times that can be drawn down in bad times. The aim of the report is to assess such decisions by banks derived from three approaches. The approaches are the aggregate credit-to-GDP ratio, credit growth as well as banking sector profits. The approaches are implemented for Estonia, Latvia and Lithuania for the time period 2000-2012. The report compares three approaches and analyses their relevance to the Baltic states by testing the correlation between a growth in studied variables and a growth of corresponding gaps. Methods used in the empirical part of the report are econometric analysis as well as economic analysis, development indicators, relative and absolute indicators and other methods. The research outcome is a cross-Baltic comparison of two alternative approaches to establish or release a countercyclical capital buffer by banks and their implications for each Baltic country.

Keywords: basel III, countercyclical capital buffer, banks, credit growth, baltic states

Procedia PDF Downloads 365
440 Buffer Allocation and Traffic Shaping Policies Implemented in Routers Based on a New Adaptive Intelligent Multi Agent Approach

Authors: M. Taheri Tehrani, H. Ajorloo

Abstract:

In this paper, an intelligent multi-agent framework is developed for each router in which agents have two vital functionalities, traffic shaping and buffer allocation and are positioned in the ports of the routers. With traffic shaping functionality agents shape the traffic forward by dynamic and real time allocation of the rate of generation of tokens in a Token Bucket algorithm and with buffer allocation functionality agents share their buffer capacity between each other based on their need and the conditions of the network. This dynamic and intelligent framework gives this opportunity to some ports to work better under burst and more busy conditions. These agents work intelligently based on Reinforcement Learning (RL) algorithm and will consider effective parameters in their decision process. As RL have limitation considering much parameter in its decision process due to the volume of calculations, we utilize our novel method which invokes Principle Component Analysis (PCA) on the RL and gives a high dimensional ability to this algorithm to consider as much as needed parameters in its decision process. This implementation when is compared to our previous work where traffic shaping was done without any sharing and dynamic allocation of buffer size for each port, the lower packet drop in the whole network specifically in the source routers can be seen. These methods are implemented in our previous proposed intelligent simulation environment to be able to compare better the performance metrics. The results obtained from this simulation environment show an efficient and dynamic utilization of resources in terms of bandwidth and buffer capacities pre allocated to each port.

Keywords: principal component analysis, reinforcement learning, buffer allocation, multi- agent systems

Procedia PDF Downloads 479
439 Low Power CMOS Amplifier Design for Wearable Electrocardiogram Sensor

Authors: Ow Tze Weng, Suhaila Isaak, Yusmeeraz Yusof

Abstract:

The trend of health care screening devices in the world is increasingly towards the favor of portability and wearability, especially in the most common electrocardiogram (ECG) monitoring system. This is because these wearable screening devices are not restricting the patient’s freedom and daily activities. While the demand of low power and low cost biomedical system on chip (SoC) is increasing in exponential way, the front end ECG sensors are still suffering from flicker noise for low frequency cardiac signal acquisition, 50 Hz power line electromagnetic interference, and the large unstable input offsets due to the electrode-skin interface is not attached properly. In this paper, a high performance CMOS amplifier for ECG sensors that suitable for low power wearable cardiac screening is proposed. The amplifier adopts the highly stable folded cascode topology and later being implemented into RC feedback circuit for low frequency DC offset cancellation. By using 0.13 µm CMOS technology from Silterra, the simulation results show that this front end circuit can achieve a very low input referred noise of 1 pV/√Hz and high common mode rejection ratio (CMRR) of 174.05 dB. It also gives voltage gain of 75.45 dB with good power supply rejection ratio (PSSR) of 92.12 dB. The total power consumption is only 3 µW and thus suitable to be implemented with further signal processing and classification back end for low power biomedical SoC.

Keywords: CMOS, ECG, amplifier, low power

Procedia PDF Downloads 216
438 Performance Improvement of Long-Reach Optical Access Systems Using Hybrid Optical Amplifiers

Authors: Shreyas Srinivas Rangan, Jurgis Porins

Abstract:

The internet traffic has increased exponentially due to the high demand for data rates by the users, and the constantly increasing metro networks and access networks are focused on improving the maximum transmit distance of the long-reach optical networks. One of the common methods to improve the maximum transmit distance of the long-reach optical networks at the component level is to use broadband optical amplifiers. The Erbium Doped Fiber Amplifier (EDFA) provides high amplification with low noise figure but due to the characteristics of EDFA, its operation is limited to C-band and L-band. In contrast, the Raman amplifier exhibits a wide amplification spectrum, and negative noise figure values can be achieved. To obtain such results, high powered pumping sources are required. Operating Raman amplifiers with such high-powered optical sources may cause fire hazards and it may damage the optical system. In this paper, we implement a hybrid optical amplifier configuration. EDFA and Raman amplifiers are used in this hybrid setup to combine the advantages of both EDFA and Raman amplifiers to improve the reach of the system. Using this setup, we analyze the maximum transmit distance of the network by obtaining a correlation diagram between the length of the single-mode fiber (SMF) and the Bit Error Rate (BER). This hybrid amplifier configuration is implemented in a Wavelength Division Multiplexing (WDM) system with a BER of 10⁻⁹ by using NRZ modulation format, and the gain uniformity noise ratio (signal-to-noise ratio (SNR)), the efficiency of the pumping source, and the optical signal gain efficiency of the amplifier are studied experimentally in a mathematical modelling environment. Numerical simulations were implemented in RSoft OptSim simulation software based on the nonlinear Schrödinger equation using the Split-Step method, the Fourier transform, and the Monte Carlo method for estimating BER.

Keywords: Raman amplifier, erbium doped fibre amplifier, bit error rate, hybrid optical amplifiers

Procedia PDF Downloads 31
437 Improving the LDMOS Temperature Compensation Bias Circuit to Optimize Back-Off

Authors: Antonis Constantinides, Christos Yiallouras, Christakis Damianou

Abstract:

The application of today's semiconductor transistors in high power UHF DVB-T linear amplifiers has evolved significantly by utilizing LDMOS technology. This fact provides engineers with the option to design a single transistor signal amplifier which enables output power and linearity that was unobtainable previously using bipolar junction transistors or later type first generation MOSFETS. The quiescent current stability in terms of thermal variations of the LDMOS guarantees a robust operation in any topology of DVB-T signal amplifiers. Otherwise, progressively uncontrolled heat dissipation enhancement on the LDMOS case can degrade the amplifier’s crucial parameters in regards to the gain, linearity, and RF stability, resulting in dysfunctional operation or a total destruction of the unit. This paper presents one more sophisticated approach from the traditional biasing circuits used so far in LDMOS DVB-T amplifiers. It utilizes a microprocessor control technology, providing stability in topologies where IDQ must be perfectly accurate.

Keywords: LDMOS, amplifier, back-off, bias circuit

Procedia PDF Downloads 309
436 Multicasting Characteristics of All-Optical Triode Based on Negative Feedback Semiconductor Optical Amplifiers

Authors: S. Aisyah Azizan, M. Syafiq Azmi, Yuki Harada, Yoshinobu Maeda, Takaomi Matsutani

Abstract:

We introduced an all-optical multi-casting characteristics with wavelength conversion based on a novel all-optical triode using negative feedback semiconductor optical amplifier. This study was demonstrated with a transfer speed of 10 Gb/s to a non-return zero 231-1 pseudorandom bit sequence system. This multi-wavelength converter device can simultaneously provide three channels of output signal with the support of non-inverted and inverted conversion. We studied that an all-optical multi-casting and wavelength conversion accomplishing cross gain modulation is effective in a semiconductor optical amplifier which is effective to provide an inverted conversion thus negative feedback. The relationship of received power of back to back signal and output signals with wavelength 1535 nm, 1540 nm, 1545 nm, 1550 nm, and 1555 nm with bit error rate was investigated. It was reported that the output signal wavelengths were successfully converted and modulated with a power penalty of less than 8.7 dB, which the highest is 8.6 dB while the lowest is 4.4 dB. It was proved that all-optical multi-casting and wavelength conversion using an optical triode with a negative feedback by three channels at the same time at a speed of 10 Gb/s is a promising device for the new wavelength conversion technology.

Keywords: cross gain modulation, multicasting, negative feedback optical amplifier, semiconductor optical amplifier

Procedia PDF Downloads 657
435 Influence of Thermal History on the Undrained Shear Strength of the Bentonite-Sand Mixture

Authors: K. Ravi, Sabu Subhash

Abstract:

Densely compacted bentonite or bentonite–sand mixture has been identified as a suitable buffer in the deep geological repository (DGR) for the safe disposal of high-level nuclear waste (HLW) due to its favourable physicochemical and hydro-mechanical properties. The addition of sand to the bentonite enhances the thermal conductivity and compaction properties and reduces the drying shrinkage of the buffer material. The buffer material may undergo cyclic wetting and drying upon ingress of groundwater from the surrounding rock mass and from evaporation due to high temperature (50–210 °C) derived from the waste canister. The cycles of changes in temperature may result in thermal history, and the hydro-mechanical properties of the buffer material may be affected. This paper examines the influence of thermal history on the undrained shear strength of bentonite and bentonite-sand mixture. Bentonite from Rajasthan state and sand from the Assam state of India are used in this study. The undrained shear strength values are obtained by conducting unconfined compressive strength (UCS) tests on cylindrical specimens (dry densities 1.30 and 1.5 Mg/m3) of bentonite and bentonite-sand mixture consisting of 30 % bentonite+ 70 % sand. The specimens are preheated at temperatures varying from 50-150 °C for one, two and four hours in hot air oven. The results indicate that the undrained shear strength is increased by the thermal history of the buffer material. The specimens of bentonite-sand mixture exhibited more increase in strength compared to the pure bentonite specimens. This indicates that the sand content of the mixture plays a vital role in taking the thermal stresses of the bentonite buffer in DGR conditions.

Keywords: bentonite, deep geological repository, thermal history, undrained shear strength

Procedia PDF Downloads 322
434 Design Of High Sensitivity Transceiver for WSN

Authors: A. Anitha, M. Aishwariya

Abstract:

The realization of truly ubiquitous wireless sensor networks (WSN) demands Ultra-low power wireless communication capability. Because the radio transceiver in a wireless sensor node consumes more power when compared to the computation part it is necessary to reduce the power consumption. Hence, a low power transceiver is designed and implemented in a 120 nm CMOS technology for wireless sensor nodes. The power consumption of the transceiver is reduced still by maintaining the sensitivity. The transceiver designed combines the blocks including differential oscillator, mixer, envelope detector, power amplifiers, and LNA. RF signal modulation and demodulation is carried by On-Off keying method at 2.4 GHz which is said as ISM band. The transmitter demonstrates an output power of 2.075 mW while consuming a supply voltage of range 1.2 V-5.0 V. Here the comparison of LNA and power amplifier is done to obtain an amplifier which produces a high gain of 1.608 dB at receiver which is suitable to produce a desired sensitivity. The multistage RF amplifier is used to improve the gain at the receiver side. The power dissipation of the circuit is in the range of 0.183-0.323 mW. The receiver achieves a sensitivity of about -95 dBm with data rate of 1 Mbps.

Keywords: CMOS, envelope detector, ISM band, LNA, low power electronics, PA, wireless transceiver

Procedia PDF Downloads 478
433 Investigation of the Effect of Nickel Electrodes as a Stainless Steel Buffer Layer on the Shielded Metal Arc Welding

Authors: Meisam Akbari, Seyed Hossein Elahi, Mohammad Mashadgarmeh

Abstract:

In this study, the effect of nickel-electrode as a stainless steel buffer layer is considered. Then, the effect of dilution of the last layer of welding on two samples of steel plate A516 Gr70 (C-Mn-Si) with SMAW welding process was investigated. Then, in a sample, the ENI-cl nickel electrode was welded as the buffer layer and the E316L-16 electrode as the last layer of welding and another sample with an E316L-16 electrode in two layers. The chemical composition of the latter layer was determined by spectrophotometry method. The results indicate that the chemical composition of the latter layer is different and the lowest dilution rate is obtained using the nickel electrode.

Keywords: degree of dilution, C-Mn-Si, spectrometry, nickel electrode, stainless steel

Procedia PDF Downloads 179
432 HPA Pre-Distorter Based on Neural Networks for 5G Satellite Communications

Authors: Abdelhamid Louliej, Younes Jabrane

Abstract:

Satellites are becoming indispensable assets to fifth-generation (5G) new radio architecture, complementing wireless and terrestrial communication links. The combination of satellites and 5G architecture allows consumers to access all next-generation services anytime, anywhere, including scenarios, like traveling to remote areas (without coverage). Nevertheless, this solution faces several challenges, such as a significant propagation delay, Doppler frequency shift, and high Peak-to-Average Power Ratio (PAPR), causing signal distortion due to the non-linear saturation of the High-Power Amplifier (HPA). To compensate for HPA non-linearity in 5G satellite transmission, an efficient pre-distorter scheme using Neural Networks (NN) is proposed. To assess the proposed NN pre-distorter, two types of HPA were investigated: Travelling Wave Tube Amplifier (TWTA) and Solid-State Power Amplifier (SSPA). The results show that the NN pre-distorter design presents EVM improvement by 95.26%. NMSE and ACPR were reduced by -43,66 dB and 24.56 dBm, respectively. Moreover, the system suffers no degradation of the Bit Error Rate (BER) for TWTA and SSPA amplifiers.

Keywords: satellites, 5G, neural networks, HPA, TWTA, SSPA, EVM, NMSE, ACPR

Procedia PDF Downloads 59
431 Two Kinds of Self-Oscillating Circuits Mechanically Demonstrated

Authors: Shiang-Hwua Yu, Po-Hsun Wu

Abstract:

This study introduces two types of self-oscillating circuits that are frequently found in power electronics applications. Special effort is made to relate the circuits to the analogous mechanical systems of some important scientific inventions: Galileo’s pendulum clock and Coulomb’s friction model. A little touch of related history and philosophy of science will hopefully encourage curiosity, advance the understanding of self-oscillating systems and satisfy the aspiration of some students for scientific literacy. Finally, the two self-oscillating circuits are applied to design a simple class-D audio amplifier.

Keywords: self-oscillation, sigma-delta modulator, pendulum clock, Coulomb friction, class-D amplifier

Procedia PDF Downloads 328
430 A Novel Design in the Use of Planar Transformers for LDMOS Based Amplifiers in Bands II, III, DRM+, DVB-T and DAB+

Authors: Antonis Constantinides, Christos Yiallouras, Christakis Damianou

Abstract:

The coaxial transformer-coupled push-pull circuitry has been used widely in HF and VHF amplifiers for many decades without significant changes in the topology of the transformers. Basic changes over the years concerned the construction and turns ratio of the transformers as has been imposed upon the newer technologies active devices demands. The balun transmission line transformers applied in push-pull amplifiers enable input/output impedance transformation, but are mainly used to convert the balanced output into unbalanced and the input unbalanced into balanced. A simple and affordable alternative solution over the traditional coaxial transformer is the coreless planar balun. A key advantage over the traditional approach lies in the high specifications repeatability; simplifying the amplifier construction requirements as the planar balun constitutes an integrated part of the PCB copper layout. This paper presents the performance analysis of a planar LDMOS MRFE6VP5600 Push-Pull amplifier that enables robust operation in Band III, DVB-T, DVB-T2 standards but functions equally well in Band II, for DRM+ new generation transmitters.

Keywords: amplifier, balun, complex impedance, LDMOS, planar-transformers

Procedia PDF Downloads 413
429 Theory of Gyrotron Amplifier in a Vane-Loaded Waveguide with Inner Dielectric Material

Authors: Reyhaneh Hashemi, Shahrooz Saviz

Abstract:

In his study, we have survey the theory of gyrotron amplifier in a vane-loaded waveguide with inner dielectric material. Dispersion relation for electromagnetic waves emitted by a cylindrical waveguide that provided with wedge-shaped metal vanes projecting radially inward from the wall of the guide and exited in the transverse-electric mode was analysed. From numerical analysis of this dispersion relation, it is shown that the stability behavior of the fast-wave mode is dependent of the dielectric constant. With a small axial momentum spreed, a super bandwidth is shown to be attainable by a mixed mode operation. Also, with the utilization from the numeric analysis of relation dispersion. We show that in the –speed mode, the constant is independent de-electric. With the ratio of dispersion of smell, high –bandwith was obtained for the combined mode. And at the end, we were comparing the result of our work (vane-loaded) by the waveguide with a smooth wall.

Keywords: gyrotron amplifier, waveguide, vane-loaded waveguide, dielectric material, dispersion relation, cylindrical waveguide, fast-wave mode, mixed mode operation

Procedia PDF Downloads 71
428 The Effect of Porous Alkali Activated Material Composition on Buffer Capacity in Bioreactors

Authors: Girts Bumanis, Diana Bajare

Abstract:

With demand for primary energy continuously growing, search for renewable and efficient energy sources has been high on agenda of our society. One of the most promising energy sources is biogas technology. Residues coming from dairy industry and milk processing could be used in biogas production; however, low efficiency and high cost impede wide application of such technology. One of the main problems is management and conversion of organic residues through the anaerobic digestion process which is characterized by acidic environment due to the low whey pH (<6) whereas additional pH control system is required. Low buffering capacity of whey is responsible for the rapid acidification in biological treatments; therefore alkali activated material is a promising solution of this problem. Alkali activated material is formed using SiO2 and Al2O3 rich materials under highly alkaline solution. After material structure forming process is completed, free alkalis remain in the structure of materials which are available for leaching and could provide buffer capacity potential. In this research porous alkali activated material was investigated. Highly porous material structure ensures gradual leaching of alkalis during time which is important in biogas digestion process. Research of mixture composition and SiO2/Na2O and SiO2/Al2O ratio was studied to test the buffer capacity potential of alkali activated material. This research has proved that by changing molar ratio of components it is possible to obtain a material with different buffer capacity, and this novel material was seen to have considerable potential for using it in processes where buffer capacity and pH control is vitally important.

Keywords: alkaline material, buffer capacity, biogas production, bioreactors

Procedia PDF Downloads 220
427 Design of 900 MHz High Gain SiGe Power Amplifier with Linearity Improved Bias Circuit

Authors: Guiheng Zhang, Wei Zhang, Jun Fu, Yudong Wang

Abstract:

A 900 MHz three-stage SiGe power amplifier (PA) with high power gain is presented in this paper. Volterra Series is applied to analyze nonlinearity sources of SiGe HBT device model clearly. Meanwhile, the influence of operating current to IMD3 is discussed. Then a β-helper current mirror bias circuit is applied to improve linearity, since the β-helper current mirror bias circuit can offer stable base biasing voltage. Meanwhile, it can also work as predistortion circuit when biasing voltages of three bias circuits are fine-tuned, by this way, the power gain and operating current of PA are optimized for best linearity. The three power stages which fabricated by 0.18 μm SiGe technology are bonded to the printed circuit board (PCB) to obtain impedances by Load-Pull system, then matching networks are done for best linearity with discrete passive components on PCB. The final measured three-stage PA exhibits 21.1 dBm of output power at 1 dB compression point (OP1dB) with power added efficiency (PAE) of 20.6% and 33 dB power gain under 3.3 V power supply voltage.

Keywords: high gain power amplifier, linearization bias circuit, SiGe HBT model, Volterra series

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426 A Low-Power Comparator Structure with Arbitrary Pre-Amplification Delay

Authors: Ata Khorami, Mohammad Sharifkhani

Abstract:

In the dynamic comparators, the pre-amplifier amplifies the input differential voltage and when the output Vcm of the pre-amplifier becomes larger than Vth of the latch input transistors, the latch is activated and finalizes the comparison. As a result, the pre-amplification delay is fixed to a value and cannot be set at the minimum required delay, thus, significant power and delay are imposed. In this paper, a novel structure is proposed through which the pre-amplification delay can be set at any low value saving power and time. Simulations show that using the proposed structure, by setting the pre-amplification delay at the minimum required value the power and comparison delay can be reduced by 55% and 100ps respectively.

Keywords: dynamic comparator, low power comparator, analog to digital converter, pre-amplification delay

Procedia PDF Downloads 182
425 A Virtual Grid Based Energy Efficient Data Gathering Scheme for Heterogeneous Sensor Networks

Authors: Siddhartha Chauhan, Nitin Kumar Kotania

Abstract:

Traditional Wireless Sensor Networks (WSNs) generally use static sinks to collect data from the sensor nodes via multiple forwarding. Therefore, network suffers with some problems like long message relay time, bottle neck problem which reduces the performance of the network. Many approaches have been proposed to prevent this problem with the help of mobile sink to collect the data from the sensor nodes, but these approaches still suffer from the buffer overflow problem due to limited memory size of sensor nodes. This paper proposes an energy efficient scheme for data gathering which overcomes the buffer overflow problem. The proposed scheme creates virtual grid structure of heterogeneous nodes. Scheme has been designed for sensor nodes having variable sensing rate. Every node finds out its buffer overflow time and on the basis of this cluster heads are elected. A controlled traversing approach is used by the proposed scheme in order to transmit data to sink. The effectiveness of the proposed scheme is verified by simulation.

Keywords: buffer overflow problem, mobile sink, virtual grid, wireless sensor networks

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424 Countercyclical Capital Buffer in the Polish Banking System

Authors: Mateusz Mokrogulski, Piotr Śliwka

Abstract:

The aim of this paper is the identification of periods of excessive credit growth in the Polish banking sector in years 2007-2014 using different methodologies. Due to the lack of precise guidance in CRD IV regarding methods of calculating the credit gap and related deviations from the long-term trends, a few filtering methods are applied, e.g. Hodrick-Prescott and Baxter-King. The solutions based on the switching model are also proposed. The next step represent computations of both the credit gap, and the counter cyclical capital buffer (CCB) rates on a quarterly basis. The calculations are carried out for the entire banking sector in Poland, as well as for its components (commercial and co-operative banks), and different types of loans. The calculations show vividly that in the analysed period there were the times of excessive credit growth. However, the results are different for the above mentioned sub-sectors. Of paramount importance here are mortgage loans, where the outcomes are distorted by high exchange rate fluctuations. The research on the CCB is now going to gain popularity as the buffer will soon become one of the tools of the macro prudential policy under CRD IV. Although the presented method is focused on the Polish banking sector, it can also be applied to other member states. Especially to the Central and Eastern European countries, that are usually characterized by smaller banking sectors compared to EU-15.

Keywords: countercyclical capital buffer, CRD IV, filtering methods, mortgage loans

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423 Optimization of Cu (In, Ga)Se₂ Based Thin Film Solar Cells: Simulation

Authors: Razieh Teimouri

Abstract:

Electrical modelling of Cu (In,Ga)Se₂ thin film solar cells is carried out with compositionally graded absorber and CdS buffer layer. Simulation results are compared with experimental data. Surface defect layers (SDL) are located in CdS/CIGS interface for improving open circuit voltage simulated structure through the analysis of the interface is investigated with or without this layer. When SDL removed, by optimizing the conduction band offset (CBO) position of the buffer/absorber layers with its recombination mechanisms and also shallow donor density in the CdS, the open circuit voltage increased significantly. As a result of simulation, excellent performance can be obtained when the conduction band of window layer positions higher by 0.2 eV than that of CIGS and shallow donor density in the CdS was found about 1×10¹⁸ (cm⁻³).

Keywords: CIGS solar cells, thin film, SCAPS, buffer layer, conduction band offset

Procedia PDF Downloads 201
422 Transient Enhanced LDO Voltage Regulator with Improved Feed Forward Path Compensation

Authors: A. Suresh, Sreehari Rao Patri, K. S. R. Krishnaprasad

Abstract:

An ultra low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gain-enhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 µA. An undershoot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 µs for the output voltage undershoot case. The load regulation is of 2.77 µV/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: capacitor-less LDO, frequency compensation, transient response, latch, self-biased differential amplifier

Procedia PDF Downloads 427
421 An Ultra-Low Output Impedance Power Amplifier for Tx Array in 7-Tesla Magnetic Resonance Imaging

Authors: Ashraf Abuelhaija, Klaus Solbach

Abstract:

In Ultra high-field MRI scanners (3T and higher), parallel RF transmission techniques using multiple RF chains with multiple transmit elements are a promising approach to overcome the high-field MRI challenges in terms of inhomogeneity in the RF magnetic field and SAR. However, mutual coupling between the transmit array elements disturbs the desirable independent control of the RF waveforms for each element. This contribution demonstrates a 18 dB improvement of decoupling (isolation) performance due to the very low output impedance of our 1 kW power amplifier.

Keywords: EM coupling, inter-element isolation, magnetic resonance imaging (mri), parallel transmit

Procedia PDF Downloads 467
420 Internal Node Stabilization for Voltage Sense Amplifiers in Multi-Channel Systems

Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, voltage transition, node stabilization, biasing circuits

Procedia PDF Downloads 451
419 Automated Buffer Box Assembly Cell Concept for the Canadian Used Fuel Packing Plant

Authors: Dimitrie Marinceu, Alan Murchison

Abstract:

The Canadian Used Fuel Container (UFC) is a mid-size hemispherical headed copper coated steel container measuring 2.5 meters in length and 0.5 meters in diameter containing 48 used fuel bundles. The contained used fuel produces significant gamma radiation requiring automated assembly processes to complete the assembly. The design throughput of 2,500 UFCs per year places constraints on equipment and hot cell design for repeatability, speed of processing, robustness and recovery from upset conditions. After UFC assembly, the UFC is inserted into a Buffer Box (BB). The BB is made from adequately pre-shaped blocks (lower and upper block) and Highly Compacted Bentonite (HCB) material. The blocks are practically ‘sandwiching’ the UFC between them after assembly. This paper identifies one possible approach for the BB automatic assembly cell and processes. Automation of the BB assembly will have a significant positive impact on nuclear safety, quality, productivity, and reliability.

Keywords: used fuel packing plant, automatic assembly cell, used fuel container, buffer box, deep geological repository

Procedia PDF Downloads 249
418 Stabilization Technique for Multi-Inputs Voltage Sense Amplifiers in Node Sharing Converters

Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, multi-inputs, voltage transition, node stabilization, biasing circuits

Procedia PDF Downloads 529
417 BodeACD: Buffer Overflow Vulnerabilities Detecting Based on Abstract Syntax Tree, Control Flow Graph, and Data Dependency Graph

Authors: Xinghang Lv, Tao Peng, Jia Chen, Junping Liu, Xinrong Hu, Ruhan He, Minghua Jiang, Wenli Cao

Abstract:

As one of the most dangerous vulnerabilities, effective detection of buffer overflow vulnerabilities is extremely necessary. Traditional detection methods are not accurate enough and consume more resources to meet complex and enormous code environment at present. In order to resolve the above problems, we propose the method for Buffer overflow detection based on Abstract syntax tree, Control flow graph, and Data dependency graph (BodeACD) in C/C++ programs with source code. Firstly, BodeACD constructs the function samples of buffer overflow that are available on Github, then represents them as code representation sequences, which fuse control flow, data dependency, and syntax structure of source code to reduce information loss during code representation. Finally, BodeACD learns vulnerability patterns for vulnerability detection through deep learning. The results of the experiments show that BodeACD has increased the precision and recall by 6.3% and 8.5% respectively compared with the latest methods, which can effectively improve vulnerability detection and reduce False-positive rate and False-negative rate.

Keywords: vulnerability detection, abstract syntax tree, control flow graph, data dependency graph, code representation, deep learning

Procedia PDF Downloads 141