Search results for: analog interface circuit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2217

Search results for: analog interface circuit

2187 Design of SAE J2716 Single Edge Nibble Transmission Digital Sensor Interface for Automotive Applications

Authors: Jongbae Lee, Seongsoo Lee

Abstract:

Modern sensors often embed small-size digital controller for sensor control, value calibration, and signal processing. These sensors require digital data communication with host microprocessors, but conventional digital communication protocols are too heavy for price reduction. SAE J2716 SENT (single edge nibble transmission) protocol transmits direct digital waveforms instead of complicated analog modulated signals. In this paper, a SENT interface is designed in Verilog HDL (hardware description language) and implemented in FPGA (field-programmable gate array) evaluation board. The designed SENT interface consists of frame encoder/decoder, configuration register, tick period generator, CRC (cyclic redundancy code) generator/checker, and TX/RX (transmission/reception) buffer. Frame encoder/decoder is implemented as a finite state machine, and it controls whole SENT interface. Configuration register contains various parameters such as operation mode, tick length, CRC option, pause pulse option, and number of nibble data. Tick period generator generates tick signals from input clock. CRC generator/checker generates or checks CRC in the SENT data frame. TX/RX buffer stores transmission/received data. The designed SENT interface can send or receives digital data in 25~65 kbps at 3 us tick. Synthesized in 0.18 um fabrication technologies, it is implemented about 2,500 gates.

Keywords: digital sensor interface, SAE J2716, SENT, verilog HDL

Procedia PDF Downloads 263
2186 Equivalent Circuit Representation of Lossless and Lossy Power Transmission Systems Including Discrete Sampler

Authors: Yuichi Kida, Takuro Kida

Abstract:

In a new smart society supported by the recent development of 5G and 6G Communication systems, the im- portance of wireless power transmission is increasing. These systems contain discrete sampling systems in the middle of the transmission path and equivalent circuit representation of lossless or lossy power transmission through these systems is an important issue in circuit theory. In this paper, for the given weight function, we show that a lossless power transmission system with the given weight is expressed by an equivalent circuit representation of the Kida’s optimal signal prediction system followed by a reactance multi-port circuit behind it. Further, it is shown that, when the system is lossy, the system has an equivalent circuit in the form of connecting a multi-port positive-real circuit behind the Kida’s optimal signal prediction system. Also, for the convenience of the reader, in this paper, the equivalent circuit expression of the reactance multi-port circuit and the positive- real multi-port circuit by Cauer and Ohno, whose information is currently being lost even in the world of the Internet.

Keywords: signal prediction, pseudo inverse matrix, artificial intelligence, power transmission

Procedia PDF Downloads 92
2185 Analysis of Scaling Effects on Analog/RF Performance of Nanowire Gate-All-Around MOSFET

Authors: Dheeraj Sharma, Santosh Kumar Vishvakarma

Abstract:

We present a detailed analysis of analog and radiofrequency (RF) performance with different gate lengths for nanowire cylindrical gate (CylG) gate-all-around (GAA) MOSFET. CylG GAA MOSFET not only suppresses the short channel effects (SCEs), it is also a good candidate for analog/RF device due to its high transconductance (gm) and high cutoff frequency (fT ). The presented work would be beneficial for a new generation of RF circuits and systems in a broad range of applications and operating frequency covering the RF spectrum. For this purpose, the analog/RF figures of merit for CylG GAA MOSFET is analyzed in terms of gate to source capacitance (Cgs), gate to drain capacitance (Cgd), transconductance generation factor gm = Id (where Id represents drain current), intrinsic gain, output resistance, fT, maximum frequency of oscillation (fmax) and gain bandwidth (GBW) product.

Keywords: Gate-All-Around MOSFET, GAA, output resistance, transconductance generation factor, intrinsic gain, cutoff frequency, fT

Procedia PDF Downloads 363
2184 Electrical Dault Detection of Photovoltaic System: A Short-Circuit Fault Case

Authors: Moustapha H. Ibrahim, Dahir Abdourahman

Abstract:

This document presents a short-circuit fault detection process in a photovoltaic (PV) system. The proposed method is developed in MATLAB/Simulink. It determines whatever the size of the installation number of the short circuit module. The proposed algorithm indicates the presence or absence of an abnormality on the power of the PV system through measures of hourly global irradiation, power output, and ambient temperature. In case a fault is detected, it displays the number of modules in a short circuit. This fault detection method has been successfully tested on two different PV installations.

Keywords: PV system, short-circuit, fault detection, modelling, MATLAB-Simulink

Procedia PDF Downloads 202
2183 The Effect of Circuit Training on Aerobic Fitness and Body Fat Percentage

Authors: Presto Tri Sambodo, Suharjana, Galih Yoga Santiko

Abstract:

Having an ideal body shape healthy body are the desire of everyone, both young and old. The purpose of this study was to determine: (1) the effect of block circuit training on aerobic fitness and body fat percentage, (2) the effect of non-block circuit training on aerobic fitness and body fat percentage, and (3) differences in the effect of exercise on block and non-circuit training block against aerobic fitness and body fat percentage. This research is an experimental research with the prestest posttest design Two groups design. The population in this study were 57 members of fat loss at GOR UNY Fitness Center. The retrieval technique uses purposive random sampling with a sample of 20 people. The instruments with rockport test (1.6 KM) and body fat percentage with a scale of bioelectrical impedance analysis omron (BIA). So it can be concluded the circuit training between block and non-block has a significant effect on aerobic fitness and body fat percentage. And for differences in the effect of circuit training between blocks and non-blocks, it is more influential on aerobic fitness than the percentage of body fat.

Keywords: circuit training, aerobic fitness, body fat percentage, healthy body

Procedia PDF Downloads 207
2182 A Novel PWM/PFM Controller for PSR Fly-Back Converter Using a New Peak Sensing Technique

Authors: Sanguk Nam, Van Ha Nguyen, Hanjung Song

Abstract:

For low-power applications such as adapters for portable devices and USB chargers, the primary side regulation (PSR) fly-back converter is widely used in lieu of the conventional fly-back converter using opto-coupler because of its simpler structure and lower cost. In the literature, there has been studies focusing on the design of PSR circuit; however, the conventional sensing method in PSR circuit using RC delay has a lower accuracy as compared to the conventional fly-back converter using opto-coupler. In this paper, we propose a novel PWM/PFM controller using new sensing technique for the PSR fly-back converter which can control an accurate output voltage. The conventional PSR circuit can sense the output voltage information from the auxiliary winding to regulate the duty cycle of the clock that control the output voltage. In the sensing signal waveform, there has two transient points at time the voltage equals to Vout+VD and Vout, respectively. In other to sense the output voltage, the PSR circuit must detect the time at which the current of the diode at the output equals to zero. In the conventional PSR flyback-converter, the sensing signal at this time has a non-sharp-negative slope that might cause a difficulty in detecting the output voltage information since a delay of sensing signal or switching clock may exist which brings out an unstable operation of PSR fly-back converter. In this paper instead of detecting output voltage at a non-sharp-negative slope, a sharp-positive slope is used to sense the proper information of the output voltage. The proposed PRS circuit consists of a saw-tooth generator, a summing circuit, a sample and hold circuit and a peak detector. Besides, there is also the start-up circuit which protects the chip from high surge current when the converter is turned on. Additionally, to reduce the standby power loss, a second mode which operates in a low frequency is designed beside the main mode at high frequency. In general, the operation of the proposed PSR circuit can be summarized as following: At the time the output information is sensed from the auxiliary winding, a saw-tooth signal from the saw-tooth generator is generated. Then, both of these signals are summed using a summing circuit. After this process, the slope of the peak of the sensing signal at the time diode current is zero becomes positive and sharp that make the peak easy to detect. The output of the summing circuit then is fed into a peak detector and the sample and hold circuit; hence, the output voltage can be properly sensed. By this way, we can sense more accurate output voltage information and extend margin even circuit is delayed or even there is the existence of noise by using only a simple circuit structure as compared with conventional circuits while the performance can be sufficiently enhanced. Circuit verification was carried out using 0.35μm 700V Magnachip process. The simulation result of sensing signal shows a maximum error of 5mV under various load and line conditions which means the operation of the converter is stable. As compared to the conventional circuit, we achieved very small error only used analog circuits compare with conventional circuits. In this paper, a PWM/PFM controller using a simple and effective sensing method for PSR fly-back converter has been presented in this paper. The circuit structure is simple as compared with the conventional designs. The gained results from simulation confirmed the idea of the design

Keywords: primary side regulation, PSR, sensing technique, peak detector, PWM/PFM control, fly-back converter

Procedia PDF Downloads 315
2181 Equivalent Circuit Modelling of Active Reflectarray Antenna

Authors: M. Y. Ismail, M. Inam

Abstract:

This paper presents equivalent circuit modeling of active planar reflectors which can be used for the detailed analysis and characterization of reflector performance in terms of lumped components. Equivalent circuit representation has been proposed for PIN diodes and liquid crystal based active planar reflectors designed within X-band frequency range. A very close agreement has been demonstrated between equivalent circuit results, 3D EM simulated results as well as measured scattering parameter results. In the case of measured results, a maximum discrepancy of 1.05dB was observed in the reflection loss performance, which can be attributed to the losses occurred during measurement process.

Keywords: Equivalent circuit modelling, planar reflectors, reflectarray antenna, PIN diode, liquid crystal

Procedia PDF Downloads 255
2180 An Analysis of OpenSim Graphical User Interface Effectiveness

Authors: Sina Saadati

Abstract:

OpenSim is a well-known software in biomechanical studies. There are worthy algorithms developed in this program which are used for modeling and simulation of human motions. In this research, we analyze the OpenSim application from the computer science perspective. It is important that every application have a user-friendly interface. An effective user interface can decrease the time, costs, and energy needed to learn how to use a program. In this paper, we survey the user interface of OpenSim as an important factor of the software. Finally, we infer that there are many challenges to be addressed in the development of OpenSim.

Keywords: biomechanics, computer engineering, graphical user interface, modeling and simulation, interface effectiveness

Procedia PDF Downloads 54
2179 On-Chip Aging Sensor Circuit Based on Phase Locked Loop Circuit

Authors: Ararat Khachatryan, Davit Mirzoyan

Abstract:

In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: aging effect, HCI, NBTI, nanoscale

Procedia PDF Downloads 334
2178 A Novel Idea to Benefit of the Load Side’s Harmonics

Authors: Hussein Al-bayaty

Abstract:

This paper presents a novel idea to show the ability to benefit of the harmonic currents which are produced on the load side of the power grid. The proposed circuit contributes in reduction of the total harmonic distortion (THD) percentage through adding a high pass filter to draw harmonic currents with 150 Hz and multiple frequencies a and convert them to DC current and then reconvert it to AC current with 50 Hz frequency in order to feed different loads. The circuit has been designed, investigated and simulated in the MATLAB, Simulink program; the results will be assessed and compared the two cases: firstly, the system without adding the new circuit. Secondly, with adding the high pas filter circuit to the power system.

Keywords: harmonics elimination, passive filters, Total Harmonic Distortion (THD), filter circuit

Procedia PDF Downloads 386
2177 Effect of Feed Rate on Grinding Circuits and Cyclone Efficiency

Authors: Patel Himeshkumar Ashokbhai, Suchit Sharma, Arvind Kumar Garg

Abstract:

The purpose of this paper is to study the effect of change in feed rate on grinding circuit and cyclone efficiency in case of lead-zinc ore. The following experiments and analysis were conducted on beneficiation circuit of Sindesar Khurd (SK) mines under Hindustan Zinc Ltd. subsidiary of Vedanta Group of Companies, a leading producer of lead-Zinc, silver and cadmium (as by products) in India. Feed rate is an important variable in beneficiation circuit operation. Optimizing feed rate is indispensable for any grinding circuit and directly effects cyclone efficiency. The size analysis of ore in grinding circuit along with cyclone efficiency on varying feed rates establishes their interdependence. Feed rate determines retention time ore gets within grinding circuit. Retention time in turn determines degree of liberation of mineral. Inadequate liberation causes decreased circuit efficiency. In this paper we have studied the effect of varying feed rate on (1) D80 particle size of different sections of different streams of grinding circuit (2) Re-circulating load (3) Cyclone efficiency. As a conclusion, this study gives some clues to operate grinding circuits and hydro-cyclones in more efficient way regarding beneficiation of Lead-zinc ore.

Keywords: cyclone efficiency, feed rate, grinding circuit, re-circulating load

Procedia PDF Downloads 369
2176 Combined Influence of Charge Carrier Density and Temperature on Open-Circuit Voltage in Bulk Heterojunction Organic Solar Cells

Authors: Douglas Yeboah, Monishka Narayan, Jai Singh

Abstract:

One of the key parameters in determining the power conversion efficiency (PCE) of organic solar cells (OSCs) is the open-circuit voltage, however, it is still not well understood. In order to examine the performance of OSCs, it is necessary to understand the losses associated with the open-circuit voltage and how best it can be improved. Here, an analytical expression for the open-circuit voltage of bulk heterojunction (BHJ) OSCs is derived from the charge carrier densities without considering the drift-diffusion current. The open-circuit voltage thus obtained is dependent on the donor-acceptor band gap, the energy difference between the highest occupied molecular orbital (HOMO) and the hole quasi-Fermi level of the donor material, temperature, the carrier density (electrons), the generation rate of free charge carriers and the bimolecular recombination coefficient. It is found that open-circuit voltage increases when the carrier density increases and when the temperature decreases. The calculated results are discussed in view of experimental results and agree with them reasonably well. Overall, this work proposes an alternative pathway for improving the open-circuit voltage in BHJ OSCs.

Keywords: charge carrier density, open-circuit voltage, organic solar cells, temperature

Procedia PDF Downloads 328
2175 Development of 35kV SF6 Phase-Control Circuit Breaker Equipped with EFDA

Authors: Duanlei Yuan, Guangchao Yan, Zhanqing Chen, Xian Cheng

Abstract:

This paper mainly focuses on the problem that high voltage circuit breaker’s closing and opening operation at random phase brings harmful electromagnetic transient effects on the power system. To repress the negative transient effects, a 35 kV SF6 phase-control circuit breaker equipped with electromagnetic force driving actuator is designed in this paper. Based on the constructed mathematical and structural models, the static magnetic field distribution and dynamic properties of the under loading actuator are simulated. The prototype of 35 kV SF6 phase-control circuit breaker is developed based on theories analysis and simulation. Tests are carried on to verify the operating reliability of the prototype. The developed circuit breaker can control its operating speed intelligently and switches with phase selection. Results of the tests and simulation prove that the phase-control circuit breaker is feasible for industrial applications.

Keywords: phase-control, circuit breaker, electromagnetic force driving actuator, tests and simulation

Procedia PDF Downloads 369
2174 A Silicon Controlled Rectifier-Based ESD Protection Circuit with High Holding Voltage and High Robustness Characteristics

Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

Abstract:

In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

Procedia PDF Downloads 369
2173 Interactive Multiple Functions User Interface

Authors: Manjit Singh Sidhu, Waleed Maqableh, Jee Geak Ying

Abstract:

Tangible user interfaces (TUI) that employ markers in the augmented reality (AR) environment has hampered the interactivity between the user and the software application. This is because the user lacks focus on visualizing the contents due to the interaction mechanisms whereby multiple markers may need to be used to perform a particular function. In this research, we have designed a novel TUI user interface where multiple functions could be triggered similar to a natural keyboard thus allowing user to focus more on its digital contents such as 2D/3D, text input, animation and sound. Test results of the user interface with potential users and HCI experts revealed that the multiple functions user interface was new, preferred and appreciated more as opposed to marker based user interface.

Keywords: multimedia, augmented reality, engineering, user interface, visualization

Procedia PDF Downloads 416
2172 Analog Railway Signal Object Controller Development

Authors: Ercan Kızılay, Mustafa Demi̇rel, Selçuk Coşkun

Abstract:

Railway signaling systems consist of vital products that regulate railway traffic and provide safe route arrangements and maneuvers of trains. SIL 4 signal lamps are produced by many manufacturers today. There is a need for systems that enable these signal lamps to be controlled by commands from the interlocking. These systems should act as fail-safe and give error indications to the interlocking system when an unexpected situation occurs for the safe operation of railway systems from the RAMS perspective. In the past, driving and proving the lamp in relay-based systems was typically done via signaling relays. Today, the proving of lamps is done by comparing the current values read over the return circuit, the lower and upper threshold values. The purpose is an analog electronic object controller with the possibility of easy integration with vital systems and the signal lamp itself. During the study, the EN50126 standard approach was considered, and the concept, definition, risk analysis, requirements, architecture, design, and prototyping were performed throughout this study. FMEA (Failure Modes and Effects Analysis) and FTA (Fault Tree) Analysis) have been used for safety analysis in accordance with EN 50129. Concerning these analyzes, the 1oo2D reactive fail-safe hardware design of a controller has been researched. Electromagnetic compatibility (EMC) effects on the functional safety of equipment, insulation coordination, and over-voltage protection were discussed during hardware design according to EN 50124 and EN 50122 standards. As vital equipment for railway signaling, railway signal object controllers should be developed according to EN 50126 and EN 50129 standards which identify the steps and requirements of the development in accordance with the SIL 4(Safety Integrity Level) target. In conclusion of this study, an analog railway signal object controller, which takes command from the interlocking system, is processed in driver cards. Driver cards arrange the voltage level according to desired visibility by means of semiconductors. Additionally, prover cards evaluate the current upper and lower thresholds. Evaluated values are processed via logic gates which are composed as 1oo2D by means of analog electronic technologies. This logic evaluates the voltage level of the lamp and mitigates the risks of undue dimming.

Keywords: object controller, railway electronic, analog electronic, safety, railway signal

Procedia PDF Downloads 61
2171 The Performance of Typical Kinds of Coating of Printed Circuit Board under Accelerated Degradation Test

Authors: Xiaohui Wang, Liwei Sun, Guilin Zhang

Abstract:

Printed circuit board (PCB) is the carrier of electronic components. Its coating is the first barrier for protecting itself. If the coating is damaged, the performance of printed circuit board will decrease rapidly until failure. Therefore, the coating plays an important role in the entire printed circuit board. There are common four kinds of coating of printed circuit board that the material of the coatings are paryleneC, acrylic, polyurethane, silicone. In this paper, we designed an accelerated degradation test of humid and heat for these four kinds of coating. And chose insulation resistance, moisture absorption and surface morphology as its test indexes. By comparing the change of insulation resistance of the coating before and after the test, we estimate failure time of these coatings based on the degradation of insulation resistance. Based on the above, we estimate the service life of the four kinds of PCB.

Keywords: printed circuit board, life assessment, insulation resistance, coating material

Procedia PDF Downloads 502
2170 Feasibilities for Recovering of Precious Metals from Printed Circuit Board Waste

Authors: Simona Ziukaite, Remigijus Ivanauskas, Gintaras Denafas

Abstract:

Market development of electrical and electronic equipment and a short life cycle is driven by the increasing waste streams. Gold Au, copper Cu, silver Ag and palladium Pd can be found on printed circuit board. These metals make up the largest value of printed circuit board. Therefore, the printed circuit boards scrap is valuable as potential raw material for precious metals recovery. A comparison of Cu, Au, Ag, Pd recovery from waste printed circuit techniques was selected metals leaching of chemical reagents. The study was conducted using the selected multistage technique for Au, Cu, Ag, Pd recovery of printed circuit board. In the first and second metals leaching stages, as the elution reagent, 2M H2SO4 and H2O2 (35%) was used. In the third stage, leaching of precious metals used solution of 20 g/l of thiourea and 6 g/l of Fe2 (SO4)3. Verify the efficiency of the method was carried out the metals leaching test with aqua regia. Based on the experimental study, the leaching efficiency, using the preferred methodology, 60 % of Au and 85,5 % of Cu dissolution was achieved. Metals leaching efficiency after waste mechanical crushing and thermal treatment have been increased by 1,7 times (40 %) for copper, 1,6 times (37 %) for gold and 1,8 times (44 %) for silver. It was noticed that, the Au amount in old (> 20 years) waste is 17 times more, Cu amount - 4 times more, and Ag - 2 times more than in the new (< 1 years) waste. Palladium in the new printed circuit board waste has not been found, however, it was established that from 1 t of old printed circuit board waste can be recovered 1,064 g of Pd (leaching with aqua regia). It was found that from 1 t of old printed circuit board waste can be recovered 1,064 g of Ag. Precious metals recovery in Lithuania was estimated in this study. Given the amounts of generated printed circuit board waste, the limits for recovery of precious metals were identified.

Keywords: leaching efficiency, limits for recovery, precious metals recovery, printed circuit board waste

Procedia PDF Downloads 363
2169 Evaluation of the Matching Optimization of Human-Machine Interface Matching in the Cab

Authors: Yanhua Ma, Lu Zhai, Xinchen Wang, Hongyu Liang

Abstract:

In this paper, by understanding the development status of the human-machine interface in today's automobile cab, a subjective and objective evaluation system for evaluating the optimization of human-machine interface matching in automobile cab was established. The man-machine interface of the car cab was divided into a software interface and a hard interface. Objective evaluation method of software human factor analysis is used to evaluate the hard interface matching; The analytic hierarchy process is used to establish the evaluation index system for the software interface matching optimization, and the multi-level fuzzy comprehensive evaluation method is used to evaluate hard interface machine. This article takes Dongfeng Sokon (DFSK) C37 model automobile as an example. The evaluation method given in the paper is used to carry out relevant analysis and evaluation, and corresponding optimization suggestions are given, which have certain reference value for designers.

Keywords: analytic hierarchy process, fuzzy comprehension evaluation method, human-machine interface, matching optimization, software human factor analysis

Procedia PDF Downloads 113
2168 Dielectric Recovery Characteristics of High Voltage Gas Circuit Breakers Operating with CO₂ Mixture

Authors: Peng Lu, Branimir Radisavljevic, Martin Seeger, Daniel Over, Torsten Votteler, Bernardo Galletti

Abstract:

CO₂-based gas mixtures exhibit huge potential as the interruption medium for replacing SF₆ in high voltage switchgears. In this paper, the recovery characteristics of dielectric strength of CO₂-O₂ mixture in the post arc phase after the current zero are presented. As representative examples, the dielectric recovery curves under conditions of different gas filling pressures and short-circuit current amplitudes are presented. A series of dielectric recovery measurements suggests that the dielectric recovery rate is proportional to the mass flux of the blowing gas, and the dielectric strength recovers faster in the case of lower short circuit currents.

Keywords: CO₂ mixture, high voltage circuit breakers, dielectric recovery rate, short-circuit current, mass flux

Procedia PDF Downloads 166
2167 Delamination of Scale in a Fe Carbon Steel Surface by Effect of Interface Roughness and Oxide Scale Thickness

Authors: J. M. Lee, W. R. Noh, C. Y. Kim, M. G. Lee

Abstract:

Delamination of oxide scale has been often discovered at the interface between Fe carbon steel and oxide scale. Among several mechanisms of this delamination behavior, the normal tensile stress to the substrate-scale interface has been described as one of the main factors. The stress distribution at the interface is also known to be affected by thermal expansion mismatch between substrate and oxide scale, creep behavior during cooling and the geometry of the interface. In this study, stress states near the interface in a Fe carbon steel with oxide scale have been investigated using FE simulations. The thermal and mechanical properties of oxide scales are indicated in literature and Fe carbon steel is measured using tensile testing machine. In particular, the normal and shear stress components developed at the interface during bending are investigated. Preliminary numerical sensitivity analyses are provided to explain the effects of the interface geometry and oxide thickness on the delamination behavior.

Keywords: oxide scale, delamination, Fe analysis, roughness, thickness, stress state

Procedia PDF Downloads 317
2166 Innovative Three Wire Capacitor Circuit System for Efficiency and Comfort Improvement of Ceiling Fans

Authors: R. K. Saket, K. S. Anand Kumar

Abstract:

This paper presents an innovative 3-wire capacitor circuit system used to increase the efficiency and comfort improvement of permanent split-capacitor ceiling fan. In this innovative circuit, current has been reduced to save electrical power. The system could be used to replace standard single phase motor 2-wire capacitor configuration by cost effective split value X rated of optimized AC capacitors with the auxiliary winding to provide reliable ceiling fan operation and improved machine performance to save power. In basic system operations, comparisons with conventional ceiling fan are described.

Keywords: permanent split-capacitor motor, innovative 3-wire capacitor circuit system, standard 2-wire capacitor circuit system, metalized film X-rated capacitor

Procedia PDF Downloads 489
2165 [Keynote Talk]: sEMG Interface Design for Locomotion Identification

Authors: Rohit Gupta, Ravinder Agarwal

Abstract:

Surface electromyographic (sEMG) signal has the potential to identify the human activities and intention. This potential is further exploited to control the artificial limbs using the sEMG signal from residual limbs of amputees. The paper deals with the development of multichannel cost efficient sEMG signal interface for research application, along with evaluation of proposed class dependent statistical approach of the feature selection method. The sEMG signal acquisition interface was developed using ADS1298 of Texas Instruments, which is a front-end interface integrated circuit for ECG application. Further, the sEMG signal is recorded from two lower limb muscles for three locomotions namely: Plane Walk (PW), Stair Ascending (SA), Stair Descending (SD). A class dependent statistical approach is proposed for feature selection and also its performance is compared with 12 preexisting feature vectors. To make the study more extensive, performance of five different types of classifiers are compared. The outcome of the current piece of work proves the suitability of the proposed feature selection algorithm for locomotion recognition, as compared to other existing feature vectors. The SVM Classifier is found as the outperformed classifier among compared classifiers with an average recognition accuracy of 97.40%. Feature vector selection emerges as the most dominant factor affecting the classification performance as it holds 51.51% of the total variance in classification accuracy. The results demonstrate the potentials of the developed sEMG signal acquisition interface along with the proposed feature selection algorithm.

Keywords: classifiers, feature selection, locomotion, sEMG

Procedia PDF Downloads 267
2164 Computer-Aided Teaching of Transformers for Undergraduates

Authors: Rajesh Kumar, Roopali Dogra, Puneet Aggarwal

Abstract:

In the era of technological advancement, use of computer technology has become inevitable. Hence it has become the need of the hour to integrate software methods in engineering curriculum as a part to boost pedagogy techniques. Simulations software is a great help to graduates of disciplines such as electrical engineering. Since electrical engineering deals with high voltages and heavy instruments, extra care must be taken while operating with them. The viable solution would be to have appropriate control. The appropriate control could be well designed if engineers have knowledge of kind of waveforms associated with the system. Though these waveforms can be plotted manually, but it consumes a lot of time. Hence aid of simulation helps to understand steady state of system and resulting in better performance. In this paper computer, aided teaching of transformer is carried out using MATLAB/Simulink. The test carried out on a transformer includes open circuit test and short circuit respectively. The respective parameters of transformer are then calculated using the values obtained from open circuit and short circuit test respectively using Simulink.

Keywords: computer aided teaching, open circuit test, short circuit test, simulink, transformer

Procedia PDF Downloads 342
2163 Design and Implementation of Wave-Pipelined Circuit Using Reconfigurable Technique

Authors: Adhinarayanan Venkatasubramanian

Abstract:

For design of high speed digital circuit wave pipeline is the best approach this can be operated at higher operating frequencies by adjusting clock periods and skews so as latch the o/p of combinational logic circuit at the stable period. In this paper, there are two methods are proposed in automation task one is BIST (Built in self test) and second method is Reconfigurable technique. For the above two approaches dedicated AND gate (multiplier) by applying wave pipeline technique. BIST approach is implemented by Xilinx Spartan-II device. In reconfigurable technique done by ASIC. From the results, wave pipeline circuits are faster than nonpipeline circuit and area, power dissipation are reduced by reconfigurable technique.

Keywords: SOC, wave-pipelining, FPGA, self-testing, reconfigurable, ASIC

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2162 Dynamical Relation of Poisson Spike Trains in Hodkin-Huxley Neural Ion Current Model and Formation of Non-Canonical Bases, Islands, and Analog Bases in DNA, mRNA, and RNA at or near the Transcription

Authors: Michael Fundator

Abstract:

Groundbreaking application of biomathematical and biochemical research in neural networks processes to formation of non-canonical bases, islands, and analog bases in DNA and mRNA at or near the transcription that contradicts the long anticipated statistical assumptions for the distribution of bases and analog bases compounds is implemented through statistical and stochastic methods apparatus with addition of quantum principles, where the usual transience of Poisson spike train becomes very instrumental tool for finding even almost periodical type of solutions to Fokker-Plank stochastic differential equation. Present article develops new multidimensional methods of finding solutions to stochastic differential equations based on more rigorous approach to mathematical apparatus through Kolmogorov-Chentsov continuity theorem that allows the stochastic processes with jumps under certain conditions to have γ-Holder continuous modification that is used as basis for finding analogous parallels in dynamics of neutral networks and formation of analog bases and transcription in DNA.

Keywords: Fokker-Plank stochastic differential equation, Kolmogorov-Chentsov continuity theorem, neural networks, translation and transcription

Procedia PDF Downloads 370
2161 Investigation of Threshold Voltage Shift in Gamma Irradiated N-Channel and P-Channel MOS Transistors of CD4007

Authors: S. Boorboor, S. A. H. Feghhi, H. Jafari

Abstract:

The ionizing radiations cause different kinds of damages in electronic components. MOSFETs, most common transistors in today’s digital and analog circuits, are severely sensitive to TID damage. In this work, the threshold voltage shift of CD4007 device, which is an integrated circuit including P-channel and N-channel MOS transistors, was investigated for low dose gamma irradiation under different gate bias voltages. We used linear extrapolation method to extract threshold voltage from ID-VG characteristic curve. The results showed that the threshold voltage shift was approximately 27.5 mV/Gy for N-channel and 3.5 mV/Gy for P-channel transistors at the gate bias of |9 V| after irradiation by Co-60 gamma ray source. Although the sensitivity of the devices under test were strongly dependent to biasing condition and transistor type, the threshold voltage shifted linearly versus accumulated dose in all cases. The overall results show that the application of CD4007 as an electronic buffer in a radiation therapy system is limited by TID damage. However, this integrated circuit can be used as a cheap and sensitive radiation dosimeter for accumulated dose measurement in radiation therapy systems.

Keywords: threshold voltage shift, MOS transistor, linear extrapolation, gamma irradiation

Procedia PDF Downloads 251
2160 PSRR Enhanced LDO Regulator Using Noise Sensing Circuit

Authors: Min-ju Kwon, Chae-won Kim, Jeong-yun Seo, Hee-guk Chae, Yong-seo Koo

Abstract:

In this paper, we presented the LDO (low-dropout) regulator which enhanced the PSRR by applying the constant current source generation technique through the BGR (Band Gap Reference) to form the noise sensing circuit. The current source through the BGR has a constant current value even if the applied voltage varies. Then, the noise sensing circuit, which is composed of the current source through the BGR, operated between the error amplifier and the pass transistor gate of the LDO regulator. As a result, the LDO regulator has a PSRR of -68.2 dB at 1k Hz, -45.85 dB at 1 MHz and -45 dB at 10 MHz. the other performance of the proposed LDO was maintained at the same level of the conventional LDO regulator.

Keywords: LDO regulator, noise sensing circuit, current reference, pass transistor

Procedia PDF Downloads 250
2159 A Study on ESD Protection Circuit Applying Silicon Controlled Rectifier-Based Stack Technology with High Holding Voltage

Authors: Hee-Guk Chae, Bo-Bae Song, Kyoung-Il Do, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

In this study, an improved Electrostatic Discharge (ESD) protection circuit with low trigger voltage and high holding voltage is proposed. ESD has become a serious problem in the semiconductor process because the semiconductor density has become very high these days. Therefore, much research has been done to prevent ESD. The proposed circuit is a stacked structure of the new unit structure combined by the Zener Triggering (SCR ZTSCR) and the High Holding Voltage SCR (HHVSCR). The simulation results show that the proposed circuit has low trigger voltage and high holding voltage. And the stack technology is applied to adjust the various operating voltage. As the results, the holding voltage is 7.7 V for 2-stack and 10.7 V for 3-stack.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

Procedia PDF Downloads 495
2158 Electronic States at SnO/SnO2 Heterointerfaces

Authors: A. Albar, U. Schwingenschlogel

Abstract:

Device applications of transparent conducting oxides require a thorough understanding of the physical and chemical properties of the involved interfaces. We use ab-initio calculations within density functional theory to investigate the electronic states at the SnO/SnO2 hetero-interface. Tin dioxide and monoxide are transparent materials with high n-type and p-type mobilities, respectively. This work aims at exploring the modifications of the electronic states, in particular the charge transfer, in the vicinity of the hetero-interface. The (110) interface is modeled by a super-cell approach in order to minimize the mismatch between the lattice parameters of the two compounds. We discuss the electronic density of states as a function of the distance to the interface.

Keywords: density of states, ab-initio calculations, interface states, charge transfer

Procedia PDF Downloads 382