Search results for: gate capacitance
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 423

Search results for: gate capacitance

183 High-Frequency Full-Bridge Isolated DC-DC Converter for Fuel Cell Power Generation Systems

Authors: Nabil A. Ahmed

Abstract:

DC-DC converters are necessary to interface low-voltage fuel cell power generation systems to a higher voltage DC bus system. A system and method for generating a regulated output power from fuel cell power generation systems is proposed in this paper, this includes a soft-switching isolated DC-DC converter to reduce the idling and circulating currents. The system incorporates a high-frequency center tap transformer link DC-DC converter using secondary-side soft switching control. Snubber capacitors including the parasitic capacitance of the switching devices and the transformer leakage inductance are utilized to achieve zero-voltage switching (ZVS) in the primary side of the high-frequency transformer. Therefore, no extra resonant components are required for ZVS. The inherent soft-switching capability allows high power density, efficient power conversion, and compact packaging. A prototype rated at 6.5 kW is proposed and simulated. Simulation results confirmed a wide range of soft-switching operation and consequently high conversion efficiency will be achieved.

Keywords: secondary-side, phase-shift, high-frequency transformer, zero voltage, zero current, soft switching operation, switching losses

Procedia PDF Downloads 312
182 Design and Implementation of Testable Reversible Sequential Circuits Optimized Power

Authors: B. Manikandan, A. Vijayaprabhu

Abstract:

The conservative reversible gates are used to designed reversible sequential circuits. The sequential circuits are flip-flops and latches. The conservative logic gates are Feynman, Toffoli, and Fredkin. The design of two vectors testable sequential circuits based on conservative logic gates. All sequential circuit based on conservative logic gates can be tested for classical unidirectional stuck-at faults using only two test vectors. The two test vectors are all 1s, and all 0s. The designs of two vectors testable latches, master-slave flip-flops and double edge triggered (DET) flip-flops are presented. We also showed the application of the proposed approach toward 100% fault coverage for single missing/additional cell defect in the quantum- dot cellular automata (QCA) layout of the Fredkin gate. The conservative logic gates are in terms of complexity, speed, and area.

Keywords: DET, QCA, reversible logic gates, POS, SOP, latches, flip flops

Procedia PDF Downloads 306
181 An Embedded High Speed Adder for Arithmetic Computations

Authors: Kala Bharathan, R. Seshasayanan

Abstract:

In this paper, a 1-bit Embedded Logic Full Adder (EFA) circuit in transistor level is proposed, which reduces logic complexity, gives low power and high speed. The design is further extended till 64 bits. To evaluate the performance of EFA, a 16, 32, 64-bit both Linear and Square root Carry Select Adder/Subtractor (CSLAS) Structure is also proposed. Realistic testing of proposed circuits is done on 8 X 8 Modified Booth multiplier and comparison in terms of power and delay is done. The EFA is implemented for different multiplier architectures for performance parameter comparison. Overall delay for CSLAS is reduced to 78% when compared to conventional one. The circuit implementations are done on TSMC 28nm CMOS technology using Cadence Virtuoso tool. The EFA has power savings of up to 14% when compared to the conventional adder. The present implementation was found to offer significant improvement in terms of power and speed in comparison to other full adder circuits.

Keywords: embedded logic, full adder, pdp, xor gate

Procedia PDF Downloads 448
180 A Study of the Carbon Footprint from a Liquid Silicone Rubber Compounding Facility in Malaysia

Authors: Q. R. Cheah, Y. F. Tan

Abstract:

In modern times, the push for a low carbon footprint entails achieving carbon neutrality as a goal for future generations. One possible step towards carbon footprint reduction is the use of more durable materials with longer lifespans, for example, silicone data cableswhich show at least double the lifespan of similar plastic products. By having greater durability and longer lifespans, silicone data cables can reduce the amount of trash produced as compared to plastics. Furthermore, silicone products don’t produce micro contamination harmful to the ocean. Every year the electronics industry produces an estimated 5 billion data cables for USB type C and lightning data cables for tablets and mobile phone devices. Material usage for outer jacketing is 6 to 12 grams per meter. Tests show that the product lifespan of a silicone data cable over plastic can be doubled due to greater durability. This can save at least 40,000 tonnes of material a year just on the outer jacketing of the data cable. The facility in this study specialises in compounding of liquid silicone rubber (LSR) material for the extrusion process in jacketing for the silicone data cable. This study analyses the carbon emissions from the facility, which is presently capable of producing more than 1,000 tonnes of LSR annually. This study uses guidelines from the World Business Council for Sustainable Development (WBCSD) and World Resources Institute (WRI) to define the boundaries of the scope. The scope of emissions is defined as 1. Emissions from operations owned or controlled by the reporting company, 2. Emissions from the generation of purchased or acquired energy such as electricity, steam, heating, or cooling consumed by the reporting company, and 3. All other indirect emissions occurring in the value chain of the reporting company, including both upstream and downstream emissions. As the study is limited to the compounding facility, the system boundaries definition according to GHG protocol is cradle-to-gate instead of cradle-to-grave exercises. Malaysia’s present electricity generation scenario was also used, where natural gas and coal constitute the bulk of emissions. Calculations show the LSR produced for the silicone data cable with high fire retardant capability has scope 1 emissions of 0.82kg CO2/kg, scope 2 emissions of 0.87kg CO2/kg, and scope 3 emissions of 2.76kg CO2/kg, with a total product carbon footprint of 4.45kg CO2/kg. This total product carbon footprint (Cradle-to-gate) is comparable to the industry and to plastic materials per tonne of material. Although per tonne emission is comparable to plastic material, due to greater durability and longer lifespan, there can be significantly reduced use of LSR material. Suggestions to reduce the calculated product carbon footprint in the scope of emissions involve 1. Incorporating the recycling of factory silicone waste into operations, 2. Using green renewable energy for external electricity sources and 3. Sourcing eco-friendly raw materials with low GHG emissions.

Keywords: carbon footprint, liquid silicone rubber, silicone data cable, Malaysia facility

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179 Saturation Misbehavior and Field Activation of the Mobility in Polymer-Based OTFTs

Authors: L. Giraudet, O. Simonetti, G. de Tournadre, N. Dumelié, B. Clarenc, F. Reisdorffer

Abstract:

In this paper we intend to give a comprehensive view of the saturation misbehavior of thin film transistors (TFTs) based on disordered semiconductors, such as most organic TFTs, and its link to the field activation of the mobility. Experimental evidence of the field activation of the mobility is given for disordered semiconductor based TFTs, when reducing the gate length. Saturation misbehavior is observed simultaneously. Advanced transport models have been implemented in a quasi-2D numerical TFT simulation software. From the numerical simulations it is clearly established that field activation of the mobility alone cannot explain the saturation misbehavior. Evidence is given that high longitudinal field gradient at the drain end of the channel is responsible for an excess charge accumulation, preventing saturation. The two combined effects allow reproducing the experimental output characteristics of short channel TFTs, with S-shaped characteristics and saturation failure.

Keywords: mobility field activation, numerical simulation, OTFT, saturation failure

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178 A Smart Visitors’ Notification System with Automatic Secure Door Lock Using Mobile Communication Technology

Authors: Rabail Shafique Satti, Sidra Ejaz, Madiha Arshad, Marwa Khalid, Sadia Majeed

Abstract:

The paper presents the development of an automated security system to automate the entry of visitors, providing more flexibility of managing their record and securing homes or workplaces. Face recognition is part of this system to authenticate the visitors. A cost effective and SMS based door security module has been developed and integrated with the GSM network and made part of this system to allow communication between system and owner. This system functions in real time as when the visitor’s arrived it will detect and recognizes his face and on the result of face recognition process it will open the door for authorized visitors or notifies and allows the owner’s to take further action in case of unauthorized visitor. The proposed system is developed and it is successfully ensuring security, managing records and operating gate without physical interaction of owner.

Keywords: SMS, e-mail, GSM modem, authenticate, face recognition, authorized

Procedia PDF Downloads 790
177 Low-Cost Reversible Logic Serial Multipliers with Error Detection Capability

Authors: Mojtaba Valinataj

Abstract:

Nowadays reversible logic has received many attentions as one of the new fields for reducing the power consumption. On the other hand, the processing systems have weaknesses against different external effects. In this paper, some error detecting reversible logic serial multipliers are proposed by incorporating the parity-preserving gates. This way, the new designs are presented for signed parity-preserving serial multipliers based on the Booth's algorithm by exploiting the new arrangements of existing gates. The experimental results show that the proposed 4×4 multipliers in this paper reach up to 20%, 35%, and 41% enhancements in the number of constant inputs, quantum cost, and gate count, respectively, as the reversible logic criteria, compared to previous designs. Furthermore, all the proposed designs have been generalized for n×n multipliers with general formulations to estimate the main reversible logic criteria as the functions of the multiplier size.

Keywords: Booth’s algorithm, error detection, multiplication, parity-preserving gates, quantum computers, reversible logic

Procedia PDF Downloads 229
176 Transient Enhanced LDO Voltage Regulator with Improved Feed Forward Path Compensation

Authors: A. Suresh, Sreehari Rao Patri, K. S. R. Krishnaprasad

Abstract:

An ultra low power capacitor less low-dropout voltage regulator with improved transient response using gain enhanced feed forward path compensation is presented in this paper. It is based on a cascade of a voltage amplifier and a transconductor stage in the feed forward path with regular error amplifier to form a composite gain-enhanced feed forward stage. It broadens the gain bandwidth and thus improves the transient response without substantial increase in power consumption. The proposed LDO, designed for a maximum output current of 100 mA in UMC 180 nm, requires a quiescent current of 69 µA. An undershoot of 153.79mV for a load current changes from 0mA to 100mA and an overshoot of 196.24mV for current change of 100mA to 0mA. The settling time is approximately 1.1 µs for the output voltage undershoot case. The load regulation is of 2.77 µV/mA at load current of 100mA. Reference voltage is generated by using an accurate band gap reference circuit of 0.8V.The costly features of SOC such as total chip area and power consumption is drastically reduced by the use of only a total compensation capacitance of 6pF while consuming power consumption of 0.096 mW.

Keywords: capacitor-less LDO, frequency compensation, transient response, latch, self-biased differential amplifier

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175 Thickness Dependence of AC Conductivity in Plasma Poly(Ethylene Oxide) Thin Films

Authors: S. Yakut, D. Deger, K. Ulutas, D. Bozoglu

Abstract:

Plasma poly(ethylene oxide) (pPEO) thin films were deposited between Aluminum (Al) electrodes on glass substrates by plasma assisted physical vapor deposition (PAPVD). The deposition was operated inside Argon plasma under 10⁻³ Torr and the thicknesses of samples were determined as 20, 100, 250, 500 nm. The plasma was produced at 5 W by magnetron connected to RF power supply. The capacitance C and dielectric loss factor tan δ were measured by Novovontrol Alpha-A high frequency empedance analyzer at freqquency and temperature intervals of 0,1 Hz and 1MHz, 193-353K, respectively. AC conductivity was derived from these values. AC conductivity results exhibited three different conductivity regions except for 20 nm. These regions can be classified as low, mid and high frequency regions. Low frequency region is observed at around 10 Hz and 300 K while mid frequency region is observed at around 1 kHz and 300 K. The last one, high frequency region, is observed at around 1 kHz and 200 K. There are some coinciding definitions for conduction regions, because these regions shift depending on temperature. Low frequency region behaves as DC-like conductivity while mid and high frequency regions show conductivities corresponding to mechanisms such as classical hopping, tunneling, etc. which are observed for amorphous materials. Unlike other thicknesses, for 20 nm sample low frequency region can not be detected in the investigated freuency range. It is thought that this is arised because of the presence of dead layer behavior.

Keywords: plasma polymers, dead layer, dielectric spectroscopy, AC conductivity

Procedia PDF Downloads 205
174 Environmental Potentials within the Production of Asphalt Mixtures

Authors: Florian Gschösser, Walter Purrer

Abstract:

The paper shows examples for the (environmental) optimization of production processes for asphalt mixtures applied for typical road pavements in Austria and Switzerland. The conducted “from-cradle-to-gate” LCA firstly analyzes the production one cubic meter of asphalt and secondly all material production processes for exemplary highway pavements applied in Austria and Switzerland. It is shown that environmental impacts can be reduced by the application of reclaimed asphalt pavement (RAP) and by the optimization of specific production characteristics, e.g. the reduction of the initial moisture of the mineral aggregate and the reduction of the mixing temperature by the application of low-viscosity and foam bitumen. The results of the LCA study demonstrate reduction potentials per cubic meter asphalt of up to 57 % (Global Warming Potential–GWP) and 77 % (Ozone depletion–ODP). The analysis per square meter of asphalt pavement determined environmental potentials of up to 40 % (GWP) and 56 % (ODP).

Keywords: asphalt mixtures, environmental potentials, life cycle assessment, material production

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173 Nitrogen Doping Effect on Enhancement of Electrochemical Performance of a Carbon Nanotube Based Microsupercapacitor

Authors: Behnoush Dousti, Ye Choi, Gil S. Lee

Abstract:

Microsupercapacitors (MScs) are known as the future of miniaturized energy sources that can be coupled to a battery to deliver stable and constant energy to microelectronics. Among all their counterparts, electrochemical microsupercapacitor have drawn the most research attention due to their higher power density and long cycle life. Designing the microstructure and choosing the electroactive materials are two significant factors that greatly affect the performance of the device. Here, we report successful fabrication and characterization of a microsupercapacitor with interdigitated structure based on Carbon nanotube sheets (CNT sheet). Novel structure of highly aligned CNT sheet as the electrode materials which also offers excellent conductivity and large surface area along with doping with nitrogen, enabled us to develop a device with serval order of magnitude higher electrochemical performance than the pristine CNT in aqueous electrolyte including high specific capacitance and rate capabilities and excellent cycle life over 10000 cycles. Geometric parameters such as finger width and gap size were also studied and it was shown the device performance is much depended on them. Results of this study confirms the potential of CNT sheet for future energy storage devices.

Keywords: carbon nanotube, energy storage systems, microsupercapacitor, nitrogen doping

Procedia PDF Downloads 133
172 Etude 3D Quantum Numerical Simulation of Performance in the HEMT

Authors: A. Boursali, A. Guen-Bouazza

Abstract:

We present a simulation of a HEMT (high electron mobility transistor) structure with and without a field plate. We extract the device characteristics through the analysis of DC, AC and high frequency regimes, as shown in this paper. This work demonstrates the optimal device with a gate length of 15 nm, InAlN/GaN heterostructure and field plate structure, making it superior to modern HEMTs when compared with otherwise equivalent devices. This improves the ability to bear the burden of the current density passes in the channel. We have demonstrated an excellent current density, as high as 2.05 A/m, a peak extrinsic transconductance of 0.59S/m at VDS=2 V, and cutting frequency cutoffs of 638 GHz in the first HEMT and 463 GHz for Field plate HEMT., maximum frequency of 1.7 THz, maximum efficiency of 73%, maximum breakdown voltage of 400 V, leakage current density IFuite=1 x 10-26 A, DIBL=33.52 mV/V and an ON/OFF current density ratio higher than 1 x 1010. These values were determined through the simulation by deriving genetic and Monte Carlo algorithms that optimize the design and the future of this technology.

Keywords: HEMT, silvaco, field plate, genetic algorithm, quantum

Procedia PDF Downloads 350
171 3D Quantum Simulation of a HEMT Device Performance

Authors: Z. Kourdi, B. Bouazza, M. Khaouani, A. Guen-Bouazza, Z. Djennati, A. Boursali

Abstract:

We present a simulation of a HEMT (high electron mobility transistor) structure with and without a field plate. We extract the device characteristics through the analysis of DC, AC and high frequency regimes, as shown in this paper. This work demonstrates the optimal device with a gate length of 15 nm, InAlN/GaN heterostructure and field plate structure, making it superior to modern HEMTs when compared with otherwise equivalent devices. This improves the ability to bear the burden of the current density passes in the channel. We have demonstrated an excellent current density, as high as 2.05 A/mm, a peak extrinsic transconductance of 590 mS/mm at VDS=2 V, and cutting frequency cutoffs of 638 GHz in the first HEMT and 463 GHz for Field plate HEMT., maximum frequency of 1.7 THz, maximum efficiency of 73%, maximum breakdown voltage of 400 V, DIBL=33.52 mV/V and an ON/OFF current density ratio higher than 1 x 1010. These values were determined through the simulation by deriving genetic and Monte Carlo algorithms that optimize the design and the future of this technology.

Keywords: HEMT, Silvaco, field plate, genetic algorithm, quantum

Procedia PDF Downloads 477
170 Preparation, Physical and Photoelectrochemical Characterization of Ag/CuCo₂O₄: Application to Solar Light Oxidation of Methyl Orange

Authors: Radia Bagtache, Karima Boudjedien, Ahmed Malek Djaballah, Mohamed Trari

Abstract:

The compounds with a spinel structure have received special attention because of their numerous applications in electronics, magnetism, catalysis, electrocatalysis, photocatalysis, etc. Among these oxides, CuCo₂O₄ was selected because of its optimal band gap, very close to the ideal value for solar devices, its low cost, and a potential candidate in the field of energy storage. Herein, we reported the junction Ag/CuCo₂O₄ (5/95 % wt.) prepared by co-precipitation, characterized physically and photo electrochemically. Moreover, its performance was evaluated for the oxidation of methyl orange (MO) under solar light. The X-ray diffraction exhibited narrow peaks ascribed to the spinel CuCo₂O₄ and Ag. The SEM analysis displayed grains with regular shapes. The band gap of CuCo₂O₄ (1.38 eV) was deducted from the diffuse reflectance, and this value decreased down to 1.15 eV due to the synergy effect in the junction. The current-potential (J-E) curve plotted in Na₂SO₄ electrolyte showed a medium hysteresis, characteristic of good chemical stability. The capacitance-2 – potential (C⁻² – E) graph displayed that the spinel behaves as a p-type semiconductor, a property supported by chrono-amperometry. The conduction band, located at 4.05 eV (-0.94 VNHE), was made up of Co³⁺: 3d orbital. The result showed a total discoloration of MO after 2 h of illumination under solar light.

Keywords: junction Ag/CuCo₂O₄, semiconductor, environment, sunlight, characterization, depollution

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169 The Journey of a Malicious HTTP Request

Authors: M. Mansouri, P. Jaklitsch, E. Teiniker

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SQL injection on web applications is a very popular kind of attack. There are mechanisms such as intrusion detection systems in order to detect this attack. These strategies often rely on techniques implemented at high layers of the application but do not consider the low level of system calls. The problem of only considering the high level perspective is that an attacker can circumvent the detection tools using certain techniques such as URL encoding. One technique currently used for detecting low-level attacks on privileged processes is the tracing of system calls. System calls act as a single gate to the Operating System (OS) kernel; they allow catching the critical data at an appropriate level of detail. Our basic assumption is that any type of application, be it a system service, utility program or Web application, “speaks” the language of system calls when having a conversation with the OS kernel. At this level we can see the actual attack while it is happening. We conduct an experiment in order to demonstrate the suitability of system call analysis for detecting SQL injection. We are able to detect the attack. Therefore we conclude that system calls are not only powerful in detecting low-level attacks but that they also enable us to detect high-level attacks such as SQL injection.

Keywords: Linux system calls, web attack detection, interception, SQL

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168 Numerical Resolving of Net Faradaic Current in Fast-Scan Cyclic Voltammetry Considering Induced Charging Currents

Authors: Gabriel Wosiak, Dyovani Coelho, Evaldo B. Carneiro-Neto, Ernesto C. Pereira, Mauro C. Lopes

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In this work, the theoretical and experimental effects of induced charging currents on fast-scan cyclic voltammetry (FSCV) are investigated. Induced charging currents arise from the effect of ohmic drop in electrochemical systems, which depends on the presence of an uncompensated resistance. They cause the capacitive contribution to the total current to be different from the capacitive current measured in the absence of electroactive species. The paper shows that the induced charging current is relevant when the capacitive current magnitude is close to the total current, even for systems with low time constant. In these situations, the conventional background subtraction method may be inaccurate. A method is developed that separates the faradaic and capacitive currents by using a combination of voltametric experimental data and finite element simulation, by the obtention of a potential-dependent capacitance. The method was tested in a standard electrochemical cell with Platinum ultramicroelectrodes, in different experimental conditions as well in previously reported data in literature. The proposed method allows the real capacitive current to be separated even in situations where the conventional background subtraction method is clearly inappropriate.

Keywords: capacitive current, fast-scan cyclic voltammetry, finite-element method, electroanalysis

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167 Developing Biocompatible Iridium Oxide Electrodes for Bone-Guided Extra-Cochlear Implant

Authors: Yung-Shan Lu, Chia-Fone Lee, Shang-Hsuan Li, Chien-Hao Liu

Abstract:

Recently, various bioelectronic devices have been developed for neurologic disease treatments via electro-stimulations such as cochlear implants and retinal prosthesis. Since the electric signal needs electrodes to be transmitted to an organism, electrodes play an important role of stimulations. The materials of stimulation electrodes affect the efficiency of the delivered currents. The higher the efficiency of the electrodes, the lower the threshold current can be used to stimulate the organism which minimizes the potential damages to the adjacent tissues. In this study, we proposed a biocompatible composite electrode composed of high-charge-capacity iridium oxide (IrOₓ) film for a bone-guide extra-cochlear implant. IrOₓ was exploited to decrease the threshold current due to its high capacitance and low impedance. The IrOₓ electrode was fabricated via microelectromechanical systems (MEMS) photolithography and examined with in-vivo tests with guinea pigs. Based on the measured responses of brain waves to sound, the results demonstrated that IrOₓ electrodes have a lower threshold current compared with the Platinum (Pt) electrodes. The research results are expected to be beneficial for implantable and biocompatible electrodes for electrical stimulations.

Keywords: cochlear implants, electrode, electrical stimulation, iridium oxide

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166 Mesoporous Carbon Sphere/Nickel Cobalt Sulfide Core-Shell Microspheres for Supercapacitor Electrode Material

Authors: Charmaine Lamiel, Van Hoa Nguyen, Marjorie Baynosa, Jae-Jin Shim

Abstract:

The depletion of non-renewable sources had led to the continuous development of various energy storage systems in order to cope with the world’s demand in energy. Supercapacitors have attracted considerable attention because they can store more energy than conventional capacitors and have higher power density than batteries. The combination of carbon-based material and metal chalcogenides are now being considered in response to the search for active electrode materials exhibiting high electrochemical performance. In this study, a hierarchical mesoporous carbon sphere@nickel cobalt sulfide (CS@Ni-Co-S) core-shell was synthesized using a simple hydrothermal method. The CS@Ni-Co-S core-shell microstructures exhibited a high capacitance of 724.4 F g−1 at 2 A g−1 in a 6 M KOH electrolyte. Good specific retention of 86.1% and high Coulombic efficiency of 97.9% was obtained after 2000 charge-discharge cycles. The electrode exhibited a high energy density of 58.0 Wh kg−1 (1440 W kg−1) and high power density of 7200 W kg−1 (34.2 Wh kg−1). The reaction involved green synthesis without further sulfurization or post-heat treatment. Through this study, a cost-effective and facile synthesis of CS@Ni-Co-S as an active electrode showed favorable electrochemical performance.

Keywords: carbon sphere, electrochemical, hydrothermal, nickel cobalt sulfide, supercapacitor

Procedia PDF Downloads 236
165 Performance Evaluation of Different Technologies of PV Modules in Algeria

Authors: Amira Balaska, Ali Tahri, Amine Boudghene Stambouli, Takashi Oozeki

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This paper is dealing with the evaluation of photovoltaic modules as part of the Sahara Solar Breeder project (SSB), five different photovoltaic module technologies which are: m-si, CIS, HIT, Back Contact, a-si_μc -si and a weather station recently installed at the University of Saida (Tahar Moulay) in Saida city located at the gate of the great southern Algeria’s Sahara. The objective of the present work is the study of solar photovoltaic capacity and performance parameters of each PV module technology. The goal of the study is to compare the five different PV technologies in order to find which technologies are suitable for the climate conditions of Algeria’s desert. Measurements of various parameters as irradiance, temperature, humidity and so on by the weather station and I-V curves were performed outdoors at the location without shadow. Finally performance parameters as performance ratio, energy yield and temperature losses are given and analyzed.

Keywords: photovoltaic modules, performance ratio, energy yield, sahara solar breeder, outdoor conditions

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164 Thermal Reduction of Perfect Well Identified Hexagonal Graphene Oxide Nano-Sheets for Super-Capacitor Applications

Authors: A. N. Fouda

Abstract:

A novel well identified hexagonal graphene oxide (GO) nano-sheets were synthesized using modified Hummer method. Low temperature thermal reduction at 350°C in air ambient was performed. After thermal reduction, typical few layers of thermal reduced GO (TRGO) with dimension of few hundreds nanometers were observed using high resolution transmission electron microscopy (HRTEM). GO has a lot of structure models due to variation of the preparation process. Determining the atomic structure of GO is essential for a better understanding of its fundamental properties and for realization of the future technological applications. Structural characterization was identified by x-ray diffraction (XRD), Fourier transform infra-red spectroscopy (FTIR) measurements. A comparison between exper- imental and theoretical IR spectrum were done to confirm the match between experimentally and theoretically proposed GO structure. Partial overlap of the experimental IR spectrum with the theoretical IR was confirmed. The electrochemical properties of TRGO nano-sheets as electrode materials for supercapacitors were investigated by cyclic voltammetry and electrochemical impedance spectroscopy (EIS) measurements. An enhancement in supercapacitance after reduction was confirmed and the area of the CV curve for the TRGO electrode is larger than those for the GO electrode indicating higher specific capacitance which is promising in super-capacitor applications

Keywords: hexagonal graphene oxide, thermal reduction, cyclic voltammetry

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163 FPGA Implementation of Novel Triangular Systolic Array Based Architecture for Determining the Eigenvalues of Matrix

Authors: Soumitr Sanjay Dubey, Shubhajit Roy Chowdhury, Rahul Shrestha

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In this paper, we have presented a novel approach of calculating eigenvalues of any matrix for the first time on Field Programmable Gate Array (FPGA) using Triangular Systolic Arra (TSA) architecture. Conventionally, additional computation unit is required in the architecture which is compliant to the algorithm for determining the eigenvalues and this in return enhances the delay and power consumption. However, recently reported works are only dedicated for symmetric matrices or some specific case of matrix. This works presents an architecture to calculate eigenvalues of any matrix based on QR algorithm which is fully implementable on FPGA. For the implementation of QR algorithm we have used TSA architecture, which is further utilising CORDIC (CO-ordinate Rotation DIgital Computer) algorithm, to calculate various trigonometric and arithmetic functions involved in the procedure. The proposed architecture gives an error in the range of 10−4. Power consumption by the design is 0.598W. It can work at the frequency of 900 MHz.

Keywords: coordinate rotation digital computer, three angle complex rotation, triangular systolic array, QR algorithm

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162 Signal Integrity Performance Analysis in Capacitive and Inductively Coupled Very Large Scale Integration Interconnect Models

Authors: Mudavath Raju, Bhaskar Gugulothu, B. Rajendra Naik

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The rapid advances in Very Large Scale Integration (VLSI) technology has resulted in the reduction of minimum feature size to sub-quarter microns and switching time in tens of picoseconds or even less. As a result, the degradation of high-speed digital circuits due to signal integrity issues such as coupling effects, clock feedthrough, crosstalk noise and delay uncertainty noise. Crosstalk noise in VLSI interconnects is a major concern and reduction in VLSI interconnect has become more important for high-speed digital circuits. It is the most effectively considered in Deep Sub Micron (DSM) and Ultra Deep Sub Micron (UDSM) technology. Increasing spacing in-between aggressor and victim line is one of the technique to reduce the crosstalk. Guard trace or shield insertion in-between aggressor and victim is also one of the prominent options for the minimization of crosstalk. In this paper, far end crosstalk noise is estimated with mutual inductance and capacitance RLC interconnect model. Also investigated the extent of crosstalk in capacitive and inductively coupled interconnects to minimizes the same through shield insertion technique.

Keywords: VLSI, interconnects, signal integrity, crosstalk, shield insertion, guard trace, deep sub micron

Procedia PDF Downloads 187
161 Voltage and Current Control of Microgrid in Grid Connected and Islanded Modes

Authors: Megha Chavda, Parth Thummar, Rahul Ghetia

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This paper presents the voltage and current control of microgrid accompanied by the synchronization of microgrid with the main utility grid in both islanded and grid-connected modes. Distributed Energy Resources (DERs) satisfy the wide-spread power demand of consumer by behaving as a micro source for a low voltage (LV) grid or microgrid. Synchronization of the microgrid with the main utility grid is done using PLL and PWM gate pulse generation technique is used for the Voltage Source Converter. Potential Function method achieves the voltage and current control of this microgrid in both islanded and grid-connected modes. A low voltage grid consisting of three distributed generators (DG) is considered for the study and is simulated in time-domain using PSCAD/EMTDC software. The simulation results depict the appropriateness of voltage and current control of microgrid and synchronization of microgrid with the medium voltage (MV) grid.

Keywords: microgrid, distributed energy resources, voltage and current control, voltage source converter, pulse width modulation, phase locked loop

Procedia PDF Downloads 414
160 Energy Dynamics of Solar Thermionic Power Conversion with Emitter of Graphene

Authors: Olukunle C. Olawole, Dilip K. De, Moses Emetere, Omoje Maxwell

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Graphene can stand very high temperature up to 4500 K in vacuum and has potential for application in thermionic energy converter. In this paper, we discuss the application of energy dynamics principles and the modified Richardson-Dushman Equation, to estimate the efficiency of solar power conversion to electrical power by a solar thermionic energy converter (STEC) containing emitter made of graphene. We present detailed simulation of power output for different solar insolation, diameter of parabolic concentrator, area of the graphene emitter (same as that of the collector), temperature of the collector, physical dimensions of the emitter-collector etc. After discussing possible methods of reduction or elimination of space charge problem using magnetic field and gate, we finally discuss relative advantages of using emitters made of graphene, carbon nanotube and metals respectively in a STEC.

Keywords: graphene, high temperature, modified Richardson-Dushman equation, solar thermionic energy converter

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159 Performance Analysis of Arithmetic Units for IoT Applications

Authors: Nithiya C., Komathi B. J., Praveena N. G., Samuda Prathima

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At present, the ultimate aim in digital system designs, especially at the gate level and lower levels of design abstraction, is power optimization. Adders are a nearly universal component of today's integrated circuits. Most of the research was on the design of high-speed adders to execute addition based on various adder structures. This paper discusses the ideal path for selecting an arithmetic unit for IoT applications. Based on the analysis of eight types of 16-bit adders, we found out Carry Look-ahead (CLA) produces low power. Additionally, multiplier and accumulator (MAC) unit is implemented with the Booth multiplier by using the low power adders in the order of preference. The design is synthesized and verified using Synopsys Design Compiler and VCS. Then it is implemented by using Cadence Encounter. The total power consumed by the CLA based booth multiplier is 0.03527mW, the total area occupied is 11260 um², and the speed is 2034 ps.

Keywords: carry look-ahead, carry select adder, CSA, internet of things, ripple carry adder, design rule check, power delay product, multiplier and accumulator

Procedia PDF Downloads 118
158 Economic Loss due to Ganoderma Disease in Oil Palm

Authors: K. Assis, K. P. Chong, A. S. Idris, C. M. Ho

Abstract:

Oil palm or Elaeis guineensis is considered as the golden crop in Malaysia. But oil palm industry in this country is now facing with the most devastating disease called as Ganoderma Basal Stem Rot disease. The objective of this paper is to analyze the economic loss due to this disease. There were three commercial oil palm sites selected for collecting the required data for economic analysis. Yield parameter used to measure the loss was the total weight of fresh fruit bunch in six months. The predictors include disease severity, change in disease severity, number of infected neighbor palms, age of palm, planting generation, topography, and first order interaction variables. The estimation model of yield loss was identified by using backward elimination based regression method. Diagnostic checking was conducted on the residual of the best yield loss model. The value of mean absolute percentage error (MAPE) was used to measure the forecast performance of the model. The best yield loss model was then used to estimate the economic loss by using the current monthly price of fresh fruit bunch at mill gate.

Keywords: ganoderma, oil palm, regression model, yield loss, economic loss

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157 3 Phase Induction Motor Control Using Single Phase Input and GSM

Authors: Pooja S. Billade, Sanjay S. Chopade

Abstract:

This paper focuses on the design of three phase induction motor control using single phase input and GSM.The controller used in this work is a wireless speed control using a GSM technique that proves to be very efficient and reliable in applications.The most common principle is the constant V/Hz principle which requires that the magnitude and frequency of the voltage applied to the stator of a motor maintain a constant ratio. By doing this, the magnitude of the magnetic field in the stator is kept at an approximately constant level throughout the operating range. Thus, maximum constant torque producing capability is maintained. The energy that a switching power converter delivers to a motor is controlled by Pulse Width Modulated signals applied to the gates of the power transistors in H-bridge configuration. PWM signals are pulse trains with fixed frequency and magnitude and variable pulse width. When a PWM signal is applied to the gate of a power transistor, it causes the turn on and turns off intervals of the transistor to change from one PWM period.

Keywords: index terms— PIC, GSM (global system for mobile), LCD (Liquid Crystal Display), IM (Induction Motor)

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156 Investigation of Maritime Accidents with Exploratory Data Analysis in the Strait of Çanakkale (Dardanelles)

Authors: Gizem Kodak

Abstract:

The Strait of Çanakkale, together with the Strait of Istanbul and the Sea of Marmara, form the Turkish Straits System. In other words, the Strait of Çanakkale is the southern gate of the system that connects the Black Sea countries with the other countries of the world. Due to the heavy maritime traffic, it is important to scientifically examine the accident characteristics in the region. In particular, the results indicated by the descriptive statistics are of critical importance in order to strengthen the safety of navigation. At this point, exploratory data analysis offers strategic outputs in terms of defining the problem and knowing the strengths and weaknesses against possible accident risk. The study aims to determine the accident characteristics in the Strait of Çanakkale with temporal and spatial analysis of historical data, using Exploratory Data Analysis (EDA) as the research method. The study's results will reveal the general characteristics of maritime accidents in the region and form the infrastructure for future studies. Therefore, the text provides a clear description of the research goals and methodology, and the study's contributions are well-defined.

Keywords: maritime accidents, EDA, Strait of Çanakkale, navigational safety

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155 Nanostructured Transition Metal Oxides Doped Graphene for High Performance Solid-State Supercapacitor Electrodes

Authors: G. Nyongombe, Guy L. Kabongo, B. M. Mothudi, M. S. Dhlamini

Abstract:

A series of Transition Metals Oxides (TMOs) doped graphene were synthesized and successfully used as supercapacitor electrode materials. The as-synthesized materials exhibited exceptional electrochemical properties owing to the combined properties of its constituents; high surface area and good conductivity were achieved. Several analytical characterization techniques were employed to investigate the morphology, crystal structure atomic arrangement and elemental chemical state in the materials for which scanning electron microscopy (SEM), X-ray diffraction (XRD) and X-ray photoelectron spectroscopy (XPS) were conducted, respectively. Moreover, the electrochemical properties of the as-synthesized materials were examined by performing cyclic voltammetry (CV), galvanostatic charge-discharge (GCD) and electrochemical impedance spectroscopy (EIS) measurements. Furthermore, the effect of doping concentration on the interlayer distance of the graphene materials and the charge transfer resistance are investigated and correlated to the exceptional current density which was multiplied by a factor of ~80 after TMOs doping in graphene. Finally, the resulting high capacitance obtained confirms the contribution of grapheme exceptional electronic conductivity and large surface area on the electrode materials. Such good-performing electrode materials are highly promising for supercapacitors and other energy storage devices.

Keywords: energy density, graphene, supercapacitors, TMOs

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154 Approximate-Based Estimation of Single Event Upset Effect on Statistic Random-Access Memory-Based Field-Programmable Gate Arrays

Authors: Mahsa Mousavi, Hamid Reza Pourshaghaghi, Mohammad Tahghighi, Henk Corporaal

Abstract:

Recently, Statistic Random-Access Memory-based (SRAM-based) Field-Programmable Gate Arrays (FPGAs) are widely used in aeronautics and space systems where high dependability is demanded and considered as a mandatory requirement. Since design’s circuit is stored in configuration memory in SRAM-based FPGAs; they are very sensitive to Single Event Upsets (SEUs). In addition, the adverse effects of SEUs on the electronics used in space are much higher than in the Earth. Thus, developing fault tolerant techniques play crucial roles for the use of SRAM-based FPGAs in space. However, fault tolerance techniques introduce additional penalties in system parameters, e.g., area, power, performance and design time. In this paper, an accurate estimation of configuration memory vulnerability to SEUs is proposed for approximate-tolerant applications. This vulnerability estimation is highly required for compromising between the overhead introduced by fault tolerance techniques and system robustness. In this paper, we study applications in which the exact final output value is not necessarily always a concern meaning that some of the SEU-induced changes in output values are negligible. We therefore define and propose Approximate-based Configuration Memory Vulnerability Factor (ACMVF) estimation to avoid overestimating configuration memory vulnerability to SEUs. In this paper, we assess the vulnerability of configuration memory by injecting SEUs in configuration memory bits and comparing the output values of a given circuit in presence of SEUs with expected correct output. In spite of conventional vulnerability factor calculation methods, which accounts any deviations from the expected value as failures, in our proposed method a threshold margin is considered depending on user-case applications. Given the proposed threshold margin in our model, a failure occurs only when the difference between the erroneous output value and the expected output value is more than this margin. The ACMVF is subsequently calculated by acquiring the ratio of failures with respect to the total number of SEU injections. In our paper, a test-bench for emulating SEUs and calculating ACMVF is implemented on Zynq-7000 FPGA platform. This system makes use of the Single Event Mitigation (SEM) IP core to inject SEUs into configuration memory bits of the target design implemented in Zynq-7000 FPGA. Experimental results for 32-bit adder show that, when 1% to 10% deviation from correct output is considered, the counted failures number is reduced 41% to 59% compared with the failures number counted by conventional vulnerability factor calculation. It means that estimation accuracy of the configuration memory vulnerability to SEUs is improved up to 58% in the case that 10% deviation is acceptable in output results. Note that less than 10% deviation in addition result is reasonably tolerable for many applications in approximate computing domain such as Convolutional Neural Network (CNN).

Keywords: fault tolerance, FPGA, single event upset, approximate computing

Procedia PDF Downloads 199