Search results for: hardware accelerator unit
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 2802

Search results for: hardware accelerator unit

2742 A Comprehensive Approach to Mitigate Return-Oriented Programming Attacks: Combining Operating System Protection Mechanisms and Hardware-Assisted Techniques

Authors: Zhang Xingnan, Huang Jingjia, Feng Yue, Burra Venkata Durga Kumar

Abstract:

This paper proposes a comprehensive approach to mitigate ROP (Return-Oriented Programming) attacks by combining internal operating system protection mechanisms and hardware-assisted techniques. Through extensive literature review, we identify the effectiveness of ASLR (Address Space Layout Randomization) and LBR (Last Branch Record) in preventing ROP attacks. We present a process involving buffer overflow detection, hardware-assisted ROP attack detection, and the use of Turing detection technology to monitor control flow behavior. We envision a specialized tool that views and analyzes the last branch record, compares control flow with a baseline, and outputs differences in natural language. This tool offers a graphical interface, facilitating the prevention and detection of ROP attacks. The proposed approach and tool provide practical solutions for enhancing software security.

Keywords: operating system, ROP attacks, returning-oriented programming attacks, ASLR, LBR, CFI, DEP, code randomization, hardware-assisted CFI

Procedia PDF Downloads 94
2741 Functional Instruction Set Simulator (ISS) of a Neural Network (NN) IP with Native BF-16 Generator

Authors: Debajyoti Mukherjee, Arathy B. S., Arpita Sahu, Saranga P. Pogula

Abstract:

A Functional Model to mimic the functional correctness of a Neural Network Compute Accelerator IP is very crucial for design validation. Neural network workloads are based on a Brain Floating Point (BF-16) data type. The major challenge we were facing was the incompatibility of gcc compilers to BF-16 datatype, which we addressed with a native BF-16 generator integrated to our functional model. Moreover, working with big GEMM (General Matrix Multiplication) or SpMM (Sparse Matrix Multiplication) Work Loads (Dense or Sparse) and debugging the failures related to data integrity is highly painstaking. In this paper, we are addressing the quality challenge of such a complex Neural Network Accelerator design by proposing a Functional Model-based scoreboard or Software model using SystemC. The proposed Functional Model executes the assembly code based on the ISA of the processor IP, decodes all instructions, and executes as expected to be done by the DUT. The said model would give a lot of visibility and debug capability in the DUT bringing up micro-steps of execution.

Keywords: ISA (instruction set architecture), NN (neural network), TLM (transaction-level modeling), GEMM (general matrix multiplication)

Procedia PDF Downloads 84
2740 Daylight Performance of a Single Unit in Distinct Arrangements

Authors: Rifat Tabassoom

Abstract:

Recently multistoried housing projects are accelerating in the capital of Bangladesh- Dhaka, to house its massive population. Insufficient background research leads to a building design trend where a single unit is designed and then multiplied all through the buildings. Therefore, although having identical designs, all the units cannot perform evenly considering daylight, which also alters their household activities. This paper aims to understand if a single unit can be an optimum solution regarding daylight for a selected housing project.

Keywords: daylight, orientation, performance, simulations

Procedia PDF Downloads 121
2739 Health and Safety Practices of Midsayapenos in Relation to The Governance of the Local Government Unit of Midsayap in Responding to the COVID-19 Pandemic

Authors: Jolai R. Garca, Sergio Mahinay Jr., Fathma Dubpaleg, Rhea Jaberina, Jovanne Mabit II

Abstract:

The COVID-19 pandemic has still been going on for almost two years now, but because of the health and safety practices of the citizens, together with the action of the Local Government Unit, it has slowly dissipated. This study investigated the relationship between the health and safety protocols as well as the status of governance of the Local Government Unit of Midsayap using the evidence-based key indicators of Good Governance aggregated from the Organisation for Economic Co-operation and Development (OECD). A quantitative research design was employed to determine the relationship of the variables under study. Findings showed that the residents of Midsayap often practice the necessary health and safety measures against COVID-19 and that the Local Government Unit of Midsayap is effective in responding to the pandemic.

Keywords: governance, health and safety practices, covid-19, local government unit

Procedia PDF Downloads 174
2738 Comparison of Two Maintenance Policies for a Two-Unit Series System Considering General Repair

Authors: Seyedvahid Najafi, Viliam Makis

Abstract:

In recent years, maintenance optimization has attracted special attention due to the growth of industrial systems complexity. Maintenance costs are high for many systems, and preventive maintenance is effective when it increases operations' reliability and safety at a reduced cost. The novelty of this research is to consider general repair in the modeling of multi-unit series systems and solve the maintenance problem for such systems using the semi-Markov decision process (SMDP) framework. We propose an opportunistic maintenance policy for a series system composed of two main units. Unit 1, which is more expensive than unit 2, is subjected to condition monitoring, and its deterioration is modeled using a gamma process. Unit 1 hazard rate is estimated by the proportional hazards model (PHM), and two hazard rate control limits are considered as the thresholds of maintenance interventions for unit 1. Maintenance is performed on unit 2, considering an age control limit. The objective is to find the optimal control limits and minimize the long-run expected average cost per unit time. The proposed algorithm is applied to a numerical example to compare the effectiveness of the proposed policy (policy Ⅰ) with policy Ⅱ, which is similar to policy Ⅰ, but instead of general repair, replacement is performed. Results show that policy Ⅰ leads to lower average cost compared with policy Ⅱ. 

Keywords: condition-based maintenance, proportional hazards model, semi-Markov decision process, two-unit series systems

Procedia PDF Downloads 122
2737 Optoelectronic Hardware Architecture for Recurrent Learning Algorithm in Image Processing

Authors: Abdullah Bal, Sevdenur Bal

Abstract:

This paper purposes a new type of hardware application for training of cellular neural networks (CNN) using optical joint transform correlation (JTC) architecture for image feature extraction. CNNs require much more computation during the training stage compare to test process. Since optoelectronic hardware applications offer possibility of parallel high speed processing capability for 2D data processing applications, CNN training algorithm can be realized using Fourier optics technique. JTC employs lens and CCD cameras with laser beam that realize 2D matrix multiplication and summation in the light speed. Therefore, in the each iteration of training, JTC carries more computation burden inherently and the rest of mathematical computation realized digitally. The bipolar data is encoded by phase and summation of correlation operations is realized using multi-object input joint images. Overlapping properties of JTC are then utilized for summation of two cross-correlations which provide less computation possibility for training stage. Phase-only JTC does not require data rearrangement, electronic pre-calculation and strict system alignment. The proposed system can be incorporated simultaneously with various optical image processing or optical pattern recognition techniques just in the same optical system.

Keywords: CNN training, image processing, joint transform correlation, optoelectronic hardware

Procedia PDF Downloads 506
2736 Quality Assurances for an On-Board Imaging System of a Linear Accelerator: Five Months Data Analysis

Authors: Liyun Chang, Cheng-Hsiang Tsai

Abstract:

To ensure the radiation precisely delivering to the target of cancer patients, the linear accelerator equipped with the pretreatment on-board imaging system is introduced and through it the patient setup is verified before the daily treatment. New generation radiotherapy using beam-intensity modulation, usually associated the treatment with steep dose gradients, claimed to have achieved both a higher degree of dose conformation in the targets and a further reduction of toxicity in normal tissues. However, this benefit is counterproductive if the beam is delivered imprecisely. To avoid shooting critical organs or normal tissues rather than the target, it is very important to carry out the quality assurance (QA) of this on-board imaging system. The QA of the On-Board Imager® (OBI) system of one Varian Clinac-iX linear accelerator was performed through our procedures modified from a relevant report and AAPM TG142. Two image modalities, 2D radiography and 3D cone-beam computed tomography (CBCT), of the OBI system were examined. The daily and monthly QA was executed for five months in the categories of safety, geometrical accuracy and image quality. A marker phantom and a blade calibration plate were used for the QA of geometrical accuracy, while the Leeds phantom and Catphan 504 phantom were used in the QA of radiographic and CBCT image quality, respectively. The reference images were generated through a GE LightSpeed CT simulator with an ADAC Pinnacle treatment planning system. Finally, the image quality was analyzed via an OsiriX medical imaging system. For the geometrical accuracy test, the average deviations of the OBI isocenter in each direction are less than 0.6 mm with uncertainties less than 0.2 mm, while all the other items have the displacements less than 1 mm. For radiographic image quality, the spatial resolution is 1.6 lp/cm with contrasts less than 2.2%. The spatial resolution, low contrast, and HU homogenous of CBCT are larger than 6 lp/cm, less than 1% and within 20 HU, respectively. All tests are within the criteria, except the HU value of Teflon measured with the full fan mode exceeding the suggested value that could be due to itself high HU value and needed to be rechecked. The OBI system in our facility was then demonstrated to be reliable with stable image quality. The QA of OBI system is really necessary to achieve the best treatment for a patient.

Keywords: CBCT, image quality, quality assurance, OBI

Procedia PDF Downloads 297
2735 Causal Relationship between Macro-Economic Indicators and Fund Unit Price Behaviour: Evidence from Malaysian Equity Unit Trust Fund Industry

Authors: Anwar Hasan Abdullah Othman, Ahamed Kameel, Hasanuddeen Abdul Aziz

Abstract:

In this study, an attempt has been made to investigate the relationship specifically the causal relation between fund unit prices of Islamic equity unit trust fund which measure by fund NAV and the selected macro-economic variables of Malaysian economy by using VECM causality test and Granger causality test. Monthly data has been used from Jan, 2006 to Dec, 2012 for all the variables. The findings of the study showed that industrial production index, political election and financial crisis are the only variables having unidirectional causal relationship with fund unit price. However, the global oil prices is having bidirectional causality with fund NAV. Thus, it is concluded that the equity unit trust fund industry in Malaysia is an inefficient market with respect to the industrial production index, global oil prices, political election and financial crisis. However, the market is approaching towards informational efficiency at least with respect to four macroeconomic variables, treasury bill rate, money supply, foreign exchange rate and corruption index.

Keywords: fund unit price, unit trust industry, Malaysia, macroeconomic variables, causality

Procedia PDF Downloads 468
2734 On Boundary Values of Hardy Space Banach Space-Valued Functions

Authors: Irina Peterburgsky

Abstract:

Let T be a unit circumference of a complex plane, E be a Banach space, E* and E** be its conjugate and second conjugate, respectively. In general, a Hardy space Hp(E), p ≥1, where functions act from the open unit disk to E, could contain a function for which even weak nontangential (angular) boundary value in the space E** does not exist at any point of the unit circumference T (C. Grossetete.) The situation is "better" when certain restrictions to the Banach space of values are applied (more or less resembling a classical case of scalar-valued functions depending on constrains, as shown by R. Ryan.) This paper shows that, nevertheless, in the case of a Banach space of a general type, the following positive statement is true: Proposition. For any function f(z) from Hp(E), p ≥ 1, there exists a function F(eiθ) on the unit circumference T to E** whose Poisson (in the Pettis sense) is integral regains the function f(z) on the open unit disk. Some characteristics of the function F(eiθ) are demonstrated.

Keywords: hardy spaces, Banach space-valued function, boundary values, Pettis integral

Procedia PDF Downloads 246
2733 Furnishing The Envelope; 3D Printed Construction Unit as Furniture

Authors: Maryam Kalkatechi

Abstract:

The paper presents the construction unit that was proposed as a result of researching and finding solutions for challenges of the traditional masonry unit. The concept of ‘unit as arrangements of cells’ was investigated in four categories of structure, handling and assembly, thermal characteristics and weather ability which resulted in construction unit as an independent system which shapes a part of the envelope. Comparing to the traditional wall systems in which the system is in layers, the part system is a monolithic piece by itself. Even though the overall wythe-10 inches- is less than the combined layers-14 inches- in a traditional wall system, it is still seen as a spatial component. The component as a furnishing of envelope is discussed from material application point of view. The algorithm definition of the arrangement cells crafts the relationship between cells and functionality with material. This craft is realized as the envelope furnishing. Three alternative materials in relation to furnishing the envelope are discussed for printing the construction unit; transparent plastic, opaque plastic and glass. The qualities vary in the four categories, however this paper focuses on the visual qualities of materials applied. In a diagram the qualities of the materials are compared in relation to each other.

Keywords: furnishing envelope, 3D printed construction unit, opaque plastic, transparent plastic, glass

Procedia PDF Downloads 177
2732 Integrated Teaching of Hardware Courses for the Undergraduates of Computer Science and Engineering to Attain Focused Outcomes

Authors: Namrata D. Hiremath, Mahalaxmi Bhille, P. G. Sunitha Hiremath

Abstract:

Computer systems play an integral role in all facets of the engineering profession. This calls for an understanding of the processor-level components of computer systems, their design and operation, and their impact on the overall performance of the systems. Systems users are always in need of faster, more powerful, yet cheaper computer systems. The focus of Computer Science engineering graduates is inclined towards software oriented base. To be an efficient programmer there is a need to understand the role of hardware architecture towards the same. It is essential for the students of Computer Science and Engineering to know the basic building blocks of any computing device and how the digital principles can be used to build them. Hence two courses Digital Electronics of 3 credits, which is associated with lab of 1.5 credits and Computer Organization of 5 credits, were introduced at the sophomore level. Activity was introduced with the objective to teach the hardware concepts to the students of Computer science engineering through structured lab. The students were asked to design and implement a component of a computing device using MultiSim simulation tool and build the same using hardware components. The experience of the activity helped the students to understand the real time applications of the SSI and MSI components. The impact of the activity was evaluated and the performance was measured. The paper explains the achievement of the ABET outcomes a, c and k.

Keywords: digital, computer organization, ABET, structured enquiry, course activity

Procedia PDF Downloads 497
2731 Uncertainty Analysis of a Hardware in Loop Setup for Testing Products Related to Building Technology

Authors: Balasundaram Prasaant, Ploix Stephane, Delinchant Benoit, Muresan Cristian

Abstract:

Hardware in Loop (HIL) testing is done to test and validate a particular product especially in building technology. When it comes to building technology, it is more important to test the products for their efficiency. The test rig in the HIL simulator may contribute to some uncertainties on measured efficiency. The uncertainties include physical uncertainties and scenario-based uncertainties. In this paper, a simple uncertainty analysis framework for an HIL setup is shown considering only the physical uncertainties. The entire modeling of the HIL setup is done in Dymola. The uncertain sources are considered based on available knowledge of the components and also on expert knowledge. For the propagation of uncertainty, Monte Carlo Simulation is used since it is the most reliable and easy to use. In this article it is shown how an HIL setup can be modeled and how uncertainty propagation can be performed on it. Such an approach is not common in building energy analysis.

Keywords: energy in buildings, hardware in loop testing, modelica modelling, Monte Carlo simulation, uncertainty propagation

Procedia PDF Downloads 135
2730 Ta-DAH: Task Driven Automated Hardware Design of Free-Flying Space Robots

Authors: Lucy Jackson, Celyn Walters, Steve Eckersley, Mini Rai, Simon Hadfield

Abstract:

Space robots will play an integral part in exploring the universe and beyond. A correctly designed space robot will facilitate OOA, satellite servicing and ADR. However, problems arise when trying to design such a system as it is a highly complex multidimensional problem into which there is little research. Current design techniques are slow and specific to terrestrial manipulators. This paper presents a solution to the slow speed of robotic hardware design, and generalizes the technique to free-flying space robots. It presents Ta-DAH Design, an automated design approach that utilises a multi-objective cost function in an iterative and automated pipeline. The design approach leverages prior knowledge and facilitates the faster output of optimal designs. The result is a system that can optimise the size of the base spacecraft, manipulator and some key subsystems for any given task. Presented in this work is the methodology behind Ta-DAH Design and a number optimal space robot designs.

Keywords: space robots, automated design, on-orbit operations, hardware design

Procedia PDF Downloads 70
2729 Hardware in the Loop Platform for Virtual Commissioning: Case Study of a Hydraulic-Press Model Simulated in Real-Time

Authors: Jorge Rodriguez-Guerra, Carlos Calleja, Aron Pujana, Ana Maria Macarulla

Abstract:

Hydraulic-press commissioning consumes a great amount of man-hours, due to the fact that it takes place several miles away from where it has been designed. This factor became exacerbated due to control designers’ lack of knowledge about which will be the final controller gains before they start working with it. Virtual commissioning has been postulated as an optimal solution to deal with this lack of knowledge. Here, a case study is presented in which a controller is set up against a real-time model based on a hydraulic-press. The press model is designed following manufacturer specifications and it is embedded in a real-time simulator. This methodology ensures that the model achieves similar responses as the real machine that would be placed on the industry. A deterministic communication protocol is in charge of the bidirectional information transmission between the real-time model and the controller. This platform allows the engineer to test and verify the final control responses with exactly the same hardware that is going to be installed in the hydraulic-press, in other words, realize a virtual commissioning of the electro-hydraulic actuator. The Hardware in the Loop (HiL) platform validates in laboratory conditions and harmless for the machine the control algorithms designed, which allows embedding them afterwards in the industrial environment without further modifications.

Keywords: deterministic communication protocol, electro-hydraulic actuator, hardware in the loop, real-time, virtual commissioning

Procedia PDF Downloads 140
2728 Improving the Performances of the nMPRA Architecture by Implementing Specific Functions in Hardware

Authors: Ionel Zagan, Vasile Gheorghita Gaitan

Abstract:

Minimizing the response time to asynchronous events in a real-time system is an important factor in increasing the speed of response and an interesting concept in designing equipment fast enough for the most demanding applications. The present article will present the results regarding the validation of the nMPRA (Multi Pipeline Register Architecture) architecture using the FPGA Virtex-7 circuit. The nMPRA concept is a hardware processor with the scheduler implemented at the processor level; this is done without affecting a possible bus communication, as is the case with the other CPU solutions. The implementation of static or dynamic scheduling operations in hardware and the improvement of handling interrupts and events by the real-time executive described in the present article represent a key solution for eliminating the overhead of the operating system functions. The nMPRA processor is capable of executing a preemptive scheduling, using various algorithms without a software scheduler. Therefore, we have also presented various scheduling methods and algorithms used in scheduling the real-time tasks.

Keywords: nMPRA architecture, pipeline processor, preemptive scheduling, real-time system

Procedia PDF Downloads 365
2727 Exergy and Energy Analysis of Pre-Heating Unit of Fluid Catalytic Cracking Unit in Kaduna Refining and Petrochemical Company

Authors: M. Nuhu, S. Bilal, A. A. Hamisu, J. A. Abbas, Y. Z. Aminu, P. O. Helen

Abstract:

Exergy and energy analysis of preheating unit of FCCU of KRPC has been calculated and presented in this study. From the design, the efficiency of each heat exchanger was 86%. However, on completion of this work the efficiencies was calculated to be 39.90%, 55.66%, 56.22%, and 57.14% for 16E02, 16E03, 16E04, and 16E05 respectively. 16E04 has the minimum energy loss of 0.86%. The calculated second law and exergy efficiencies of the system were 43.01 and 56.99% respectively.

Keywords: exergy analysis, ideal work, efficiency, exergy destruction, temperature

Procedia PDF Downloads 434
2726 Power Supply Feedback Regulation Loop Design Using Cadence PSpice Tool: Determining Converter Stability by Simulation

Authors: Debabrata Das

Abstract:

This paper explains how to design a regulation loop for a power supply circuit. It also discusses the need of a regulation loop and the improvement of a circuit with regulation loop. A sample design is used to demonstrate how to use PSpice to design feedback loop to control output voltage of a power supply and how to check if the power supply is stable or oscillatory. A sample design is made using a specific Integrated Circuit (IC) available in the PSpice library. A designer can experiment feedback loop design using Cadence Pspice tool. PSpice is easy to use, reliable, and convenient. To test a feedback loop, generally, engineers use trial and error method with the hardware which takes a lot of time and manpower. Moreover, it is expensive because component and Printed Circuit Board (PCB) may go bad. PSpice can be used by designers to test their loop designs without using hardware circuits. A designer can save time, cost, manpower and simulate his/her power supply circuit accurately before making a real hardware using this software package.

Keywords: power electronics, feedback loop, regulation, stability, pole, zero, oscillation

Procedia PDF Downloads 344
2725 A Design of Elliptic Curve Cryptography Processor based on SM2 over GF(p)

Authors: Shiji Hu, Lei Li, Wanting Zhou, DaoHong Yang

Abstract:

The data encryption, is the foundation of today’s communication. On this basis, how to improve the speed of data encryption and decryption is always a problem that scholars work for. In this paper, we proposed an elliptic curve crypto processor architecture based on SM2 prime field. In terms of hardware implementation, we optimized the algorithms in different stages of the structure. In finite field modulo operation, we proposed an optimized improvement of Karatsuba-Ofman multiplication algorithm, and shorten the critical path through pipeline structure in the algorithm implementation. Based on SM2 recommended prime field, a fast modular reduction algorithm is used to reduce 512-bit wide data obtained from the multiplication unit. The radix-4 extended Euclidean algorithm was used to realize the conversion between affine coordinate system and Jacobi projective coordinate system. In the parallel scheduling of point operations on elliptic curves, we proposed a three-level parallel structure of point addition and point double based on the Jacobian projective coordinate system. Combined with the scalar multiplication algorithm, we added mutual pre-operation to the point addition and double point operation to improve the efficiency of the scalar point multiplication. The proposed ECC hardware architecture was verified and implemented on Xilinx Virtex-7 and ZYNQ-7 platforms, and each 256-bit scalar multiplication operation took 0.275ms. The performance for handling scalar multiplication is 32 times that of CPU(dual-core ARM Cortex-A9).

Keywords: Elliptic curve cryptosystems, SM2, modular multiplication, point multiplication.

Procedia PDF Downloads 96
2724 An Analytical Study on Rotational Capacity of Beam-Column Joints in Unit Modular Frames

Authors: Kyung-Suk Choi, Hyung-Joon Kim

Abstract:

Modular structural systems are constructed using a method that they are assembled with prefabricated unit modular frames on-site. This provides a benefit that can significantly reduce building construction time. Their structural design is usually carried out under the assumption that the load-carrying mechanism is similar to that of a traditional steel moment-resisting system. However, both systems are different in terms of beam-column connection details which may strongly influence the lateral structural behavior. Specially, the presence of access holes in a beam-column joint of a unit modular frame could cause undesirable failure during strong earthquakes. Therefore, this study carried out finite element analyses (FEM) of unit modular frames to investigate the cyclic behavior of beam-column joints with the structural influence of access holes. Analysis results show that the unit modular frames present stable cyclic response with large deformation capacities, and their joints are classified into semi-rigid connections.

Keywords: unit modular frame, steel moment connection, nonlinear analytical model, moment-rotation relation

Procedia PDF Downloads 613
2723 Unsupervised Feature Learning by Pre-Route Simulation of Auto-Encoder Behavior Model

Authors: Youngjae Jin, Daeshik Kim

Abstract:

This paper describes a cycle accurate simulation results of weight values learned by an auto-encoder behavior model in terms of pre-route simulation. Given the results we visualized the first layer representations with natural images. Many common deep learning threads have focused on learning high-level abstraction of unlabeled raw data by unsupervised feature learning. However, in the process of handling such a huge amount of data, the learning method’s computation complexity and time limited advanced research. These limitations came from the fact these algorithms were computed by using only single core CPUs. For this reason, parallel-based hardware, FPGAs, was seen as a possible solution to overcome these limitations. We adopted and simulated the ready-made auto-encoder to design a behavior model in Verilog HDL before designing hardware. With the auto-encoder behavior model pre-route simulation, we obtained the cycle accurate results of the parameter of each hidden layer by using MODELSIM. The cycle accurate results are very important factor in designing a parallel-based digital hardware. Finally this paper shows an appropriate operation of behavior model based pre-route simulation. Moreover, we visualized learning latent representations of the first hidden layer with Kyoto natural image dataset.

Keywords: auto-encoder, behavior model simulation, digital hardware design, pre-route simulation, Unsupervised feature learning

Procedia PDF Downloads 445
2722 Run-Time Customisation of Soft-Core CPUs on Field Programmable Gate Array

Authors: Rehab Abdullah Shendi

Abstract:

The use of customised soft-core processors in which instructions can be integrated into a system in application hardware is increasing in the Field Programmable Gate Array (FPGA) field. Specifically, the partial run-time reconfiguration of FPGAs in specialised processors for a particular domain can be very beneficial. In this report, the design and implementation for the customisation of a soft-core MIPS processor using an FPGA and partial reconfiguration (PR) of FPGA technology will be addressed to achieve efficient resource use. This can be achieved using a PR design flow that helps the design fit into a smaller device. Moreover, the impact of static power consumption could be reduced due to runtime reconfiguration. This will be done by configurable custom instructions implemented in the hardware as an extension on the MIPS CPU. The aim of this project is to investigate the PR of FPGAs for run-time adaptations of the instruction set of a soft-core CPU, including the integration of custom instructions and the exploration of the potential to use the MultiBoot feature available in Xilinx FPGAs to carry out the PR process. The system will be evaluated and tested on a Nexus 3 development board featuring a Xilinx Spartran-6 FPGA. The system will be able to load reconfigurable custom instructions dynamically into user programs with the help of the trap handler when the custom instruction is called by the MIPS CPU. The results of this experiment demonstrate that custom instructions in hardware can speed up a certain function and many instructions can be saved when compared to a software implementation of the same function. Implementing custom instructions in hardware is perfectly possible and worth exploring.

Keywords: customisation, FPGA, MIPS, partial reconfiguration, PR

Procedia PDF Downloads 262
2721 Numerical Analysis of the Melting of Nano-Enhanced Phase Change Material in a Rectangular Latent Heat Storage Unit

Authors: Radouane Elbahjaoui, Hamid El Qarnia

Abstract:

Melting of Paraffin Wax (P116) dispersed with Al2O3 nanoparticles in a rectangular latent heat storage unit (LHSU) is numerically investigated. The storage unit consists of a number of vertical and identical plates of nano-enhanced phase change material (NEPCM) separated by rectangular channels in which heat transfer fluid flows (HTF: Water). A two dimensional mathematical model is considered to investigate numerically the heat and flow characteristics of the LHSU. The melting problem was formulated using the enthalpy porosity method. The finite volume approach was used for solving equations. The effects of nanoparticles’ volumetric fraction and the Reynolds number on the thermal performance of the storage unit were investigated.

Keywords: nano-enhanced phase change material (NEPCM), phase change material (PCM), nanoparticles, latent heat storage unit (LHSU), melting.

Procedia PDF Downloads 405
2720 Cost Effective Real-Time Image Processing Based Optical Mark Reader

Authors: Amit Kumar, Himanshu Singal, Arnav Bhavsar

Abstract:

In this modern era of automation, most of the academic exams and competitive exams are Multiple Choice Questions (MCQ). The responses of these MCQ based exams are recorded in the Optical Mark Reader (OMR) sheet. Evaluation of the OMR sheet requires separate specialized machines for scanning and marking. The sheets used by these machines are special and costs more than a normal sheet. Available process is non-economical and dependent on paper thickness, scanning quality, paper orientation, special hardware and customized software. This study tries to tackle the problem of evaluating the OMR sheet without any special hardware and making the whole process economical. We propose an image processing based algorithm which can be used to read and evaluate the scanned OMR sheets with no special hardware required. It will eliminate the use of special OMR sheet. Responses recorded in normal sheet is enough for evaluation. The proposed system takes care of color, brightness, rotation, little imperfections in the OMR sheet images.

Keywords: OMR, image processing, hough circle trans-form, interpolation, detection, binary thresholding

Procedia PDF Downloads 171
2719 The Role of the Internal Audit Unit in Detecting and Preventing Fraud at Public Universities in West Java, Indonesia

Authors: Fury Khristianty Fitriyah

Abstract:

This study aims to identify the extent of the role of the Satuan Pengawas Intern (Internal Audit Unit) in detecting and preventing fraud in public universities in West Java under the Ministry of Research, Technology and Higher Education. The research method applied was a qualitative case study approach, while the unit of analysis for this study is the Internal Audit Unit at each public university. Results of this study indicate that the Internal Audit Unit is able to detect and prevent fraud within a public university environment by means of red flags to mark accounting anomalies. These stem from inaccurate budget planning that prompts inappropriate use of funds, exacerbated by late disbursements of funds, which potentially lead to fictitious transactions, and discrepancies in recording state-owned assets into a state property management system (SIMAK BMN), which, if not conducted properly, potentially causes loss to the state.

Keywords: governance, internal control, fraud, public university

Procedia PDF Downloads 284
2718 A Theoretical Model for a Humidification Dehumidification (HD) Solar Desalination Unit

Authors: Yasser El-Henawy, M. Abd El-Kader, Gamal H. Moustafa

Abstract:

A theoretical study of a humidification dehumidification solar desalination unit has been carried out to increase understanding the effect of weather conditions on the unit productivity. A humidification-dehumidification (HD) solar desalination unit has been designed to provide fresh water for population in remote arid areas. It consists of solar water collector and air collector; to provide the hot water and air to the desalination chamber. The desalination chamber is divided into humidification and dehumidification towers. The circulation of air between the two towers is maintained by the forced convection. A mathematical model has been formulated, in which the thermodynamic relations were used to study the flow, heat and mass transfer inside the humidifier and dehumidifier. The present technique is performed in order to increase the unit performance. Heat and mass balance has been done and a set of governing equations has been solved using the finite difference technique. The unit productivity has been calculated along the working day during the summer and winter sessions and has compared with the available experimental results. The average accumulative productivity of the system in winter has been ranged between 2.5 to 4 kg/m2.day, while the average summer productivity has been found between 8 to 12 kg/m2 day.

Keywords: solar desalination, solar collector, humidification and dehumidification, simulation, finite difference, water productivity

Procedia PDF Downloads 410
2717 Study of a Crude Oil Desalting Plant of the National Iranian South Oil Company in Gachsaran by Using Artificial Neural Networks

Authors: H. Kiani, S. Moradi, B. Soltani Soulgani, S. Mousavian

Abstract:

Desalting/dehydration plants (DDP) are often installed in crude oil production units in order to remove water-soluble salts from an oil stream. In order to optimize this process, desalting unit should be modeled. In this research, artificial neural network is used to model efficiency of desalting unit as a function of input parameter. The result of this research shows that the mentioned model has good agreement with experimental data.

Keywords: desalting unit, crude oil, neural networks, simulation, recovery, separation

Procedia PDF Downloads 449
2716 Enhancing Embedded System Efficiency with Digital Signal Processing Cores

Authors: Anil H. Dhanawade, Akshay S., Harshal M. Lakesar

Abstract:

This paper presents a comprehensive analysis of the performance advantages offered by DSP (Digital Signal Processing) cores compared to traditional MCU (Microcontroller Unit) cores in the execution of various functions critical to real-time applications. The focus is on the integration of DSP functionalities, specifically in the context of motor control applications such as Field-Oriented Control (FOC), trigonometric calculations, back-EMF estimation, digital filtering, and high-resolution PWM generation. Through comparative analysis, it is demonstrated that DSP cores significantly enhance processing efficiency, achieving faster execution times for complex mathematical operations essential for precise torque and speed control. The study highlights the capabilities of DSP cores, including single-cycle Multiply-Accumulate (MAC) operations and optimized hardware for trigonometric functions, which collectively reduce latency and improve real-time performance. In contrast, MCU cores, while capable of performing similar tasks, typically exhibit longer execution times due to reliance on software-based solutions and lack of dedicated hardware acceleration. The findings underscore the critical role of DSP cores in applications requiring high-speed processing and low-latency response, making them indispensable in the automotive, industrial, and robotics sectors. This work serves as a reference for future developments in embedded systems, emphasizing the importance of architecture choice in achieving optimal performance in demanding computational tasks.

Keywords: CPU core, DSP, assembly code, motor control

Procedia PDF Downloads 12
2715 Number of Parametrization of Discrete-Time Systems without Unit-Delay Element: Single-Input Single-Output Case

Authors: Kazuyoshi Mori

Abstract:

In this paper, we consider the parametrization of the discrete-time systems without the unit-delay element within the framework of the factorization approach. In the parametrization, we investigate the number of required parameters. We consider single-input single-output systems in this paper. By the investigation, we find, on the discrete-time systems without the unit-delay element, three cases that are (1) there exist plants which require only one parameter and (2) two parameters, and (3) the number of parameters is at most three.

Keywords: factorization approach, discrete-time system, parameterization of stabilizing controllers, system without unit-delay

Procedia PDF Downloads 238
2714 A Two Tailed Secretary Problem with Multiple Criteria

Authors: Alaka Padhye, S. P. Kane

Abstract:

The following study considers some variations made to the secretary problem (SP). In a multiple criteria secretary problem (MCSP), the selection of a unit is based on two independent characteristics. The units that appear before an observer are known say N, the best rank of a unit being N. A unit is selected, if it is better with respect to either first or second or both the characteristics. When the number of units is large and due to constraints like time and cost, the observer might want to stop earlier instead of inspecting all the available units. Let the process terminate at r2th unit where r1Keywords: joint distribution, marginal distribution, real ranks, secretary problem, selection criterion, two tailed secretary problem

Procedia PDF Downloads 270
2713 Distributed Manufacturing (DM)- Smart Units and Collaborative Processes

Authors: Hermann Kuehnle

Abstract:

Developments in ICT totally reshape manufacturing as machines, objects and equipment on the shop floors will be smart and online. Interactions with virtualizations and models of a manufacturing unit will appear exactly as interactions with the unit itself. These virtualizations may be driven by providers with novel ICT services on demand that might jeopardize even well established business models. Context aware equipment, autonomous orders, scalable machine capacity or networkable manufacturing unit will be the terminology to get familiar with in manufacturing and manufacturing management. Such newly appearing smart abilities with impact on network behavior, collaboration procedures and human resource development will make distributed manufacturing a preferred model to produce. Computing miniaturization and smart devices revolutionize manufacturing set ups, as virtualizations and atomization of resources unwrap novel manufacturing principles. Processes and resources obey novel specific laws and have strategic impact on manufacturing and major operational implications. Mechanisms from distributed manufacturing engaging interacting smart manufacturing units and decentralized planning and decision procedures already demonstrate important effects from this shift of focus towards collaboration and interoperability.

Keywords: autonomous unit, networkability, smart manufacturing unit, virtualization

Procedia PDF Downloads 525