Search results for: Evaluation of Enterprise Architecture Implementation.

Authors: Shiva Subhedar, Abhishek Jain, Shivin Mittal

Abstract:

Icons are not merely decorative elements in enterprise applications but very often used because of their many advantages such as compactness, visual appeal, etc. Despite these potential advantages, icons often cause usability problems when they are designed without consideration for their many potential downsides. The aim of the current study was to examine the effect of articulatory distance – the distance between the physical appearance of an interface element and what it actually means. In other words, will the subject find the association of the function and its appearance on the interface natural or is the icon difficult for them to associate with its function. We have calculated response time and quality of identification by varying icon concreteness, the context of usage and subject experience in the enterprise context. The subjects were asked to associate icons (prepared for study purpose) with given function options in context and out of context mode. Response time and their selection were recorded for analysis.

Keywords: Icons, icon concreteness, icon recognition, HCI.

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Authors: B. E. Narkhede, S. K. Mahajan, B. T. Patil, R. D. Raut

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Information quality is a major performance measure for an Enterprise Resource Planning (ERP) system of any firm. This study identifies various critical success factors of information quality. The effect of various critical success factors like project management, reengineering efforts and interdepartmental communications on information quality is analyzed using a multiple regression model. Here quantitative data are collected from respondents from various firms through structured questionnaire for assessment of the information quality, project management, reengineering efforts and interdepartmental communications. The validity and reliability of the data are ensured using techniques like factor analysis, computing of Cronbach’s alpha. This study gives relative importance of each of the critical success factors. The findings suggest that among the various factors influencing information quality careful reengineering efforts are the most influencing factor. This paper gives clear insight to managers and practitioners regarding the relative importance of critical success factors influencing information quality so that they can formulate a strategy at the beginning of ERP system implementation.

Keywords: Enterprise resource planning, information systems, multiple regression, information quality.

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Authors: Toshimi Munehira

Abstract:

In order to optimize annual IT spending and to reduce the complexity of an entire system architecture, SOA trials have been started. It is common knowledge that to design an SOA system we have to adopt the top-down approach, but in reality silo systems are being made, so these companies cannot reuse newly designed services, and cannot enjoy SOA-s economic benefits. To prevent this situation, we designed a generic SOA development process referred to as the architecture of “mass customization." To define the generic detail development processes, we did a case study on an imaginary company. Through the case study, we could define the practical development processes and found this could vastly reduce updating development costs.

Keywords: SOA, BPM, Generic Model, MassCustomization

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Authors: Hafiz Gulfam Ahmad, Chuangdong Li, Zeeshan Ahmad

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In this paper, we have proposed a parallel IDS and honeypot based approach to detect and analyze the unknown and known attack taxonomy for improving the IDS performance and protecting the network from intruders. The main theme of our approach is to record and analyze the intruder activities by using both the low and high interaction honeypots. Our architecture aims to achieve the required goals by combing signature based IDS, honeypots and generate the new signatures. The paper describes the basic component, design and implementation of this approach and also demonstrates the effectiveness of this approach to reduce the probability of network attacks.

Keywords: Network security, Intrusion detection, Honeypot, Snort, Nmap.

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Authors: Syed Manzoor Qasim, Shuja Abbasi, Saleh Alshebeili, Bandar Almashary, Ateeq Ahmad Khan

Abstract:

Higher-order Statistics (HOS), also known as cumulants, cross moments and their frequency domain counterparts, known as poly spectra have emerged as a powerful signal processing tool for the synthesis and analysis of signals and systems. Algorithms used for the computation of cross moments are computationally intensive and require high computational speed for real-time applications. For efficiency and high speed, it is often advantageous to realize computation intensive algorithms in hardware. A promising solution that combines high flexibility together with the speed of a traditional hardware is Field Programmable Gate Array (FPGA). In this paper, we present FPGA-based parallel architecture for the computation of third-order cross moments. The proposed design is coded in Very High Speed Integrated Circuit (VHSIC) Hardware Description Language (VHDL) and functionally verified by implementing it on Xilinx Spartan-3 XC3S2000FG900-4 FPGA. Implementation results are presented and it shows that the proposed design can operate at a maximum frequency of 86.618 MHz.

Keywords: Cross moments, Cumulants, FPGA, Hardware Implementation.

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Authors: HangRok Lee, YongJe Choi, HoWon Kim

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In recent years, it has been proposed security architecture for sensor network.[2][4]. One of these, TinySec by Chris Kalof, Naveen Sastry, David Wagner had proposed Link layer security architecture, considering some problems of sensor network. (i.e : energy, bandwidth, computation capability,etc). The TinySec employs CBC_mode of encryption and CBC-MAC for authentication based on SkipJack Block Cipher. Currently, This TinySec is incorporated in the TinyOS for sensor network security. This paper introduces TinyHash based on general hash algorithm. TinyHash is the module in order to replace parts of authentication and integrity in the TinySec. it implies that apply hash algorithm on TinySec architecture. For compatibility about TinySec, Components in TinyHash is constructed as similar structure of TinySec. And TinyHash implements the HMAC component for authentication and the Digest component for integrity of messages. Additionally, we define the some interfaces for service associated with hash algorithm.

Keywords: sensor network security, nesC, TinySec, TinyOS, Hash, HMAC, integrity

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Authors: Mansi Jhamb, R. K. Sharma, A. K. Gupta

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The distribution of a single global clock across a chip has become the major design bottleneck for high performance VLSI systems owing to the power dissipation, process variability and multicycle cross-chip signaling. A Network-on-Chip (NoC) architecture partitioned into several synchronous blocks has become a promising approach for attaining fine-grain power management at the system level. In a NoC architecture the communication between the blocks is handled asynchronously. To interface these blocks on a chip operating at different frequencies, an asynchronous FIFO interface is inevitable. However, these asynchronous FIFOs are not required if adjacent blocks belong to the same clock domain. In this paper, we have designed and analyzed a 16-bit asynchronous micropipelined FIFO of depth four, with the awareness of place and route on an FPGA device. We have used a commercially available Spartan 3 device and designed a high speed implementation of the asynchronous 4-phase micropipeline. The asynchronous FIFO implemented on the FPGA device shows 76 Mb/s throughput and a handshake cycle of 109 ns for write and 101.3 ns for read at the simulation under the worst case operating conditions (voltage = 0.95V) on a working chip at the room temperature.

Keywords: Asynchronous, FIFO, FPGA, GALS, Network-on- Chip (NoC), VHDL.

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Authors: A. Capodieci, G. Del Fiore, L. Mainetti

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Recently, the use of web 2.0 tools has increased in companies and public administration organisations. This phenomenon, known as "Enterprise 2.0", has, de facto, modified common organisational and operative practices. This has led “knowledge workers” to change their working practices through the use of Web 2.0 communication tools. Unfortunately, these tools have not been integrated with existing enterprise information systems, a situation that could potentially lead to a loss of information. This is an important problem in an organisational context, because knowledge of information exchanged within the organisation is needed to increase the efficiency and competitiveness of the organisation. In this article we demonstrate that it is possible to capture this knowledge using collaboration processes, which are processes of abstraction created in accordance with design patterns and applied to new organisational operative practices.

Keywords: Business Practices, Business Process Patterns, Collaboration Tools, Enterprise 2.0, Knowledge Workers.

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Authors: Ekrem Aksoy, Nihat Adar, Selçuk Canbek

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Ambient Computing or Ambient Intelligence (AmI) is emerging area in computer science aiming to create intelligently connected environments and Internet of Things. In this paper, we propose communication middleware architecture for AmI. This middleware architecture addresses problems of communication, networking, and abstraction of applications, although there are other aspects (e.g. HCI and Security) within general AmI framework. Within this middleware architecture, any application developer might address HCI and Security issues with extensibility features of this platform.

Keywords: AmI, ambient computing, middleware, distributedsystems, software-defined networking.

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Authors: Ahmed S. Attia

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This paper includes a study of modern sustainable architectural techniques and elements that are originally found in vernacular and traditional architecture, particularly in the Arab region. Courtyards, Wind Catchers, and Mashrabiya, for example, are elements that have been developed in contemporary architecture using modern technology to create sustainable architecture designs. An analytical study of the topic will deal with some examples of the Islamic House in Fatimid Cairo city in Egypt, analyzing its elements and their relationship to the environment, in addition to the examples in southern Egypt (Nubba) of sustainable architecture systems, and traditional houses in Sana'a city, Yemen, using earth resources of mud bricks and other construction materials. In conclusion, a comparative study between traditional and contemporary techniques will be conducted to confirm that it is possible to achieve sustainable architecture through the use of low-technology in buildings in Arab regions.

Keywords: Islamic context, cultural environment, natural environment, Islamic House, low-technology, mud brick, vernacular and traditional architecture.

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Authors: Tania Elena González Alvarado, Ma. Antonieta Martín Granados

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The aim of this paper is to explain what a multienterprise tie is, what evidence its analysis provides and how does the cooperation mechanism influence the establishment of a multienterprise tie. The study focuses on businesses of smaller dimension, geographically dispersed and whose businessmen are learning to cooperate in an international environment. The empirical evidence obtained at this moment permits to conclude the following: The tie is not long-lasting, it has an end; opportunism is an opportunity to learn; the multi-enterprise tie is a space to learn about the cooperation mechanism; the local tie permits a businessman to alternate between competition and cooperation strategies; the disappearance of a tie is an experience of learning for a businessman, diminishing the possibility of failure in the next tie; the cooperation mechanism tends to eliminate hierarchical relations; the multienterprise tie diminishes the asymmetries and permits SME-s to have a better position when they negotiate with large companies; the multi-enterprise tie impacts positively on the local system. The collection of empirical evidence was done trough the following instruments: direct observation in a business encounter to which the businesses attended in 2003 (202 Mexican agro industry SME-s), a survey applied in 2004 (129), a questionnaire applied in 2005 (86 businesses), field visits to the businesses during the period 2006-2008 and; a survey applied by telephone in 2008 (55 Mexican agro industry SME-s).

Keywords: Cooperation, multi-enterprise tie, links, networks.

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Authors: Václav Sadílek, Miroslav Vořechovský

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The paper deals with the classical fiber bundle model of equal load sharing, sometimes referred to as the Daniels’ bundle or the democratic bundle. Daniels formulated a multidimensional integral and also a recursive formula for evaluation of the strength cumulative distribution function. This paper describes three algorithms for evaluation of the recursive formula and also their implementations with source codes in the Python high-level programming language. A comparison of the algorithms are provided with respect to execution time. Analysis of orders of magnitudes of addends in the recursion is also provided.

Keywords: Daniels bundle model, equal load sharing, Python, mpmath.

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Authors: Ali M. Al-Khouri

Abstract:

This paper presents findings from the evaluation study carried out to review the UAE national ID card software. The paper consults the relevant literature to explain many of the concepts and frameworks explained herein. The findings of the evaluation work that was primarily based on the ISO 9126 standard for system quality measurement highlighted many practical areas that if taken into account is argued to more likely increase the success chances of similar system implementation projects.

Keywords: National ID system, software quality, ISO 9126.

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Authors: Yaser Rezapour, Armin Jabbarieh, Fatemeh Behfar, Ahadollah Azami, Aidin Shamsalghorayi

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Social ideology, cultural values and principles shaping environment are inferred by environment and structural characteristics of construction site. In other words, this inference manifestation also indicates ideology and culture of its foundation and also applies its principles and values and somehow plays an important role in Cultural Revolution. All human behaviors and artifacts are affected and being influenced by culture. Culture is not abstract concept, it is a spiritual domain that an individual and society grow and develop in it. Social behaviors are affected by environmental comprehension, so the architecture work influences on its audience and it is the environment that fosters social behaviors. Indeed, sustainable architecture should be considered as background of culture for establishing optimal sustainable culture. Since unidentified architecture roots in cultural non identity and abnormalities, so the society possesses identity characteristics and life and as a consequence, the society and architecture are changed by transformation of life style. This article aims to investigate the interaction of architecture, society, environment and sustainable architecture formation in its cultural basis and analyzes the results approaching behavior and sustainable culture in recent era.

Keywords: Culture, Sustainable Architecture, Environment, Development

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Authors: Ionel Zagan, Vasile Gheorghita Gaitan

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The development of CPUs and of real-time systems based on them made it possible to use time at increasingly low resolutions. Together with the scheduling methods and algorithms, time organizing has been improved so as to respond positively to the need for optimization and to the way in which the CPU is used. This presentation contains both a detailed theoretical description and the results obtained from research on improving the performances of the nMPRA (Multi Pipeline Register Architecture) processor by implementing specific functions in hardware. The proposed CPU architecture has been developed, simulated and validated by using the FPGA Virtex-7 circuit, via a SoC project. Although the nMPRA processor hardware structure with five pipeline stages is very complex, the present paper presents and analyzes the tests dedicated to the implementation of the CPU and of the memory on-chip for instructions and data. In order to practically implement and test the entire SoC project, various tests have been performed. These tests have been performed in order to verify the drivers for peripherals and the boot module named Bootloader.

Keywords: Hardware scheduler, nMPRA processor, real-time systems, scheduling methods.

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Authors: Mohib ur Rehman, Imran Ihsan, Mobin Uddin Ahmed, Nadeem Iftikhar, Muhammad Abdul Qadir

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Multimedia, as it stands now is perhaps the most diverse and rich culture around the globe. One of the major needs of Multimedia is to have a single system that enables people to efficiently search through their multimedia catalogues. Many Domain Specific Systems and architectures have been proposed but up till now no generic and complete architecture is proposed. In this paper, we have suggested a generic architecture for Multimedia Database. The main strengths of our architecture besides being generic are Semantic Libraries to reduce semantic gap, levels of feature extraction for more specific and detailed feature extraction according to classes defined by prior level, and merging of two types of queries i.e. text and QBE (Query by Example) for more accurate yet detailed results.

Keywords: Multimedia Database Architecture, Semantics, Feature Extraction, Ontology.

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Authors: S. Jalaja, A. M. Vijaya Prakash

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Recursive combination of an algorithm based on Karatsuba multiplication is exploited to design a generalized transpose and parallel Finite Impulse Response (FIR) Filter. Mid-range Karatsuba multiplication and Carry Save adder based on Karatsuba multiplication reduce time complexity for higher order multiplication implemented up to n-bit. As a result, we design modified N-tap Transpose and Parallel Symmetric FIR Filter Structure using Karatsuba algorithm. The mathematical formulation of the FFA Filter is derived. The proposed architecture involves significantly less area delay product (APD) then the existing block implementation. By adopting retiming technique, hardware cost is reduced further. The filter architecture is designed by using 90 nm technology library and is implemented by using cadence EDA Tool. The synthesized result shows better performance for different word length and block size. The design achieves switching activity reduction and low power consumption by applying with and without retiming for different combination of the circuit. The proposed structure achieves more than a half of the power reduction by adopting with and without retiming techniques compared to the earlier design structure. As a proof of the concept for block size 16 and filter length 64 for CKA method, it achieves a 51% as well as 70% less power by applying retiming technique, and for CSA method it achieves a 57% as well as 77% less power by applying retiming technique compared to the previously proposed design.

Keywords: Carry save adder Karatsuba multiplication, mid-range Karatsuba multiplication, modified FFA, transposed filter, retiming.

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Authors: Mountassar Maamoun, Abdelhamid Meraghni, Abdelhalim Benbelkacem, Daoud Berkani

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This paper describes an efficient hardware implementation of a new technique for interfacing the data exchange between the microprocessor-based systems and the external devices. This technique, based on the use of software/hardware system and a reduced physical address, enlarges the interfacing capacity of the microprocessor-based systems, uses the Direct Memory Access (DMA) to increases the frequency of the new bus, and improves the speed of data exchange. While using this architecture in microprocessor-based system or in computer, the input of the hardware part of our system will be connected to the bus system, and the output, which is a new bus, will be connected to an external device. The new bus is composed of a data bus, a control bus and an address bus. A Xilinx Integrated Software Environment (ISE) 7.1i has been used for the programmable logic implementation.

Keywords: Interfacing, Software/hardware System, CPLD, programmable logic, DMA.

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Authors: Rajendra M. Sonar

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The recent trend has been using hybrid approach rather than using a single intelligent technique to solve the problems. In this paper, we describe and discuss a framework to develop enterprise solutions that are backed by intelligent techniques. The framework not only uses intelligent techniques themselves but it is a complete environment that includes various interfaces and components to develop the intelligent solutions. The framework is completely Web-based and uses XML extensively. It can work like shared plat-form to be accessed by multiple developers, users and decision makers.

Keywords: Intelligent System Development Framework, WebbasedIntelligent Systems, Retail Banking.

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Authors: Gavin J. Baxter, Mark H. Stansfield

Abstract:

This paper reviews the internal use of blogs and their potential effectiveness as organisational learning tools. Since the emergence of the concept of ‘Enterprise 2.0’ there remains a lack of empirical evidence associated with how organisations are applying social media tools and whether they are effective towards supporting organisational learning. Surprisingly, blogs, one of the more traditional social media tools, still remains under-researched in the context of ‘Enterprise 2.0’ and organisational learning. The aim of this paper is to identify the theoretical linkage between blogs and organisational learning in addition to reviewing prior research on organisational blogging exploring why this area remains underresearched. Through a literature review, one of the principal findings of this paper is that organisational blogs have a mutual compatibility with the interpretivist aspect of organisational learning. This paper further advocates that further empirical work in this subject area is required to substantiate this theoretical assumption.

Keywords: Blogs, Enterprise 2.0, Organisational Learning, Social Media Tools.

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Authors: Chin Chin Wong, Chor Min Tan, Pang Leang Hiew

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Business scenario is an important technique that may be used at various stages of the enterprise architecture to derive its characteristics based on the high-level requirements of the business. In terms of wireless deployments, they are used to help identify and understand business needs involving wireless services, and thereby to derive the business requirements that the architecture development has to address by taking into account of various wireless challenges. This study assesses the deployment of Wireless Local Area Network (WLAN) and Broadband Wireless Access (BWA) solutions for several business scenarios in Asia Pacific region. This paper focuses on the overview of the business and technology environments, whereby examples of existing (or suggested) wireless solutions (to be) adopted in Asia Pacific region will be discussed. Interactions of several players, enabling technologies, and key processes in the wireless environments are studied. The analysis and discussions associated to this study are divided into two divisions: healthcare and education, where the merits of wireless solutions in improving living quality are highlighted.

Keywords: Broadband Wireless Access, business scenarios, network deployment, Wireless Local Area Network.

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Authors: Eduard Atkin, Alexander Klyuev, Vitaly Shumikhin

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An approach and its implementation in 0.18 m CMOS process of the multichannel ASIC for capacitive (up to 30 pF) sensors are described in the paper. The main design aim was to study an analog data-driven architecture. The design was done for an analog derandomizing function of the 128 to 16 structure. That means that the ASIC structure should provide a parallel front-end readout of 128 input analog sensor signals and after the corresponding fast commutation with appropriate arbitration logic their processing by means of 16 output chains, including analog-to-digital conversion. The principal feature of the ASIC is a low power consumption within 2 mW/channel (including a 9-bit 20Ms/s ADC) at a maximum average channel hit rate not less than 150 kHz.

Keywords: Data-driven architecture, derandomizer, multichannel sensor readout

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Authors: Christian Endisch, Christoph Hackl, Dierk Schröder

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This paper presents an exact pruning algorithm with adaptive pruning interval for general dynamic neural networks (GDNN). GDNNs are artificial neural networks with internal dynamics. All layers have feedback connections with time delays to the same and to all other layers. The structure of the plant is unknown, so the identification process is started with a larger network architecture than necessary. During parameter optimization with the Levenberg- Marquardt (LM) algorithm irrelevant weights of the dynamic neural network are deleted in order to find a model for the plant as simple as possible. The weights to be pruned are found by direct evaluation of the training data within a sliding time window. The influence of pruning on the identification system depends on the network architecture at pruning time and the selected weight to be deleted. As the architecture of the model is changed drastically during the identification and pruning process, it is suggested to adapt the pruning interval online. Two system identification examples show the architecture selection ability of the proposed pruning approach.

Keywords: System identification, dynamic neural network, recurrentneural network, GDNN, optimization, Levenberg Marquardt, realtime recurrent learning, network pruning, quasi-online learning.

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Authors: Milorad Pavlovic, Anna Manzato, Antonella Cecchi

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Cultural heritage conservation is a challenge for contemporary society. In recent decades, significant resources have been allocated for the conservation and restoration of architectural heritage. Historical buildings were restored, protected and reinforced with the intent to limit the risks of degradation or loss, due to phenomena of structural damage and to external factors such as differential settlements, earthquake effects, etc. The wide diffusion of historic masonry constructions in Italy, Europe and the Mediterranean area requires reliable tools for the evaluation of their structural safety. In this paper is presented a free modal analysis performed on a minor historical architecture located in the village of Bagno Grande, near the city of L’Aquila in Italy. The location is characterized by a complex urban context, seriously damaged by the earthquake of 2009. The aim of this work is to check the structural behavior of a masonry building characterized by several boundary conditions imposed by adjacent buildings and infrastructural facilities.

Keywords: FEM, masonry, minor historical architecture, modal analysis.

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Authors: Juyoung Kim, Taegeun Park

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In this paper, we propose a fully-utilized, block-based 2D DWT (discrete wavelet transform) architecture, which consists of four 1D DWT filters with two-channel QMF lattice structure. The proposed architecture requires about 2MN-3N registers to save the intermediate results for higher level decomposition, where M and N stand for the filter length and the row width of the image respectively. Furthermore, the proposed 2D DWT processes in horizontal and vertical directions simultaneously without an idle period, so that it computes the DWT for an N×N image in a period of N2(1-2-2J)/3. Compared to the existing approaches, the proposed architecture shows 100% of hardware utilization and high throughput rates. To mitigate the long critical path delay due to the cascaded lattices, we can apply the pipeline technique with four stages, while retaining 100% of hardware utilization. The proposed architecture can be applied in real-time video signal processing.

Keywords: discrete wavelet transform, VLSI architecture, QMF lattice filter, pipelining.

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Authors: Sajjad Hashemi, Khalil Monfaredi, Mohammad Masdari

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Cloud computing is a style of computing which is formed from the aggregation and development of technologies such as grid computing distributed computing, parallel computing and service-oriented architecture. And its aim is to provide computing, communication and storage resources in a safe environment based on service, as fast as possible, which is virtually provided via Internet platform. Considering that the provided Services in e-government are available via the Internet, thus cloud computing can be used in the implementation of e-government architecture and provide better service with the lowest economic cost using its benefits. In this paper, the Methods of using cloud computing in e-government has been studied and it's been attempted to identify the challenges and benefits of the cloud to get used in the e-government and proposals have been offered to overcome its shortcomings, encourage and partnership of governments and people to use this economical and new technology.

Keywords: Benefits, Cloud computing, Committee, Challenges, E-Government, Participation.

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Authors: Sheng-Chi Tseng, Der-Ming Liou

Abstract:

The health record in the Electronic Health Record (EHR) system is more sensitive than demographic. It raises the important issue for the EHR requirement in privacy, security, audit trail, patient access, and archiving and data retention. The studies about the EHR system security are deficient. The aim of this study is to build a security environment for the EHR system by Integrating the Healthcare Enterprise (IHE) Audit Trail and Node Authentication Security (ATNA) profile. The CDAs can be access in a secure EHR environment.

Keywords: IHE ATNA, EHR security.

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Authors: B. Cortés, A. Boza, D. Pérez, L. Cuenca

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The Internet of Things (IoT) field has been applied in industries with different purposes. Sensing Enterprise (SE) is an attribute of an enterprise or a network that allows it to react to business stimuli originating on the Internet. These fields have come into focus recently on the enterprises, and there is some evidence of the use and implications in supply chain management, while finding it as an interesting aspect to work on. This paper presents a revision and proposals of IoT applications in supply chain management.

Keywords: Internet of Things, Sensing Enterprises, Supply Chain Management, Industrial, Production Systems, Sensor.

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Authors: V. H. Mankar, T. S. Das, S. K. Sarkar

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In this paper, we have proposed a novel blind watermarking architecture towards its hardware implementation in VLSI. In order to facilitate this hardware realization, cellular automata (CA) concept is introduced. The CA has been already accepted as an attractive structure for VLSI implementation because of its modularity, parallelism, high performance and reliability. The hardware realizable multiresolution spread spectrum watermarking techniques are very few in numbers in spite of their best ever resiliency against signal impairments. This is because of the computational cost and complexity associated with their different filter banks and lifting techniques. The concept of cellular automata theory in order to form a new transform domain technique i.e. Cellular Automata Transform (CAT) have been incorporated. Since CA provides spreading sequences having very low cross-correlation properties, the CA based pseudorandom sequence generator is considered in the present work. Considering the watermarking technique as a digital communication process, an error control coding (ECC) must be incorporated in the data hiding schemes. Besides the hardware implementation of entire CA based data hiding technique, the individual blocks of the algorithm using CA provide the best result than that of some other methods irrespective of the hardware and software technique. The Cellular Automata Transform, CA based PN sequence generator, and CA ECC are the requisite blocks that are developed not only to meet the reliable hardware requirements but also for the basic spread spectrum watermarking features. The proposed algorithm shows statistical invisibility and resiliency against various common signal-processing operations. This algorithmic design utilizes the existing allocated bandwidth in the data transmission channel in a more efficient manner.

Keywords: Cellular automata, watermarking, error control coding, PN sequence, VLSI.

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Authors: Rizwan Asghar, Dake Liu

Abstract:

A hardware efficient, multi mode, re-configurable architecture of interleaver/de-interleaver for multiple standards, like DVB, WiMAX and WLAN is presented. The interleavers consume a large part of silicon area when implemented by using conventional methods as they use memories to store permutation patterns. In addition, different types of interleavers in different standards cannot share the hardware due to different construction methodologies. The novelty of the work presented in this paper is threefold: 1) Mapping of vital types of interleavers including convolutional interleaver onto a single architecture with flexibility to change interleaver size; 2) Hardware complexity for channel interleaving in WiMAX is reduced by using 2-D realization of the interleaver functions; and 3) Silicon cost overheads reduced by avoiding the use of small memories. The proposed architecture consumes 0.18mm2 silicon area for 0.12μm process and can operate at a frequency of 140 MHz. The reduced complexity helps in minimizing the memory utilization, and at the same time provides strong support to on-the-fly computation of permutation patterns.

Keywords: Hardware interleaver implementation, WiMAX, DVB, block interleaver, convolutional interleaver, hardwaremultiplexing.

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