Search results for: spintronic circuits

Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, voltage transition, node stabilization, biasing circuits

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Authors: M. Harir, A. Bendiabdellah, A. Chaouch, N. Benouzza

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This paper deals with the modelling and simulation of the squirrel cage induction motor by taking into account all space harmonic components, as well as the introduction of the bars skew, in the calculation of the linear evolution of the magnetomotive force (MMF) between the slots extremities. The model used is based on multiple coupled circuits and the modified winding function approach (MWFA). The effect of skewing is included in the calculation of motors inductances with an axial asymmetry in the rotor. The simulation results in both time and spectral domains show the effectiveness and merits of the model and the error that may be caused if the skew of the bars is neglected.

Keywords: modeling, MWFA, skew effect, squirrel cage induction motor, spectral domain

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Authors: Hyun-Woo Jun, Tae-Chul Jeong, Huai-Cong Liu, Ju Lee

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The paper presents the electromagnetic-thermal flow coupled analysis of permanent magnet synchronous motor (PMSM) which has cooling channel in stator core for forced air cooling. Unlike the general PMSM design, to achieve ohmic loss reduction for high efficiency, cooling channel actively used in the stator core. Equivalent thermal network model was made to analyze the effect of the formation of the additional flow path in the core. According to the shape and position changing of the channel design, electromagnetic-thermal coupled analysis results were reviewed.

Keywords: coupled problems, electric motors, equivalent circuits, fluid flow, thermal analysis

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Authors: Roumaissa Derdour, Lebbal Mohamed Redha

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We present a study of the transmission of the all-optical logic gate using a structure connected with a triangular photonic crystal lattice that is improved. The proposed logic gate consists of a photonic crystal nano-resonator formed by changing the size of the air holes. In addition to the simplicity, the response time is very short, and the designed nano-resonator increases the bit rate of the logic gate. The two-dimensional finite difference time domain (2DFDTD) method is used to simulate the structure; the transmission obtained is about 98% with very negligible losses. The proposed photonic crystal AND logic gate is widely used in future integrated optical microelectronics.

Keywords: logic gates, photonic crystals, optical integrated circuits, resonant cavities

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Authors: Ararat Khachatryan, Davit Mirzoyan

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In sub micrometer technology, the aging phenomenon starts to have a significant impact on the reliability of integrated circuits by bringing performance degradation. For that reason, it is important to have a capability to evaluate the aging effects accurately. This paper presents an accurate aging measurement approach based on phase-locked loop (PLL) and voltage-controlled oscillator (VCO) circuit. The architecture is rejecting the circuit self-aging effect from the characteristics of PLL, which is generating the frequency without any aging phenomena affects. The aging monitor is implemented in low power 32 nm CMOS technology, and occupies a pretty small area. Aging simulation results show that the proposed aging measurement circuit improves accuracy by about 2.8% at high temperature and 19.6% at high voltage.

Keywords: aging effect, HCI, NBTI, nanoscale

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Authors: Ammar Nimer Natsheh

Abstract:

Chaos control is used to design a controller that is able to eliminate the chaotic behaviour of nonlinear dynamic systems that experience such phenomena. The paper describes the control of the bifurcation behaviour of a parallel-connected DC-DC buck-boost converter used to provide an interface between energy storage batteries and photovoltaic (PV) arrays as renewable energy sources. The paper presents a delayed feedback control scheme in a module converter comprises two identical buck-boost circuits and operates in the continuous-current conduction mode (CCM). MATLAB/SIMULINK simulation results show the effectiveness and robustness of the scheme.

Keywords: chaos, bifurcation, DC-DC Buck-Boost Converter, Delayed Feedback Control

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Authors: Hanan. Al Chaghouri, Mohammad Azad Malik, P. John Thomas, Paul O’Brien

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The process of assembling metal nanoparticles at the interface of two liquids has received a great deal of attention over the past few years due to a wide range of important applications and their unusual properties as compared to bulk materials. We present a low cost, simple and cheap synthesis of metal nanoparticles, core/shell structures and semiconductors followed by assembly of these particles between immiscible liquids. The aim of this talk is divided to three parts: Firstly, to describe the achievement of a closed loop recycling for producing cadmium sulfide as powders and/or nanostructured thin films for solar cells or other optoelectronic devices applications by using a different chain length of commercially available secondary amines of dithiocarbamato complexes. The approach can be extended to other metal sulfides such as those of Zn, Pb, Cu, or Fe and many transition metals and oxides. Secondly, to synthesis significantly cheaper magnetic particles suited for the mass market. Ni/NiO nanoparticles with ferromagnetic properties at room temperature were among the smallest and strongest magnets (5 nm) were made in solution. The applications of this work can be to produce viable storage devices and the other possibility is to disperse these nanocrystals in solution and use it to make ferrofluids which have a number of mature applications. The third part is about preparing and assembling of submicron silver, cobalt and nickel particles by using polyol methods and liquid/liquid interface, respectively. Coinage metals like gold, copper and silver are suitable for plasmonic thin film solar cells because of their low resistivity and strong interactions with visible light waves. Silver is the best choice for solar cell application since it has low absorption losses and high radiative efficiency compared to gold and copper. Assembled cobalt and nickel as films are promising for spintronic, magnetic and magneto-electronic and biomedics.

Keywords: metal nanoparticles, core/shell structures and semiconductors, ferromagnetic properties, closed loop recycling, liquid/liquid interface

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Authors: Agord M. Pinto Jr., Yuzo Iano, Leandro T. Manera, Raphael R. N. Souza

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This paper describes an optimization tool-based design strategy for a Current Mode Logic CML divide-by-2 circuit. Representing a building block for output frequency generation in a RFID protocol based-frequency synthesizer, the circuit was designed to minimize the power consumption for driving of multiple loads with unbalancing (at transceiver level). Implemented with XFAB XC08 180 nm technology, the circuit was optimized through MunEDA WiCkeD tool at Cadence Virtuoso Analog Design Environment ADE.

Keywords: divide-by-2 circuit, CMOS technology, PLL phase locked-loop, optimization tool, CML current mode logic, RF transceiver

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Authors: Yiqiang Ni, Xuanlong Chen, Enliang Li, Linting Zheng, Shizheng Yang

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Bipolar ICs are playing an important role in military applications, mainly used in logic gates, such as inverter and NAND gate. The defect of metal break located on the step is one of the main failure mechanisms of bipolar ICs, resulting in open-circuit or functional failure. In this situation, general failure localization methods like optical beam-induced resistance change (OBIRCH) and photon emission microscopy (PEM) might not be fully effective. However, active voltage contrast (AVC) can be used as a voltage probe, which may pinpoint the incorrect potential and thus locate the failure position. Two case studies will be present in this paper on how to implement AVC for failure localization, and the detailed failure mechanism will be discussed.

Keywords: bipolar IC, failure localization, metal break, open failure, voltage contrast

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

Abstract:

This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, multi-inputs, voltage transition, node stabilization, biasing circuits

Procedia PDF Downloads 529

Authors: A. T. Perez Fontenla, S. Sgobba, A. Bartkowska, Y. Askar, M. Dalemir Celuch, A. Newborough, M. Karppinen, H. Haalien, S. Deleval, S. Larcher, C. Charvet, L. Bruno, R. Trant

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The present study investigates the corrosion behavior of copper (Cu) based conducts predominantly brazed with Sil-Fos (self-fluxing copper-based filler with silver and phosphorus) within various cooling circuits of demineralized water across different particle accelerator components at CERN. The study covers a range of sample service time, from a few months to fifty years, and includes various accelerator components such as quadrupoles, dipoles, and bending magnets. The investigation comprises the established sample extraction procedure, examination methodology including non-destructive testing, evaluation of the corrosion phenomena, and identification of commonalities across the studied components as well as analysis of the environmental influence. The systematic analysis included computed microtomography (CT) of the joints that revealed distributed defects across all brazing interfaces. Some defects appeared to result from areas not wetted by the filler during the brazing operation, displaying round shapes, while others exhibited irregular contours and radial alignment, indicative of a network or interconnection. The subsequent dry cutting performed facilitated access to the conduct's inner surface and the brazed joints for further inspection through light and electron microscopy (SEM) and chemical analysis via Energy Dispersive X-ray spectroscopy (EDS). Brazing analysis away from affected areas identified the expected phases for a Sil-Fos alloy. In contrast, the affected locations displayed micrometric cavities propagating into the material, along with selective corrosion of the bulk Cu initiated at the conductor-braze interface. Corrosion product analysis highlighted the consistent presence of sulfur (up to 6 % in weight), whose origin and role in the corrosion initiation and extension is being further investigated. The importance of this study is paramount as it plays a crucial role in comprehending the underlying factors contributing to recently identified water leaks and evaluating the extent of the issue. Its primary objective is to provide essential insights for the repair of impacted brazed joints when accessibility permits. Moreover, the study seeks to contribute to the improvement of design and manufacturing practices for future components, ultimately enhancing the overall reliability and performance of magnet systems within CERN accelerator facilities.

Keywords: accelerator facilities, brazed copper conducts, demineralized water, magnets

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Authors: Jae-Chang Kwak, Yong-Seo Koo

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The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter

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Authors: Muhaned Zaidi, Ian Grout, Abu Khari bin A’ain

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In this paper, a two-stage op-amp design is considered using both Miller and negative Miller compensation techniques. The first op-amp design uses Miller compensation around the second amplification stage, whilst the second op-amp design uses negative Miller compensation around the first stage and Miller compensation around the second amplification stage. The aims of this work were to compare the gain and phase margins obtained using the different compensation techniques and identify the ability to choose either compensation technique based on a particular set of design requirements. The two op-amp designs created are based on the same two-stage rail-to-rail output CMOS op-amp architecture where the first stage of the op-amp consists of differential input and cascode circuits, and the second stage is a class AB amplifier. The op-amps have been designed using a 0.35mm CMOS fabrication process.

Keywords: op-amp, rail-to-rail output, Miller compensation, Negative Miller capacitance

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Authors: Peter A. L’vov, Roman S. Konovalov, Alexey A. L’vov

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The paper presents the advanced digital modification of the conventional current loop circuit for pressure piezoelectric transducers. The optimal DSP algorithms of current loop responses by the maximum likelihood method are applied for diminishing of measurement errors. The loop circuit has some additional advantages such as the possibility to operate with any type of resistance or reactance sensors, and a considerable increase in accuracy and quality of measurements to be compared with AC bridges. The results obtained are dedicated to replace high-accuracy and expensive measuring bridges with current loop circuits.

Keywords: current loop, maximum likelihood method, optimal digital signal processing, precise pressure measurement

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Authors: Guo Lei, Wang Yue, Nakamura Yoshio, Shi Ji

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Recently, perpendicular exchange bias (PEB) is introduced as an active topic attracting continuous efforts. Since its discovery, extrinsic control of PEB has been proposed, due to its scientific significance in spintronic devices and potential application in high density magnetic random access memory with perpendicular magnetic tunneling junction (p-MTJ). To our knowledge, the researches aiming to controlling PEB so far are focused mainly on enhancing the interfacial exchange coupling by adjusting the FM/AFM interface roughness, or optimizing the crystalline structures of FM or AFM layer by employing different seed layers. In present work, the effects of magnetoelastically induced PMA on PEB have been explored in [CoO5nm/CoPt5nm]5 multilayer films. We find the PMA strength of FM layer also plays an important role on PEB at the FM/AFM interface and it is effective to control PEB of [CoO5nm/CoPt5nm]5 multilayer films by changing the magnetoelastically induced PMA of CoPt layer. [CoO5nm/CoPt5nm]5 multilayer films were deposited by magnetron sputtering on fused quartz substrate at room temperature, then annealed at 100°C, 250°C, 300°C and 375°C for 3h, respectively. XRD results reveal that all the samples are well crystallized with preferred fcc CoPt (111) orientation. The continuous multilayer structure with sharp component transition at the CoO5nm/CoPt5nm interface are identified clearly by transmission electron microscopy (TEM), x-ray reflectivity (XRR) and atomic force microscope (AFM). CoPt layer in-plane tensile stress is calculated by sin2φ method, and we find it increases gradually upon annealing from 0.99 GPa (as-deposited) up to 3.02 GPa (300oC-annealed). As to the magnetic property, significant enhancement of PMA is achieved in [CoO5nm/CoPt5nm]5 multilayer films after annealing due to the increase of CoPt layer in-plane tensile stress. With the enhancement of magnetoelastically induced PMA, great improvement of PEB is also achieved in [CoO5nm/CoPt5nm]5 multilayer films, which increases from 130 Oe (as-deposited) up to 1060 Oe (300oC-annealed), showing the same change tendency as PMA and the strong correlation with CoPt layer in-plane tensile stress. We consider it is the increase of CoPt layer in-plane tensile stress that leads to the enhancement of PMA, and thus the enhancement of magnetoelastically induced PMA results in the improvement of PEB in [CoO5nm/CoPt5nm]5 multilayer films.

Keywords: perpendicular exchange bias, magnetoelastically induced perpendicular magnetic anisotropy, CoO5nm/CoPt5nm]5 multilayer film with in-plane stress, perpendicular magnetic tunneling junction

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Authors: Wenmin Qu

Abstract:

A capacitance level sensor with a segmented film electrode and a thin-film volume flow sensor with an innovative by-pass sleeve is presented as industrial products for the application in a harsh environment. The working principle of such sensors is well known; however, the traditional sensors show some limitations for certain industrial measurements. The two sensors presented in this paper overcome this limitation and enlarge the application spectrum. The problem is analyzed, and the solution is given. The emphasis of the paper is on developing the problem-solving concepts and the realization of the corresponding measuring circuits. These should give advice and encouragement, how we can still develop electronic measuring products in an almost saturated market.

Keywords: by-pass sleeve, charge transfer circuit, fixed ΔT circuit, harsh environment, industrial application, segmented electrode

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Authors: Davit Mirzoyan, Ararat Khachatryan

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A process corner monitoring circuit (PCMC) is presented in this work. The circuit generates a signal, the logical value of which depends on the process corner only. The signal can be used in both digital and analog circuits for testing and compensation of process variations (PV). The presented circuit uses only metal-oxide-semiconductor (MOS) transistors, which allow increasing its detection accuracy, decrease power consumption and area. Due to its simplicity the presented circuit can be easily modified to monitor parametrical variations of only n-type and p-type MOS (NMOS and PMOS, respectively) transistors, resistors, as well as their combinations. Post-layout simulation results prove correct functionality of the proposed circuit, i.e. ability to monitor the process corner (equivalently die-to-die variations) even in the presence of within-die variations.

Keywords: detection, monitoring, process corner, process variation

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Authors: Wenjun Hou, Marek Perkowski

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The Traveling Salesman problem is famous in computing and graph theory. In short, it asks for the Hamiltonian cycle of the least total weight in a given graph with N nodes. All variations on this problem, such as those with K-bounded-degree nodes, are classified as NP-complete in classical computing. Although several papers propose theoretical high-level designs of quantum algorithms for the Traveling Salesman Problem, no quantum circuit implementation of these algorithms has been created up to our best knowledge. In contrast to previous papers, the goal of this paper is not to optimize some abstract complexity measures based on the number of oracle iterations, but to be able to evaluate the real circuit and time costs of the quantum computer. Using the emerging quantum programming language Q# developed by Microsoft, which runs quantum circuits in a quantum computer simulation, an implementation of the bounded-degree problem and its respective quantum circuit were created. To apply Grover’s algorithm to this problem, a quantum oracle was designed, evaluating the cost of a particular set of edges in the graph as well as its validity as a Hamiltonian cycle. Repeating the Grover algorithm with an oracle that finds successively lower cost each time allows to transform the decision problem to an optimization problem, finding the minimum cost of Hamiltonian cycles. N log₂ K qubits are put into an equiprobablistic superposition by applying the Hadamard gate on each qubit. Within these N log₂ K qubits, the method uses an encoding in which every node is mapped to a set of its encoded edges. The oracle consists of several blocks of circuits: a custom-written edge weight adder, node index calculator, uniqueness checker, and comparator, which were all created using only quantum Toffoli gates, including its special forms, which are Feynman and Pauli X. The oracle begins by using the edge encodings specified by the qubits to calculate each node that this path visits and adding up the edge weights along the way. Next, the oracle uses the calculated nodes from the previous step and check that all the nodes are unique. Finally, the oracle checks that the calculated cost is less than the previously-calculated cost. By performing the oracle an optimal number of times, a correct answer can be generated with very high probability. The oracle of the Grover Algorithm is modified using the recalculated minimum cost value, and this procedure is repeated until the cost cannot be further reduced. This algorithm and circuit design have been verified, using several datasets, to generate correct outputs.

Keywords: quantum computing, quantum circuit optimization, quantum algorithms, hybrid quantum algorithms, quantum programming, Grover’s algorithm, traveling salesman problem, bounded-degree TSP, minimal cost, Q# language

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Authors: S.Pandeeswari, Raju Padma

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In this paper a new solution to implement and control single-stage electronic ballast based on the integration of a buck-boost power factor correction stage and a half bridge resonant inverter is presented. The control signals are obtained using the inverter resonant current by means of a saturable transformer. Core saturation is used to control the required dead time between the control pulses on both switches. The turn-on time of one of the inverter switches is controlled to provide proper cathode preheating during the lamp ignition process. No special integrated circuits are required to control the ballast and the total number of components is minimized. Analysis and basic design of phase cut dimmer.

Keywords: MOSFET dimmer, PIC 16F877A, voltage regulator, bridge rectifier

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Authors: Manuel Meranza-Castillon, Rolando Diaz-Castillo, Adrian Arellano-Delgado, Cesar Cruz-Hernandez, Rosa Martha Lopez-Gutierrez

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In this work, we deal with experimental network synchronization of chaotic nodes with different topologies. Our approach is based on complex system theory, and we use a master-slave configuration to couple the nodes in the networks. In particular, we design and implement electronically complex dynamical networks composed by nine coupled chaotic Chua’s circuits with topologies: in nearest-neighbor, small-world, open ring, star, and global. Also, network synchronization is evaluated according to a particular coupling strength for each topology. This study is important by the possible applications to private transmission of information in a chaotic communication network of multiple users.

Keywords: complex networks, Chua's circuit, experimental synchronization, multiple users

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Authors: Bilal Tebboub, AmelLabbani

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This article introduces a compact sensor based on high-transmission, high-sensitivity two-dimensional photonic crystals. The photonic crystal consists of a square network of silicon rods in the air. The sensor is composed of two waveguide couplers and a microcavity designed for monitoring the percentage of hydrogen in the air and identifying gas types. Through the Finite-Difference Time-Domain (FDTD) method, we demonstrate that the sensor's resonance wavelength is contingent upon changes in the gas refractive index. We analyze transmission spectra, quality factors, and sensor sensitivity. The sensor exhibits a notable quality factor and a sensitivity value of 1374 nm/RIU. Notably, the sensor's compact structure occupies an area of 74.5 μm2, rendering it suitable for integrated optical circuits.

Keywords: 2-D photonic crystal, sensitivity, F.D.T.D method, label-free biosensing

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Authors: R. A. Qawasma, F. M. Haddad, H. O. Salhab

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Hemodialysis is a life-preserving treatment for a number of patients with kidney failure. The standard procedure of hemodialysis is three times a week during the hemodialysis procedure, the patient usually suffering from many inconvenient, exhausting feeling and effect on the heart and cardiovascular system are the most common signs. This paper provides a solution to reduce the previous problems by designing a wearable artificial kidney (WAK) taking in consideration a minimization the size of the dialysis machine. The WAK system consists of two circuits: blood circuit and dialysate circuit. The blood from the patient is filtered in the dialyzer before returning back to the patient. Several parameters using an advanced microcontroller and array of sensors. WAK equipped with visible and audible alarm system to aware the patients if there is any problem.

Keywords: artificial kidney, home dialysis, renal failure, wearable kidney

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Authors: Tomasz Robert Kuczerski

Abstract:

The high complexity of the algorithm of the autonomous tandem detonator system creates an optimization problem due to the parallel operation of several machine states of the system. Many years of experience and classic analyses have led to a partially optimized model. Limitations on the energy resources of this class of autonomous systems make it necessary to search for more effective methods of optimisation. The use of the Quantum Approximate Optimization Algorithm (QAOA) in these studies shows the most promising results. With the help of multiple evaluations of several qubit quantum circuits, proper results of variable parameter optimization were obtained. In addition, it was observed that the increase in the number of assessments does not result in further efficient growth due to the increasing complexity of optimising variables. The tests confirmed the effectiveness of the QAOA optimization method.

Keywords: algorithm analysis, autonomous system, quantum optimization, tandem detonator

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Authors: Hussein Shaman

Abstract:

This study introduces an innovative design for an RF phase shifter that can maintain a consistent phase shift across a broad spectrum of frequencies. The proposed design integrates an adaptive control system into a reflective-type phase shifter, typically showing frequency-related variations. Adjusting the DC voltage according to the frequency ensures a more reliable phase shift across the frequency span of operation. In contrast, conventional frequency-dependent reflective-type phase shifters may exhibit significant fluctuations in phase shifts exceeding 60 degrees in the same bandwidth. The proposed phase shifter is configured to deliver a 90-degree operation with an expected deviation of around 15 degrees. The fabrication of the phase shifter and adaptive control circuit has been verified through experimentation, with the measured outcomes aligning with the simulation results.

Keywords: phase shifter, adaptive control, varactors, electronic circuits.

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Authors: Mouna Abarkan, Abdelillah Byou, Nacer M'Sirdi, El Hossain Abarkan

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This paper presents the estimation of the state of charge of the battery using two types of observers. The battery model used is the combination of a voltage source, which is the open circuit battery voltage of a strength corresponding to the connection of resistors and electrolyte and a series of parallel RC circuits representing charge transfer phenomena and diffusion. An adaptive observer applied to this model is proposed, this observer to estimate the battery state of charge of the battery is based on EFK and sliding mode that is known for their robustness and simplicity implementation. The results are validated by simulation under MATLAB/Simulink and implemented in Arduino-LabView.

Keywords: model of the battery, adaptive sliding mode observer, the EFK observer, estimation of state of charge, SOC, implementation in Arduino/LabView

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Authors: Marcin Sowa

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The paper discusses the subinterval-based numerical method for fractional derivative computations. It is now referred to by its acronym – SubIval. The basis of the method is briefly recalled. The ability of the method to be applied in time stepping solvers is discussed. The possibility of implementing a time step size adaptive solver is also mentioned. The solver is tested on a transient circuit example. In order to display the accuracy of the solver – the results have been compared with those obtained by means of a semi-analytical method called gcdAlpha. The time step size adaptive solver applying SubIval has been proven to be very accurate as the results are very close to the referential solution. The solver is currently able to solve FDE (fractional differential equations) with various derivative orders for each equation and any type of source time functions.

Keywords: numerical method, SubIval, fractional calculus, numerical solver, circuit analysis

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Authors: Mohammad Arif Sobhan Bhuiyan, Zainal Abidin Nordin, Mamun Bin Ibne Reaz

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A compact and power efficient high performance Voltage Controlled Oscillator (VCO) is a must in analog and digital circuits especially in the communication system, but the best trade-off among the performance parameters is a challenge for researchers. In this paper, a design of a compact 3-stage differential voltage controlled ring oscillator (VCRO) with low phase noise, low power and higher tuning bandwidth is proposed in 0.18 µm CMOS technology. The VCRO is designed with symmetric load and positive feedback techniques to achieve higher gain and minimum delay. The proposed VCRO can operate at tuning range of 3.9-5.0 GHz at 1.6 V supply voltage. The circuit consumes only 1.0757 mW of power and produces -129 dbc/Hz. The total active area of the proposed VCRO is only 11.74 x 37.73 µm2. Such a VCO can be the best choice for compact and low-power RF applications.

Keywords: CMOS, VCO, VCRO, oscillator

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Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Dawit Burusie Abdi, Mamidala Jagadesh Kumar

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In this paper, using 2D TCAD simulations, the application of a dual material gate (DMG) for suppressing ambipolar conduction in a tunnel field effect transistor (TFET) is demonstrated. Using the proposed DMG concept, the ambipolar conduction can be effectively suppressed even if the drain doping is as high as that of the source doping. Achieving this symmetrical doping, without the ambipolar conduction in TFETs, gives the advantage of realizing both n-type and p-type devices with the same doping sequences. Furthermore, the output characteristics of the DMG TFET exhibit a good saturation when compared to that of the gate-drain underlap approach. This improved behavior of the DMG TFET makes it a good candidate for inverter based logic circuits.

Keywords: dual material gate, suppressing ambipolar current, symmetrically doped TFET, tunnel FETs, PNPN TFET

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Authors: Daniel Bülz, Franziska Lüttich, Sreetama Banerjee, Georgeta Salvan, Dietrich R. T. Zahn

Abstract:

For the development of electronics, organic semiconductors are of great interest due to their adjustable optical and electrical properties. Especially for spintronic applications they are interesting because of their weak spin scattering, which leads to longer spin life times compared to inorganic semiconductors. It was shown that some organic materials change their resistance if an external magnetic field is applied. Pentacene is one of the materials which exhibit the so called photoinduced magnetoresistance which results in a modulation of photocurrent when varying the external magnetic field. Also the soluble derivate of pentacene, the 6,13-bis (triisopropylsilylethynyl)-pentacene (TIPS-pentacene) exhibits the same negative magnetoresistance. Aiming for simpler fabrication processes, in this work, we compare TIPS-pentacene organic field effect transistors (OFETs) made from solution with those fabricated by thermal evaporation. Because of the different processing, the TIPS-pentacene thin films exhibit different morphologies in terms of crystal size and homogeneity of the substrate coverage. On the other hand, the interface treatment is known to have a high influence on the threshold voltage, eliminating trap states of silicon oxide at the gate electrode and thereby changing the electrical switching response of the transistors. Therefore, we investigate the influence of interface treatment using octadecyltrichlorosilane (OTS) or using a simple cleaning procedure with acetone, ethanol, and deionized water. The transistors consist of a prestructured OFET substrates including gate, source, and drain electrodes, on top of which TIPS-pentacene dissolved in a mixture of tetralin and toluene is deposited by drop-, spray-, and spin-coating. Thereafter we keep the sample for one hour at a temperature of 60 °C. For the transistor fabrication by thermal evaporation the prestructured OFET substrates are also kept at a temperature of 60 °C during deposition with a rate of 0.3 nm/min and at a pressure below 10-6 mbar. The OFETs are characterized by means of optical microscopy in order to determine the overall quality of the sample, i.e. crystal size and coverage of the channel region. The output and transfer characteristics are measured in the dark and under illumination provided by a white light LED in the spectral range from 450 nm to 650 nm with a power density of (8±2) mW/cm2.

Keywords: organic field effect transistors, solution processed, surface treatment, TIPS-pentacene

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