Search results for: voltage and current control
19053 Single Ion Transport with a Single-Layer Graphene Nanopore
Authors: Vishal V. R. Nandigana, Mohammad Heiranian, Narayana R. Aluru
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Graphene material has found tremendous applications in water desalination, DNA sequencing and energy storage. Multiple nanopores are etched to create opening for water desalination and energy storage applications. The nanopores created are of the order of 3-5 nm allowing multiple ions to transport through the pore. In this paper, we present for the first time, molecular dynamics study of single ion transport, where only one ion passes through the graphene nanopore. The diameter of the graphene nanopore is of the same order as the hydration layers formed around each ion. Analogous to single electron transport resulting from ionic transport is observed for the first time. The current-voltage characteristics of such a device are similar to single electron transport in quantum dots. The current is blocked until a critical voltage, as the ions are trapped inside a hydration shell. The trapped ions have a high energy barrier compared to the applied input electrical voltage, preventing the ion to break free from the hydration shell. This region is called “Coulomb blockade region”. In this region, we observe zero transport of ions inside the nanopore. However, when the electrical voltage is beyond the critical voltage, the ion has sufficient energy to break free from the energy barrier created by the hydration shell to enter into the pore. Thus, the input voltage can control the transport of the ion inside the nanopore. The device therefore acts as a binary storage unit, storing 0 when no ion passes through the pore and storing 1 when a single ion passes through the pore. We therefore postulate that the device can be used for fluidic computing applications in chemistry and biology, mimicking a computer. Furthermore, the trapped ion stores a finite charge in the Coulomb blockade region; hence the device also acts a super capacitor.Keywords: graphene nanomembrane, single ion transport, Coulomb blockade, nanofluidics
Procedia PDF Downloads 32219052 A Comparative Study on Electrical Characteristics of Au/n-SiC structure, with and Without Zn-Doped PVA Interfacial Layer at Room Temperature
Authors: M. H. Aldahrob, A. Kokce, S. Altindal, H. E. Lapa
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In order to obtain the detailed information about the effect of (Zn-doped PVA) interfacial layer, surface states (Nss) and series resistance (Rs) on electrical characteristics, both Au/n- type 4H-SiC (MS) with and without (Zn doped PVA) interfacial layer were fabricated to compare. The main electrical parameters of them were investigated using forward and reverse bias current-voltage (I-V), capacitance-voltage (C-V) and conductance –voltage (G/W –V) measurements were performed at room temperature. Experimental results show that the value of ideality factor (n), zero –bias barrier height (ΦBo), Rs, rectifier rate (RR=IF/IR) and the density of Nss are strong functions interfacial layer and applied bias voltage. The energy distribution profile of Nss was obtained from forward bias I-V data by taking into account voltage dependent effective BH (ΦBo) and ideality factor (n(V)). Voltage dependent profile of Rs was also obtained both by using Ohm’s law and Nicollian and Brew methods. The other main diode parameters such as the concentration of doping donor atom (ND), Fermi energy level (EF).BH (ΦBo), depletion layer with (WD) were obtained by using the intercept and slope of the reverse bias C-2 vs V plots. It was found that (Zn-doped PVA) interfacial layer lead to a quite decrease in the values Nss, Rs and leakage current and increase in shunt resistance (Rsh) and RR. Therefore, we can say that the use of thin (Zn-doped PVA) interfacial layer can quite improved the performance of MS structure.Keywords: interfacial polymer layer, thickness dependence, electric and dielectric properties, series resistance, interface state
Procedia PDF Downloads 24819051 A Low Phase Noise CMOS LC Oscillator with Tail Current-Shaping
Authors: Amir Mahdavi
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In this paper, a circuit topology of voltage-controlled oscillators (VCO) which is suitable for ultra-low-phase noise operations is introduced. To do so, a new low phase noise cross-coupled oscillator by using the general topology of cross-coupled oscillator and adding a differential stage for tail current shaping is designed. In addition, a tail current shaping technique to improve phase noise in differential LC VCOs is presented. The tail current becomes large when the oscillator output voltage arrives at the maximum or minimum value and when the sensitivity of the output phase to the noise is the smallest. Also, the tail current becomes small when the phase noise sensitivity is large. The proposed circuit does not use extra power and extra noisy active devices. Furthermore, this topology occupies small area. Simulation results show the improvement in phase noise by 2.5dB under the same conditions and at the carrier frequency of 1 GHz for GSM applications. The power consumption of the proposed circuit is 2.44 mW and the figure of merit (FOM) with -192.2 dBc/Hz is achieved for the new oscillator.Keywords: LC oscillator, low phase noise, current shaping, diff mode
Procedia PDF Downloads 60119050 A CMOS-Integrated Hall Plate with High Sensitivity
Authors: Jin Sup Kim, Min Seo
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An improved cross-shaped hall plate with high sensitivity is described in this paper. Among different geometries that have been simulated and measured using Helmholtz coil. The paper describes the physical hall plate design and implementation in a 0.18-µm CMOS technology. In this paper, the biasing is a constant voltage mode. In the voltage mode, magnetic field is converted into an output voltage. The output voltage is typically in the order of micro- to millivolt and therefore, it must be amplified before being transmitted to the outside world. The study, design and performance optimization of hall plate has been carried out with the COMSOL Multiphysics. It is used to estimate the voltage distribution in the hall plate with and without magnetic field and to optimize the geometry. The simulation uses the nominal bias current of 1mA. The applied magnetic field is in the range from 0 mT to 20 mT. Measured results of the one structure over the 10 available samples show for the best sensitivity of 2.5 %/T at 20mT.Keywords: cross-shaped hall plate, sensitivity, CMOS technology, Helmholtz coil
Procedia PDF Downloads 19719049 Noise and Thermal Analyses of Memristor-Based Phase Locked Loop Integrated Circuit
Authors: Naheem Olakunle Adesina
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The memristor is considered as one of the promising candidates for mamoelectronic engineering and applications. Owing to its high compatibility with CMOS, nanoscale size, and low power consumption, memristor has been employed in the design of commonly used circuits such as phase-locked loop (PLL). In this paper, we designed a memristor-based loop filter (LF) together with other components of PLL. Following this, we evaluated the noise-rejection feature of loop filter by comparing the noise levels of input and output signals of the filter. Our SPICE simulation results showed that memristor behaves like a linear resistor at high frequencies. The result also showed that loop filter blocks the high-frequency components from phase frequency detector so as to provide a stable control voltage to the voltage controlled oscillator (VCO). In addition, we examined the effects of temperature on the performance of the designed phase locked loop circuit. A critical temperature, where there is frequency drift of VCO as a result of variations in control voltage, is identified. In conclusion, the memristor is a suitable choice for nanoelectronic systems owing to a small area, low power consumption, dense nature, high switching speed, and endurance. The proposed memristor-based loop filter, together with other components of the phase locked loop, can be designed using memristive emulator and EDA tools in current CMOS technology and simulated.Keywords: Fast Fourier Transform, hysteresis curve, loop filter, memristor, noise, phase locked loop, voltage controlled oscillator
Procedia PDF Downloads 18619048 Voltage Stability Assessment and Enhancement Using STATCOM -A Case Study
Authors: Puneet Chawla, Balwinder Singh
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Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper, P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton-Raphson method. Using Q-V curves, the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.Keywords: voltage stability, reactive power, power flow, weakest bus, STATCOM
Procedia PDF Downloads 51519047 Analysis and Design of Single Switch Mosfet Dimmer for AC Driven Lamp
Authors: S.Pandeeswari, Raju Padma
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In this paper a new solution to implement and control single-stage electronic ballast based on the integration of a buck-boost power factor correction stage and a half bridge resonant inverter is presented. The control signals are obtained using the inverter resonant current by means of a saturable transformer. Core saturation is used to control the required dead time between the control pulses on both switches. The turn-on time of one of the inverter switches is controlled to provide proper cathode preheating during the lamp ignition process. No special integrated circuits are required to control the ballast and the total number of components is minimized. Analysis and basic design of phase cut dimmer.Keywords: MOSFET dimmer, PIC 16F877A, voltage regulator, bridge rectifier
Procedia PDF Downloads 38019046 Internal Node Stabilization for Voltage Sense Amplifiers in Multi-Channel Systems
Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn
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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.Keywords: voltage sense amplifier, voltage transition, node stabilization, biasing circuits
Procedia PDF Downloads 47919045 High-Frequency Full-Bridge Isolated DC-DC Converter for Fuel Cell Power Generation Systems
Authors: Nabil A. Ahmed
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DC-DC converters are necessary to interface low-voltage fuel cell power generation systems to a higher voltage DC bus system. A system and method for generating a regulated output power from fuel cell power generation systems is proposed in this paper, this includes a soft-switching isolated DC-DC converter to reduce the idling and circulating currents. The system incorporates a high-frequency center tap transformer link DC-DC converter using secondary-side soft switching control. Snubber capacitors including the parasitic capacitance of the switching devices and the transformer leakage inductance are utilized to achieve zero-voltage switching (ZVS) in the primary side of the high-frequency transformer. Therefore, no extra resonant components are required for ZVS. The inherent soft-switching capability allows high power density, efficient power conversion, and compact packaging. A prototype rated at 6.5 kW is proposed and simulated. Simulation results confirmed a wide range of soft-switching operation and consequently high conversion efficiency will be achieved.Keywords: secondary-side, phase-shift, high-frequency transformer, zero voltage, zero current, soft switching operation, switching losses
Procedia PDF Downloads 31119044 Low Trigger Voltage Silicon Controlled Rectifier Stacking Structure with High Holding Voltage for High Voltage Applications
Authors: Kyoung-Il Do, Jun-Geol Park, Hee-Guk Chae, Jeong-Yun Seo, Yong-Seo Koo
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A SCR stacking structure is proposed to have improved Latch-up immunity. In comparison with conventional SCR (Silicon Controlled Rectifier), the proposed Electrostatic Discharge (ESD) protection circuit has a lower trigger characteristic by using the LVTSCR (Low Voltage Trigger) structure. Also the proposed ESD protection circuit has improved Holding Voltage Characteristic by using N-stack technique. These characteristics enable to have latch-up immunity in operating conditions. The simulations are accomplished by using the Synopsys TCAD. It has a trigger voltage of 8.9V and a holding voltage of 1.8V in a single structure. And when applying the stack technique, 2-stack has the holding voltage of 3.8V and 3-stack has the holding voltage of 5.1 V.Keywords: electrostatic discharge (ESD), low voltage trigger silicon controlled rectifier (LVTSCR), MVTSCR, power clamp, silicon controlled rectifier (SCR), latch-up
Procedia PDF Downloads 45919043 Thermal and Dielectric Breakdown Criterium for Low Voltage Switching Devices
Authors: Thomas Merciris, Mathieu Masquere, Yann Cressault, Pascale Petit
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The goal of an alternative current (AC) switching device is to allow the arc (created during the opening phase of the contacts) to extinguish at the current zero. The plasma temperature rate of cooling down, the electrical characteristic of the arc (current-voltage), and the rise rate of the transient recovery voltage (TRV) are critical parameters which influence the performance of a switching device. To simulate the thermal extinction of the arc and to obtain qualitative data on the processes responsible for this phenomenon, a 1D MHD fluid model in the air was developed and coupled to an external electric circuit. After thermal extinction, the dielectric strength of the hot air (< 4kK) was then estimated by the Bolsig+ software and the critical electric fields method with the temperature obtained by the MHD simulation. The influence of copper Cu and silver Ag vapors was investigated on the thermal and dielectric part of the simulation with various current forms (100A to 1kA). Finally, those values of dielectric strength have been compared to the experimental values obtained in the case of two separating silver contacts. The preliminary results seem to indicate the dielectric strength after multiples hundreds of microseconds is the same order of magnitude as experimentally found.Keywords: MHD simulation, dielectric recovery, Bolsig+, silver vapors, copper vapors, breakers, electric arc
Procedia PDF Downloads 11619042 Stabilization Technique for Multi-Inputs Voltage Sense Amplifiers in Node Sharing Converters
Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn
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This paper discusses the undesirable charge transfer through the parasitic capacitances of the input transistors in a multi-inputs voltage sense amplifier. Its intrinsic rail-to-rail voltage transitions at the output nodes inevitably disturb the input sides through the capacitive coupling between the outputs and inputs. Then, it can possible degrade the stabilities of the reference voltage levels. Moreover, it becomes more serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the overall systems. In order to alleviate the internal node voltage transition, the internal node stabilization techniques are proposed. It achieves 45% and 40% improvements for node stabilization and input referred disturbance, respectively.Keywords: voltage sense amplifier, multi-inputs, voltage transition, node stabilization, biasing circuits
Procedia PDF Downloads 56519041 Ultra-High Voltage Energization of Electrostatic Precipitators for Coal Fired Boilers
Authors: Mads Kirk Larsen
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Strict air pollution control is today high on the agenda world-wide. By reducing the particular emission, not only the mg/Nm3 will be reduced – also parts of mercury and other hazardous matters attached to the particles will be reduced. Furthermore, it is possible to catch the fine particles (PM2.5). For particulate control, the precipitators are still the preferred choice and much efforts have been done to improve the efficiencies. Many ESP’s have seen electrical upgrading by changing the traditional 1 phase power system into either 3 phase or SMPS (High Frequency) units. However, there exist a 4th type of power supply – the pulse type. This is unfortunately widely unknown, but may be of great benefit to power plants. The FLSmidth type is called COROMAX® and it is a high voltage pulse generator for precipitators using a semiconductor switch operating at medium potential. The generated high voltage pulses have rated amplitude of 80 kV and duration of 75 μs and are superimposed on a variable base voltage of 60 kV rated voltage. Hereby, achieving a peak voltage of 140 kV. COROMAX® has the ability to increase the voltage beyond the natural spark limit inside the precipitator. Voltage levels may often be twice as high after installation of COROMAX®. Hereby also the migration velocity increases and thereby the efficiency. As the collection efficiency is proportional to the voltage peak and mean values, this also increases the collection efficiency of the fine particles where test has shown 80% removal of particles less than 0.07 micron. Another great advantage is the indifference to back-corona. Simultaneously with emission reduction, the power consumption will also be reduced. Another great advantage of the COROMAX® system is that the emission can be improved without the need to change the internal parts or enlarge the ESP. Recently, more than 150 units have been installed in China, where emissions have been reduced to ultra-low levels.Keywords: eleectrostatic precipitator, high resistivity dust, micropulse energization, particulate removal
Procedia PDF Downloads 30019040 Various Modification of Electrochemical Barrier Layer Thinning of Anodic Aluminum Oxide
Authors: W. J. Stępniowski, W. Florkiewicz, M. Norek, M. Michalska-Domańska, E. Kościuczyk, T. Czujko
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In this paper, two options of anodic alumina barrier layer thinning have been demonstrated. The approaches varied with the duration of the voltage step. It was found that too long step of the barrier layer thinning process leads to chemical etching of the nanopores on their top. At the bottoms pores are not fully opened what is disadvantageous for further applications in nanofabrication. On the other hand, while the duration of the voltage step is controlled by the current density (value of the current density cannot exceed 75% of the value recorded during previous voltage step) the pores are fully opened. However, pores at the bottom obtained with this procedure have smaller diameter, nevertheless this procedure provides electric contact between the bare aluminum (substrate) and electrolyte, what is suitable for template assisted electrodeposition, one of the most cost-efficient synthesis method in nanotechnology.Keywords: anodic aluminum oxide, anodization, barrier layer thinning, nanopores
Procedia PDF Downloads 32219039 Analysis of Stacked SCR-Based ESD Protection Circuit with Low Trigger Voltage and Latch-Up Immunity
Authors: Jun-Geol Park, Kyoung-Il Do, Min-Ju Kwon, Kyung-Hyun Park, Yong-Seo Koo
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In this paper, we proposed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for latch-up immunity. The proposed circuit has a lower trigger voltage and a higher holding voltage characteristic by using the zener diode structure. These characteristics prevent latch-up problem in normal operating conditions. The proposed circuit was analyzed to figure out the electrical characteristics by the variations of design parameters D1, D2 and stack technology to obtain the n-fold electrical characteristics. The simulations are accomplished by using the Synopsys TCAD simulator. When using the stack technology, 2-stack has the holding voltage of 6.9V and 3-stack has the holding voltage of 10.9V.Keywords: ESD, SCR, trigger voltage, holding voltage
Procedia PDF Downloads 52519038 Analysis of an High Voltage Direct Current (HVDC) Connection Using a Real-Time Simulator Under Various Disturbances
Authors: Mankour Mohamed, Miloudi Mohamed
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A thorough and accurate simulation is necessary for the study of a High Voltage Direct Current (HVDC) link system during various types of disturbances, including internal faults on both converters, either on the rectifier or on the inverter, as well as external faults, such as AC or DC faults on both converter sides inside the DC link party. In this study, we examine how an HVDC inverter responds to three different types of failures, including faults at the inverter valve, system control faults, and single-phase-to-ground AC faults at the sending end of the inverter side. As this phenomenon represents the most frequent problem that may affect inverter valves, particularly those based on thyristor valves (LCC (line-Commutated converter)), it is more precise to explore which circumstance generates and raises the commutation failure on inverter valves. Because of the techniques used to accelerate the simulation, digital real-time simulators are now the most potent tools that provide simulation results. The real-time-lab RT-LAB platform HYPERSIM OP-5600 is used to implement the Simulation in the Loop (SIL) technique, which is used to validate the results. It is demonstrated how to recover from both the internal faults and the AC problem. The simulation findings show how crucial a role the control system plays in fault recovery.Keywords: hypersim simulator, HVDC systems, mono-polar link, AC faults, misfiring faults
Procedia PDF Downloads 9419037 Continuous-Time Analysis And Performance Assessment For Digital Control Of High-Frequency Switching Synchronous Dc-Dc Converter
Authors: Rihab Hamdi, Amel Hadri Hamida, Ouafae Bennis, Sakina Zerouali
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This paper features a performance analysis and robustness assessment of a digitally controlled DC-DC three-cell buck converter associated in parallel, operating in continuous conduction mode (CCM), facing feeding parameters variation and loads disturbance. The control strategy relies on the continuous-time with an averaged modeling technique for high-frequency switching converter. The methodology is to modulate the complete design procedure, in regard to the existence of an instantaneous current operating point for designing the digital closed-loop, to the same continuous-time domain. Moreover, the adopted approach is to include a digital voltage control (DVC) technique, taking an account for digital control delays and sampling effects, which aims at improving efficiency and dynamic response and preventing generally undesired phenomena. The results obtained under load change, input change, and reference change clearly demonstrates an excellent dynamic response of the proposed technique, also as provide stability in any operating conditions, the effectiveness is fast with a smooth tracking of the specified output voltage. Simulations studies in MATLAB/Simulink environment are performed to verify the concept.Keywords: continuous conduction mode, digital control, parallel multi-cells converter, performance analysis, power electronics
Procedia PDF Downloads 15119036 Designing Equivalent Model of Floating Gate Transistor
Authors: Birinderjit Singh Kalyan, Inderpreet Kaur, Balwinder Singh Sohi
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In this paper, an equivalent model for floating gate transistor has been proposed. Using the floating gate voltage value, capacitive coupling coefficients has been found at different bias conditions. The amount of charge present on the gate has been then calculated using the transient models of hot electron programming and Fowler-Nordheim Tunnelling. The proposed model can be extended to the transient conditions as well. The SPICE equivalent model is designed and current-voltage characteristics and Transfer characteristics are comparatively analysed. The dc current-voltage characteristics, as well as dc transfer characteristics, have been plotted for an FGMOS with W/L=0.25μm/0.375μm, the inter-poly capacitance of 0.8fF for both programmed and erased states. The Comparative analysis has been made between the present model and capacitive coefficient coupling methods which were already available.Keywords: FGMOS, floating gate transistor, capacitive coupling coefficient, SPICE model
Procedia PDF Downloads 54519035 Design and Analysis of a Piezoelectric-Based AC Current Measuring Sensor
Authors: Easa Ali Abbasi, Akbar Allahverdizadeh, Reza Jahangiri, Behnam Dadashzadeh
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Electrical current measurement is a suitable method for the performance determination of electrical devices. There are two contact and noncontact methods in this measuring process. Contact method has some disadvantages like having direct connection with wire which may endamage the system. Thus, in this paper, a bimorph piezoelectric cantilever beam which has a permanent magnet on its free end is used to measure electrical current in a noncontact way. In mathematical modeling, based on Galerkin method, the governing equation of the cantilever beam is solved, and the equation presenting the relation between applied force and beam’s output voltage is presented. Magnetic force resulting from current carrying wire is considered as the external excitation force of the system. The results are compared with other references in order to demonstrate the accuracy of the mathematical model. Finally, the effects of geometric parameters on the output voltage and natural frequency are presented.Keywords: cantilever beam, electrical current measurement, forced excitation, piezoelectric
Procedia PDF Downloads 23219034 Suitable Tuning Method Selection for PID Controller Used in Digital Excitation System of Brushless Synchronous Generator
Authors: Deepak M. Sajnekar, S. B. Deshpande, R. M. Mohril
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At present many rotary excitation control system are using analog type of Automatic Voltage Regulator which now started to replace with the digital automatic voltage regulator which is provided with PID controller and tuning of PID controller is a challenging task. The cases where digital excitation control system is used tuning of PID controller are still carried out by pole placement method. Tuning of PID controller used for static excitation control system is not challenging because it does not involve exciter time constant. This paper discusses two methods of tuning PID controller i.e. Pole placement method and pole zero cancellation method. GUI prepared for both the methods on the platform of MATLAB. Using this GUI, performance results and time required for tuning for both the methods are compared. Sensitivity of the methods is also presented with parameter variation like loop gain ‘K’ and exciter time constant ‘te’.Keywords: digital excitation system, automatic voltage regulator, pole placement method, pole zero cancellation method
Procedia PDF Downloads 67819033 Frequency Control of Self-Excited Induction Generator Based Microgrid during Transition from Grid Connected to Island Mode
Authors: Azhar Ulhaq, Zubair Yameen, Almas Anjum
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Frequency behaviour of self-excited induction generator (SEIG) wind turbines during control mode transition from grid connected to islanded mode is studied in detail. A robust control scheme for frequency regulation based on combined action of STATCOM, energy storage system (ESS) and pitch angle control for wind powered microgrid (MG) is proposed. Suggested STATCOM controller comprises a 3-phase voltage source converter (VSC) that contains insulated gate bipolar transistors (IGBTs) based pulse width modulation (PWM) inverters along with a capacitor bank. Energy storage system control consists of current controlled voltage source converter and battery bank. Both of them acting simultaneously after detection of island compensates for reactive and active power demands, thus regulating frequency at point of common coupling (PCC) and also improves load stability. STATCOM integrates at point of common coupling and ESS is connected to microgrids main bus. Results reveal that proposed control not only stabilizes frequency during transition duration but also minimizes sudden frequency imbalance caused by load variation or wind intermittencies in islanded operation. System is investigated with and without suggested control scheme. The efficacy of proposed strategy has been verified by simulation in MATLAB/Simulink.Keywords: energy storage system, island, wind, STATCOM, self-excited induction generator, SEIG, transient
Procedia PDF Downloads 15419032 Power Quality Audit Using Fluke Analyzer
Authors: N. Ravikumar, S. Krishnan, B. Yokeshkumar
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In present days, the power quality issues are increases due to non-linear loads like fridge, AC, washing machines, induction motor, etc. This power quality issues will affects the output voltages, output current, and output power of the total performance of the generator. This paper explains how to test the generator using the Fluke 435 II series power quality analyser. This Fluke 435 II series power quality analyser is used to measure the voltage, current, power, energy, total harmonic distortion (THD), current harmonics, voltage harmonics, power factor, and frequency. The Fluke 435 II series power quality analyser have several advantages. They are i) it will records output in analog and digital format. ii) the fluke analyzer will records at every 0.25 sec. iii) it will also measure all the electrical parameter at a time.Keywords: THD, harmonics, power quality, TNEB, Fluke 435
Procedia PDF Downloads 17719031 AC Electro-Kinetics, Bipolar Current and Concentration-Polarization in a Microchannel-Nafion Membrane System
Authors: Sinwook Park, Gilad Yossifon
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The presence of a floating electrode array located within the depletion layer formed due to concentration-polarization (CP) across a microchannel-membrane device, produces not only induced-charge electro-osmosis (ICEO) vortex and but also a bipolar current resulting from faradaic reactions. It has been shown that there exists an optimal SiO2 layer thickness of ~50nm which is sufficient to suppress bipolar currents (at least up to 5V applied voltage) but still enables ICEO vortices that stir the depletion layer, thereby affecting its I-V response. This effect is pronounced beyond the limiting current where the existence of the depletion layer results in increased local electric field due to decreased solution conductivity. This comprehensive study of the interaction of embedded electrodes with the induced CP in microchannel-perm selective medium systems, allows one to choose the thickness of the thin dielectric coating to either enhance the mixing as a means to control the diffuse layer, or suppress it, for example, in the case where electrodes are intended for local measurements of the solution conductivity with minimal invasion. In addition, the use of alternating-current electro-osmosis by activating electrodes results in further enhancement of the fluid stirring and opens new routes for on-demand spatiotemporal control of the CP length. In addition, the use of embedded heaters within the depletion layer generates electro-thermal vortices that in turn also control the CP length.Keywords: AC electrokinetics, microchannel, concentration-polarization, bipolar current
Procedia PDF Downloads 49719030 Behavior of Current in a Semiconductor Nanostructure under Influence of Embedded Quantum Dots
Authors: H. Paredes Gutiérrez, S. T. Pérez-Merchancano
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Motivated by recent experimental and theoretical developments, we investigate the influence of embedded quantum dot (EQD) of different geometries (lens, ring and pyramidal) in a double barrier heterostructure (DBH). We work with a general theory of quantum transport that accounts the tight-binding model for the spin dependent resonant tunneling in a semiconductor nanostructure, and Rashba spin orbital to study the spin orbit coupling. In this context, we use the second quantization theory for Rashba effect and the standard Green functions method. We calculate the current density as a function of the voltage without and in the presence of quantum dots. In the second case, we considered the size and shape of the quantum dot, and in the two cases, we worked considering the spin polarization affected by external electric fields. We found that the EQD generates significant changes in current when we consider different morphologies of EQD, as those described above. The first thing shown is that the current decreases significantly, such as the geometry of EQD is changed, prevailing the geometrical confinement. Likewise, we see that the current density decreases when the voltage is increased, showing that the quantum system studied here is more efficient when the morphology of the quantum dot changes.Keywords: quantum semiconductors, nanostructures, quantum dots, spin polarization
Procedia PDF Downloads 27319029 Electrochemical Studies of Si, Si-Ge- and Ge-Air Batteries
Authors: R. C. Sharma, Rishabh Bansal, Prajwal Menon, Manoj K. Sharma
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Silicon-air battery is highly promising for electric vehicles due to its high theoretical energy density (8470 Whkg⁻¹) and its discharge products are non-toxic. For the first time, pure silicon and germanium powders are used as anode material. Nickel wire meshes embedded with charcoal and manganese dioxide powder as cathode and concentrated potassium hydroxide is used as electrolyte. Voltage-time curves have been presented in this study for pure silicon and germanium powder and 5% and 10% germanium with silicon powder. Silicon powder cell assembly gives a stable voltage of 0.88 V for ~20 minutes while Si-Ge provides cell voltage of 0.80-0.76 V for ~10-12 minutes, and pure germanium cell provides cell voltage 0.80-0.76 V for ~30 minutes. The cell voltage is higher for concentrated (10%) sodium hydroxide solution (1.08 V) and it is stable for ~40 minutes. A sharp decrease in cell voltage beyond 40 min may be due to rapid corrosion.Keywords: Silicon-air battery, Germanium-air battery, voltage-time curve, open circuit voltage, Anodic corrosion
Procedia PDF Downloads 23819028 Detection of Resistive Faults in Medium Voltage Overhead Feeders
Authors: Mubarak Suliman, Mohamed Hassan
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Detection of downed conductors occurring with high fault resistance (reaching kilo-ohms) has always been a challenge, especially in countries like Saudi Arabia, on which earth resistivity is very high in general (reaching more than 1000 Ω-meter). The new approaches for the detection of resistive and high impedance faults are based on the analysis of the fault current waveform. These methods are still under research and development, and they are currently lacking security and dependability. The other approach is communication-based solutions which depends on voltage measurement at the end of overhead line branches and communicate the measured signals to substation feeder relay or a central control center. However, such a detection method is costly and depends on the availability of communication medium and infrastructure. The main objective of this research is to utilize the available standard protection schemes to increase the probability of detection of downed conductors occurring with a low magnitude of fault currents and at the same time avoiding unwanted tripping in healthy conditions and feeders. By specifying the operating region of the faulty feeder, use of tripping curve for discrimination between faulty and healthy feeders, and with proper selection of core balance current transformer (CBCT) and voltage transformers with fewer measurement errors, it is possible to set the pick-up of sensitive earth fault current to minimum values of few amps (i.e., Pick-up Settings = 3 A or 4 A, …) for the detection of earth faults with fault resistance more than (1 - 2 kΩ) for 13.8kV overhead network and more than (3-4) kΩ fault resistance in 33kV overhead network. By implementation of the outcomes of this study, the probability of detection of downed conductors is increased by the utilization of existing schemes (i.e., Directional Sensitive Earth Fault Protection).Keywords: sensitive earth fault, zero sequence current, grounded system, resistive fault detection, healthy feeder
Procedia PDF Downloads 11519027 Maximum Power Point Tracking for Small Scale Wind Turbine Using Multilayer Perceptron Neural Network Implementation without Mechanical Sensor
Authors: Piyangkun Kukutapan, Siridech Boonsang
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The article proposes maximum power point tracking without mechanical sensor using Multilayer Perceptron Neural Network (MLPNN). The aim of article is to reduce the cost and complexity but still retain efficiency. The experimental is that duty cycle is generated maximum power, if it has suitable qualification. The measured data from DC generator, voltage (V), current (I), power (P), turnover rate of power (dP), and turnover rate of voltage (dV) are used as input for MLPNN model. The output of this model is duty cycle for driving the converter. The experiment implemented using Arduino Uno board. This diagram is compared to MPPT using MLPNN and P&O control (Perturbation and Observation control). The experimental results show that the proposed MLPNN based approach is more efficiency than P&O algorithm for this application.Keywords: maximum power point tracking, multilayer perceptron netural network, optimal duty cycle, DC generator
Procedia PDF Downloads 32519026 Evaluation of a Method for the Virtual Design of a Software-based Approach for Electronic Fuse Protection in Automotive Applications
Authors: Dominic Huschke, Rudolf Keil
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New driving functionalities like highly automated driving have a major impact on the electrics/electronics architecture of future vehicles and inevitably lead to higher safety requirements. Partly due to these increased requirements, the vehicle industry is increasingly looking at semiconductor switches as an alternative to conventional melting fuses. The protective functionality of semiconductor switches can be implemented in hardware as well as in software. A current approach discussed in science and industry is the implementation of a model of the protected low voltage power cable on a microcontroller to calculate its temperature. Here, the information regarding the current is provided by the continuous current measurement of the semiconductor switch. The signal to open the semiconductor switch is provided by the microcontroller when a previously defined limit for the temperature of the low voltage power cable is exceeded. A setup for the testing of the described principle for electronic fuse protection of a low voltage power cable is built and successfullyvalidated with experiments afterwards. Here, the evaluation criterion is the deviation of the measured temperature of the low voltage power cable from the specified limit temperature when the semiconductor switch is opened. The analysis is carried out with an assumed ambient temperature as well as with a measured ambient temperature. Subsequently, the experimentally performed investigations are simulated in a virtual environment. The explicit focus is on the simulation of the behavior of the microcontroller with an implemented model of a low voltage power cable in a real-time environment. Subsequently, the generated results are compared with those of the experiments. Based on this, the completely virtual design of the described approach is assumed to be valid.Keywords: automotive wire harness, electronic fuse protection, low voltage power cable, semiconductor-based fuses, software-based validation
Procedia PDF Downloads 10519025 Preparation and Characterization of Hybrid Perovskite Enhanced with PVDF for Pressure Sensing
Authors: Mohamed E. Harb, Enas Moustafa, Shaker Ebrahim, Moataz Soliman
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In this paper pressure detectors were synthesized and characterized using hybrid perovskite/PVDF composites as an active layer. Methylammonium lead iodide (MAPbI₃) was synthesized from methylammonium iodide (MAI) (CH₃NH₃I) and lead iodide (PbI₂). Composites of perovskite/PVDF using different weight ratio were prepared as the active material. PVDF with weights percentages of 6%, 8%, and 10% was used. All prepared materials were investigated by x-ray diffraction (XRD), Fourier transforms infrared spectrum (FTIR) and scanning electron microscopy (SEM). A Versastat 4 Potentiostat Galvanostat instrument was used to perform the current-voltage characteristics of the fabricated sensors. The pressure sensors exhibited a voltage increase with applying different forces. Also, the current-voltage characteristics (CV) showed different effects with applying forces. So, the results showed a good pressure sensing performance.Keywords: perovskite semiconductor, hybrid perovskite, PVDF, Pressure sensing
Procedia PDF Downloads 20719024 Detection of Voltage Sag and Voltage Swell in Power Quality Using Wavelet Transforms
Authors: Nor Asrina Binti Ramlee
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Voltage sag, voltage swell, high-frequency noise and voltage transients are kinds of disturbances in power quality. They are also known as power quality events. Equipment used in the industry nowadays has become more sensitive to these events with the increasing complexity of equipment. This leads to the importance of distributing clean power quality to the consumer. To provide better service, the best analysis on power quality is very vital. Thus, this paper presents the events detection focusing on voltage sag and swell. The method is developed by applying time domain signal analysis using wavelet transform approach in MATLAB. Four types of mother wavelet namely Haar, Dmey, Daubechies, and Symlet are used to detect the events. This project analyzed real interrupted signal obtained from 22 kV transmission line in Skudai, Johor Bahru, Malaysia. The signals will be decomposed through the wavelet mothers. The best mother is the one that is capable to detect the time location of the event accurately.Keywords: power quality, voltage sag, voltage swell, wavelet transform
Procedia PDF Downloads 372