Search results for: analog output voltage

Authors: M. Shadmand, T. Enayaty Ahangar, S. Kazemi

Abstract:

Insulation system of electrical machineries is the most critical point for their durability. Depending on generator nominal voltage, its insulation system is designed. In this research, a new stator insulation system is designed by new type of mica tapes which will consequently enables us to decrease the nominal ground-wall insulation thickness for the same voltage level. By keeping constant the slot area, it will be possible to increase the copper value in stator bars which will consequently able us to increase the nominal output current of turbo-generator. This will affect the cooling capability of machinery to some extent. But by considering the thermal conductivity of new insulating system which is improved, it is possible to increase the output power of generator up to 6% more. This research is done practically on a 200 MVA and 15.75 kV turbo-generators which its insulating system is Resin Rich (RR).

Keywords: insulation system, resin rich, VPI, upgrading

Procedia PDF Downloads 472

Authors: Xinke Huang, Huan Wang, Lidong Guo, Changbin Ju, Runbiao Liu, Guoen Cao, Yibo Wang, Honghua Xu

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Grid connected photovoltaic (PV) power system is to be developed in the direction of large-scale, clustering. Large-scale PV generation systems connected to HVDC grid have many advantages compared to its counterpart of AC grid, and DC connection is the tendency. DC/DC converter as the most important device in the system, has become one of the hot spots recently. The paper proposes a Quasi Z-Source(QZS) based Boost Full Bridge Isolated DC/DC Converter(BFBIC) topology as a basis power module and combination through input parallel output series(IPOS) method to improve power capacity and output voltage to match with the HVDC grid. The topology has both traditional voltage source and current source advantages, it permit the H-bridge short through and open circuit, which adopt utility duty cycle control and achieved input current and output voltage balancing through input current sharing control strategy. A ±10kV/200kW system model is built in MATLAB/SIMULINK to verify the proposed topology and control strategy.

Keywords: PV Generation System, Cascaded DC/DC converter, HVDC, Quasi Z Source Converter

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Authors: Voodi Kalandhar, Veera Reddy, Yuva Tejasree

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Researchers have become interested in multilevel inverters (MLI) because of their potential for medium- and high-power applications. MLIs are becoming more popular as a result of their ability to generate higher voltage levels, minimal power losses, small size, and low price. These inverters used in high voltage and high-power applications because the stress on the switch is low. Even though many traditional topologies, such as the cascaded H-bridge MLI, the flying capacitor MLI, and the diode clamped MLI, exist, they all have some drawbacks. A complicated control system is needed for the flying capacitor MLI to balance the voltage across the capacitor and diode clamped MLI requires more no of diodes when no of levels increases. Even though the cascaded H-Bridge MLI is popular in terms of modularity and simple control, it requires more no of isolated DC source. Therefore, a topology with fewer devices has always been necessary for greater efficiency and reliability. A new single-phase MLI topology has been introduced to minimize the required switch count in the circuit and increase output levels. With 3 dc voltage sources, 8 switches, and 13 levels at the output, this new single- phase MLI topology was developed. To demonstrate the proposed converter's superiority over the other MLI topologies currently in use, a thorough analysis of the proposed topology will be conducted.

Keywords: DC-AC converter, multi-level inverter (MLI), diodes, H-bridge inverter, switches

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Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

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In this paper, a single phase soft switched Zero Voltage Transition and Zero Current Transition (ZVT-ZCT) Power Factor Correction (PFC) boost converter is proposed. In the proposed PFC converter, the main switch turns on with ZVT and turns off with ZCT without any additional voltage or current stresses. Auxiliary switch turns on and off with zero current switching (ZCS). Also, the main diode turns on with zero voltage switching (ZVS) and turns off with ZCS. The proposed converter has features like low cost, simple control and structure. The output current and voltage are controlled by the proposed PFC converter in wide line and load range. The theoretical analysis of converter is clarified and the operating steps are given in detail. The simulation results of converter are obtained for 500 W and 100 kHz. It is observed that the semiconductor devices operate with soft switching (SS) perfectly. So, the switching power losses are minimum. Also, the proposed converter has 0.99 power factor with sinusoidal current shape.

Keywords: power factor correction, zero-voltage transition, zero-current transition, soft switching

Procedia PDF Downloads 771

Authors: Hyun Young Kim, Chung Kwang Lee, Han Hee Cho, Sang Woon Cho, Yong Seo Koo

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In this paper, we proposed a novel SCR (Silicon Controlled Rectifier) - based ESD (Electrostatic Discharge) protection device for I/O and power clamp. The proposed device has a higher holding voltage characteristic than conventional SCR. These characteristics enable to have latch-up immunity under normal operating conditions as well as superior full chip ESD protection. The proposed device was analyzed to figure out electrical characteristics and tolerance robustness in term of individual design parameters (D1, D2, D3). They are investigated by using the Synopsys TCAD simulator. As a result of simulation, holding voltage increased with different design parameters. The holding voltage of the proposed device changes from 3.3V to 7.9V. Also, N-Stack structure ESD device with the high holding voltage is proposed. In the simulation results, 2-stack has holding voltage of 6.8V and 3-stack has holding voltage of 10.5V. The simulation results show that holding voltage of stacking structure can be larger than the operation voltage of high-voltage application.

Keywords: ESD, SCR, holding voltage, stack, power clamp

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Authors: Deepak M. Sajnekar, S. B. Deshpande, R. M. Mohril

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At present many rotary excitation control system are using analog type of Automatic Voltage Regulator which now started to replace with the digital automatic voltage regulator which is provided with PID controller and tuning of PID controller is a challenging task. The cases where digital excitation control system is used tuning of PID controller are still carried out by pole placement method. Tuning of PID controller used for static excitation control system is not challenging because it does not involve exciter time constant. This paper discusses two methods of tuning PID controller i.e. Pole placement method and pole zero cancellation method. GUI prepared for both the methods on the platform of MATLAB. Using this GUI, performance results and time required for tuning for both the methods are compared. Sensitivity of the methods is also presented with parameter variation like loop gain ‘K’ and exciter time constant ‘te’.

Keywords: digital excitation system, automatic voltage regulator, pole placement method, pole zero cancellation method

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Authors: Ling Ai Wong, Hussain Shareef, Azah Mohamed, Ahmad Asrul Ibrahim

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The installation of photovoltaic based distributed generation (PVDG) in active distribution system can lead to voltage fluctuation due to the intermittent and unpredictable PVDG output power. This paper presented a method in mitigating the voltage rise by optimally locating and sizing the battery energy storage system (BESS) in PVDG integrated distribution network. The improved firefly algorithm is used to perform optimal placement and sizing. Three objective functions are presented considering the voltage deviation and BESS off-time with state of charge as the constraint. The performance of the proposed method is compared with another optimization method such as the original firefly algorithm and gravitational search algorithm. Simulation results show that the proposed optimum BESS location and size improve the voltage stability.

Keywords: BESS, firefly algorithm, PVDG, voltage fluctuation

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Authors: Yasunori Kobori, Nobukazu Tsukiji, Nobukazu Takai, Haruo Kobayashi

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In this paper, we study a Pulse-WidthModulation (PWM) controlled Zero-Voltage-Switching (ZVS) for single-inductor dual-output (SIDO) converters. This method can meet the industry demands for high efficiency due to ZVS and small size and low cost, thanks to single-inductor per multiple voltages. We show the single inductor single-output (SISO) ZVS buck converter with its operation and simulation and then the experimental results. Next proposed ZVS-PWM controlled SIDO converters are explained in the simulation. Finally we have proposed EMI reduction method with spread spectrum.

Keywords: DC-DC switching converter, zero-oltage switching control, single-inductor dual-output converter, EMI reduction, spread spectrum

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Authors: L. Hassaine, A. Mraoui, M. R. Bengourina

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In photovoltaic system, connected to the grid, the main goal is to control the power that the inverter injects into the grid from the energy provided by the photovoltaic generator. This paper proposes a control technique for a photovoltaic system connected to the grid based on the digital pulse-width modulation (DSPWM) which can synchronise a sinusoidal current output with a grid voltage and generate power at unity power factor. This control is based on H-Bridge inverter controlled by bipolar PWM Switching. The electrical scheme of the system is presented. Simulations results of output voltage and current validate the impact of this method to determinate the appropriate control of the system. A digital design of a generator PWM using VHDL is proposed and implemented on a Xilinx FPGA.

Keywords: grid connected photovoltaic system, H-Bridge inverter, control, bipolar PWM

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Authors: Mengesha Mamo Wogari

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In this paper, low voltage multiphase brushless DC motor with square wave air-gap flux distribution for electric vehicle application is proposed. Ten-phase, 5 kW motor, has been designed and simulated by finite element methods demonstrating the desired high torque capability at low speed and flux weakening operation for high-speed operations. The motor torque is proportional to number of phases for a constant phase current and air-gap flux. The concept of vector control and simple space vector modulation technique is used on MATLAB to control the motor demonstrating simple switching pattern for selected number of phases. The low voltage DC and inverter output AC are desired characteristics to avoid any electric shock in the vehicle, accidentally and during abnormal conditions. The switching devices for inverter are of low-voltage rating and cost effective though their number is equal to twice the number of phases.

Keywords: brushless DC motors, electric Vehicle, finite element methods, Low-voltage inverter, multiphase

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Authors: Yong Seo Koo, Jong Ho Nam, Yong Nam Choi, Dae Yeol Yoo, Jung Woo Han

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This paper presents a silicon controller rectifier (SCR) based ESD protection circuit for IC. The proposed ESD protection circuit has low trigger voltage and high holding voltage compared with conventional SCR ESD protection circuit. Electrical characteristics of the proposed ESD protection circuit are simulated and analyzed using TCAD simulator. The proposed ESD protection circuit verified effective low voltage ESD characteristics with low trigger voltage and high holding voltage.

Keywords: electro-static discharge (ESD), silicon controlled rectifier (SCR), holding voltage, protection circuit

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Authors: Vahid Rashtchi, Ashkan Pirooz

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This paper applies the Imperialist Competitive Algorithm (ICA) to find the optimal place and size of Static Compensator (STATCOM) in power systems. The output of the algorithm is a two dimensional array which indicates the best bus number and STATCOM's optimal size that minimizes all bus voltage deviations from their nominal value. Simulations are performed on IEEE 5, 14, and 30 bus test systems. Also some comparisons have been done between ICA and the famous Particle Swarm Optimization (PSO) algorithm. Results show that how this method can be considered as one of the most precise evolutionary methods for the use of optimum compensator placement in electrical grids.

Keywords: evolutionary computation, imperialist competitive algorithm, power systems compensation, static compensators, voltage profile

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Authors: Magdy B. Eteiba, Wael Ismael Wahba, Shimaa Barakat

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This paper presents a fault identification, classification and fault location estimation method based on Discrete Wavelet Transform and Adaptive Network Fuzzy Inference System (ANFIS) for medium voltage cable in the distribution system. Different faults and locations are simulated by ATP/EMTP, and then certain selected features of the wavelet transformed signals are used as an input for a training process on the ANFIS. Then an accurate fault classifier and locator algorithm was designed, trained and tested using current samples only. The results obtained from ANFIS output were compared with the real output. From the results, it was found that the percentage error between ANFIS output and real output is less than three percent. Hence, it can be concluded that the proposed technique is able to offer high accuracy in both of the fault classification and fault location.

Keywords: ANFIS, fault location, underground cable, wavelet transform

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Authors: Kyoung-il Do, Byung-seok Lee, Hee-guk Chae, Jeong-yun Seo Yong-seo Koo

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In this paper, a Silicon Controlled Rectifier (SCR)-based Electrostatic Discharge (ESD) protection circuit with high holding voltage and high robustness characteristics is proposed. Unlike conventional SCR, the proposed circuit has low trigger voltage and high holding voltage and provides effective ESD protection with latch-up immunity. In addition, the TCAD simulation results show that the proposed circuit has better electrical characteristics than the conventional SCR. A stack technology was used for voltage-specific applications. Consequentially, the proposed circuit has a trigger voltage of 17.60 V and a holding voltage of 3.64 V.

Keywords: ESD, SCR, latch-up, power clamp, holding voltage

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Authors: H. H. Goh, Q. S. Chua, S. W. Lee, B. C. Kok, K. C. Goh, K. T. K. Teo

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At present, the evaluation of voltage stability assessment experiences sizeable anxiety in the safe operation of power systems. This is due to the complications of a strain power system. With the snowballing of power demand by the consumers and also the restricted amount of power sources, therefore, the system has to perform at its maximum proficiency. Consequently, the noteworthy to discover the maximum ability boundary prior to voltage collapse should be undertaken. A preliminary warning can be perceived to evade the interruption of power system’s capacity. The effectiveness of line voltage stability indices (LVSI) is differentiated in this paper. The main purpose of the indices is used to predict the proximity of voltage instability of the electric power system. On the other hand, the indices are also able to decide the weakest load buses which are close to voltage collapse in the power system. The line stability indices are assessed using the IEEE 14 bus test system to validate its practicability. Results demonstrated that the implemented indices are practically relevant in predicting the manifestation of voltage collapse in the system. Therefore, essential actions can be taken to dodge the incident from arising.

Keywords: critical line, line outage, line voltage stability indices (LVSI), maximum loadability, voltage collapse, voltage instability, voltage stability analysis

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Authors: Linyu Wang, Mingjun Zhu, Jianhong Xiang, Hanyu Jiang

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Aiming at the problem that the spectral efficiency of hybrid precoding (HP) is too low in the current millimeter wave (mmWave) massive multiple input multiple output (MIMO) system, this paper proposes a digital joint equivalent channel hybrid precoding algorithm, which is based on the introduction of digital encoding matrix iteration. First, the objective function is expanded to obtain the relation equation, and the pseudo-inverse iterative function of the analog encoder is derived by using the pseudo-inverse method, which solves the problem of greatly increasing the amount of computation caused by the lack of rank of the digital encoding matrix and reduces the overall complexity of hybrid precoding. Secondly, the analog coding matrix and the millimeter-wave sparse channel matrix are combined into an equivalent channel, and then the equivalent channel is subjected to Singular Value Decomposition (SVD) to obtain a digital coding matrix, and then the derived pseudo-inverse iterative function is used to iteratively regenerate the simulated encoding matrix. The simulation results show that the proposed algorithm improves the system spectral efficiency by 10~20%compared with other algorithms and the stability is also improved.

Keywords: mmWave, massive MIMO, hybrid precoding, singular value decompositing, equivalent channel

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Authors: K. A. Chinmaya, M. Udaya Bhaskar

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Multiphase motor drives are now a day considered for numerous applications due to the advantages that they offer when compared to their three-phase counterparts. Proper modeling of inverters and motors are important in devising an appropriate control algorithm. This paper develops a complete modeling of a five-phase inverter and five-phase space vector modulation schemes which can be used for five-phase motor drives. A novel modified algorithm is introduced which enables the sinusoidal output voltages up to certain voltage value. The waveforms of phase to neutral voltage are compared with the different modulation techniques and also different modulation indexes in terms of Low-order Harmonic (LH) voltage of 3rd and 7th present. A detailed performance evolution of existing and newly modified schemes is done in terms of Total Harmonic Distortion (THD).

Keywords: multi-phase drives, space vector modulation, voltage source inverter, low order harmonic voltages, total harmonic distortion

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Authors: Yakup Sahin, Naim Suleyman Ting, Ismail Aksoy

Abstract:

A 1 kW power factor correction boost converter with an active snubber cell is presented in this paper. In the converter, the main switch turns on under zero voltage transition (ZVT) and turns off under zero current transition (ZCT) without any additional voltage or current stress. The auxiliary switch turns on and off under zero current switching (ZCS). Besides, the main diode turns on under ZVS and turns off under ZCS. The output current and voltage are controlled by the PFC converter in wide line and load range. The simulation results of converter are obtained for 1 kW and 100 kHz. One of the most important feature of the given converter is that it has direct power transfer as well as excellent soft switching techniques. Also, the converter has 0.99 power factor with the sinusoidal input current shape.

Keywords: power factor correction, direct power transfer, zero-voltage transition, zero-current transition, soft switching

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Authors: Saif Alomari

Abstract:

The paper aims at giving physical and mathematical descriptions of how the structural parameters of a resonant tunnelling diode (RTD) affect its output characteristics. Specifically, the value of the peak voltage, peak current, peak to valley current ratio (PVCR), and the difference between peak and valley voltages and currents ΔV and ΔI. A simulation-based approach using the Non-Equilibrium Green Function (NEGF) formalism based on the Silvaco ATLAS simulator is employed to conduct a series of designed experiments. These experiments show how the doping concentration in the emitter and collector layers, their thicknesses, and the width of the barriers and the quantum well influence the above-mentioned output characteristics. Each of these parameters was systematically changed while holding others fixed in each set of experiments. Factorial experiments are outside the scope of this work and will be investigated in future. The physics involved in the operation of the device is thoroughly explained and mathematical models based on curve fitting and underlaying physical principles are deduced. The models can be used to design devices with predictable output characteristics. These models were found absent in the literature that the author acanned. Results show that the doping concentration in each region has an effect on the value of the peak voltage. It is found that increasing the carrier concentration in the collector region shifts the peak to lower values, whereas increasing it in the emitter shifts the peak to higher values. In the collector’s case, the shift is either controlled by the built-in potential resulting from the concentration gradient or the conductivity enhancement in the collector. The shift to higher voltages is found to be also related to the location of the Fermi-level. The thicknesses of these layers play a role in the location of the peak as well. It was found that increasing the thickness of each region shifts the peak to higher values until a specific characteristic length, afterwards the peak becomes independent of the thickness. Finally, it is shown that the thickness of the barriers can be optimized for a particular well width to produce the highest PVCR or the highest ΔV and ΔI. The location of the peak voltage is important in optoelectronic applications of RTDs where the operating point of the device is usually the peak voltage point. Furthermore, the PVCR, ΔV, and ΔI are of great importance for building RTD-based oscillators as they affect the frequency response and output power of the oscillator.

Keywords: peak to valley ratio, peak voltage shift, resonant tunneling diodes, structural parameters

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Authors: Puneet Chawla, Balwinder Singh

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Recently, increased attention has been devoted to the voltage instability phenomenon in power systems. Many techniques have been proposed in the literature for evaluating and predicting voltage stability using steady state analysis methods. In this paper, P-V and Q-V curves have been generated for a 57 bus Patiala Rajpura circle of India. The power-flow program is developed in MATLAB using Newton-Raphson method. Using Q-V curves, the weakest bus of the power system and the maximum reactive power change permissible on that bus is calculated. STATCOMs are placed on the weakest bus to improve the voltage and hence voltage stability and also the power transmission capability of the line.

Keywords: voltage stability, reactive power, power flow, weakest bus, STATCOM

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Authors: Christos Konstantopoulos, Thomas Ussmueller

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Digital low drop-out regulators, in contrast to analog counterparts, provide an architecture of sub-1 V regulation with low power consumption, high power efficiency, and system integration. Towards an optimized integration in the ultra-low-power system-on-chip Internet of Things architecture that is operated through a radio frequency energy harvesting scheme, the D-LDO regulator should constitute the main regulator that operates the master-clock and rest loads of the SoC. In this context, we present a D-LDO with linear search coarse regulation and asynchronous fine regulation, which incorporates an in-regulator clock generation unit that provides an autonomous, self-start-up, and power-efficient D-LDO design. In contrast to contemporary D-LDO designs that employ ring-oscillator architecture which start-up time is dependent on the frequency, this work presents a fast start-up burst oscillator based on a high-gain stage with wake-up time independent of coarse regulation frequency. The design is implemented in a 55-nm Global Foundries CMOS process. With the purpose to validate the self-start-up capability of the presented D-LDO in the presence of ultra-low input power, an on-chip test-bench with an RF rectifier is implemented as well, which provides the RF to DC operation and feeds the D-LDO. Power efficiency and load regulation curves of the D-LDO are presented as extracted from the RF to regulated DC operation. The D-LDO regulator presents 83.6 % power efficiency during the RF to DC operation with a 3.65 uA load current and voltage regulator referred input power of -27 dBm. It succeeds 486 nA maximum quiescent current with CL 75 pF, the maximum current efficiency of 99.2%, and 1.16x power efficiency improvement compared to analog voltage regulator counterpart oriented to SoC IoT loads. Complementary, the transient performance of the D-LDO is evaluated under the transient droop test, and the achieved figure-of-merit is compared with state-of-art implementations.

Keywords: D-LDO, Internet of Things, RF energy harvesting, voltage regulators

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Authors: Sanghoon Park, Ki-Jin Kim, Kwang-Ho Ahn

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This paper discusses the undesirable charge transfer by the parasitic capacitances of the input transistors in a voltage sense amplifier. Due to its intrinsic rail-to-rail voltage transition, the input sides are inevitably disturbed. It can possible disturb the stabilities of the reference voltage levels. Moreover, it becomes serious in multi-channel systems by altering them for other channels, and so degrades the linearity of the systems. In order to alleviate the internal node voltage transition, the internal node stabilization technique is proposed by utilizing an additional biasing circuit. It achieves 47% and 43% improvements for node stabilization and input referred disturbance, respectively.

Keywords: voltage sense amplifier, voltage transition, node stabilization, biasing circuits

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Authors: P. Satish Kumar, V. Ramu, K. Ramakrishna

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In this paper, an efficient multilevel wave form synthesis technique is proposed and applied to a 99-level inverter. The basic principle of the proposed scheme is that the continuous output voltage levels can be synthesized by the addition or subtraction of the instantaneous voltages generated from different voltage levels. This synthesis technique can be realized by an array of switching devices composing full-bridge inverter modules and proper mixing of each bi-directional switch modules. The most different aspect, compared to the conventional approach, in the synthesis of the multilevel output waveform is the utilization of a combination of bidirectional switches and full bridge inverter modules with reduced number of components. A 99-level inverter consists of three full-bridge modules and six bi-directional switch modules. The validity of the proposed scheme is verified by the simulation.

Keywords: cascaded connection, multilevel inverter, synthesis, total harmonic distortion

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Authors: Priyanka Chaudhary, M. Rizwan

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This paper presents a grid synchronization technique based on adaptive notch filter for SPV (Solar Photovoltaic) system along with MPPT (Maximum Power Point Tracking) techniques. An efficient grid synchronization technique offers proficient detection of various components of grid signal like phase and frequency. It also acts as a barrier for harmonics and other disturbances in grid signal. A reference phase signal synchronized with the grid voltage is provided by the grid synchronization technique to standardize the system with grid codes and power quality standards. Hence, grid synchronization unit plays important role for grid connected SPV systems. As the output of the PV array is fluctuating in nature with the meteorological parameters like irradiance, temperature, wind etc. In order to maintain a constant DC voltage at VSC (Voltage Source Converter) input, MPPT control is required to track the maximum power point from PV array. In this work, a variable step size P & O (Perturb and Observe) MPPT technique with DC/DC boost converter has been used at first stage of the system. This algorithm divides the dPpv/dVpv curve of PV panel into three separate zones i.e. zone 0, zone 1 and zone 2. A fine value of tracking step size is used in zone 0 while zone 1 and zone 2 requires a large value of step size in order to obtain a high tracking speed. Further, adaptive notch filter based control technique is proposed for VSC in PV generation system. Adaptive notch filter (ANF) approach is used to synchronize the interfaced PV system with grid to maintain the amplitude, phase and frequency parameters as well as power quality improvement. This technique offers the compensation of harmonics current and reactive power with both linear and nonlinear loads. To maintain constant DC link voltage a PI controller is also implemented and presented in this paper. The complete system has been designed, developed and simulated using SimPower System and Simulink toolbox of MATLAB. The performance analysis of three phase grid connected solar photovoltaic system has been carried out on the basis of various parameters like PV output power, PV voltage, PV current, DC link voltage, PCC (Point of Common Coupling) voltage, grid voltage, grid current, voltage source converter current, power supplied by the voltage source converter etc. The results obtained from the proposed system are found satisfactory.

Keywords: solar photovoltaic systems, MPPT, voltage source converter, grid synchronization technique

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Authors: Kyoung-Il Do, Jun-Geol Park, Hee-Guk Chae, Jeong-Yun Seo, Yong-Seo Koo

Abstract:

A SCR stacking structure is proposed to have improved Latch-up immunity. In comparison with conventional SCR (Silicon Controlled Rectifier), the proposed Electrostatic Discharge (ESD) protection circuit has a lower trigger characteristic by using the LVTSCR (Low Voltage Trigger) structure. Also the proposed ESD protection circuit has improved Holding Voltage Characteristic by using N-stack technique. These characteristics enable to have latch-up immunity in operating conditions. The simulations are accomplished by using the Synopsys TCAD. It has a trigger voltage of 8.9V and a holding voltage of 1.8V in a single structure. And when applying the stack technique, 2-stack has the holding voltage of 3.8V and 3-stack has the holding voltage of 5.1 V.

Keywords: electrostatic discharge (ESD), low voltage trigger silicon controlled rectifier (LVTSCR), MVTSCR, power clamp, silicon controlled rectifier (SCR), latch-up

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Authors: Megha Chavda, Parth Thummar, Rahul Ghetia

Abstract:

This paper presents the voltage and current control of microgrid accompanied by the synchronization of microgrid with the main utility grid in both islanded and grid-connected modes. Distributed Energy Resources (DERs) satisfy the wide-spread power demand of consumer by behaving as a micro source for a low voltage (LV) grid or microgrid. Synchronization of the microgrid with the main utility grid is done using PLL and PWM gate pulse generation technique is used for the Voltage Source Converter. Potential Function method achieves the voltage and current control of this microgrid in both islanded and grid-connected modes. A low voltage grid consisting of three distributed generators (DG) is considered for the study and is simulated in time-domain using PSCAD/EMTDC software. The simulation results depict the appropriateness of voltage and current control of microgrid and synchronization of microgrid with the medium voltage (MV) grid.

Keywords: microgrid, distributed energy resources, voltage and current control, voltage source converter, pulse width modulation, phase locked loop

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Authors: Farhan Beg

Abstract:

A space vector based pulse width modulation control technique for the three-phase PWM converter is proposed in this paper. The proposed control scheme is based on a synchronous reference frame model. High performance and efficiency is obtained with regards to the DC bus voltage and the power factor considerations of the PWM rectifier thus leading to low losses. MATLAB/SIMULINK are used as a platform for the simulations and a SIMULINK model is presented in the paper. The results show that the proposed model demonstrates better performance and properties compared to the traditional SPWM method and the method improves the dynamic performance of the closed loop drastically. For the space vector based pulse width modulation, sine signal is the reference waveform and triangle waveform is the carrier waveform. When the value of sine signal is larger than triangle signal, the pulse will start producing to high; and then when the triangular signals higher than sine signal, the pulse will come to low. SPWM output will change by changing the value of the modulation index and frequency used in this system to produce more pulse width. When more pulse width is produced, the output voltage will have lower harmonics contents and the resolution will increase.

Keywords: power factor, SVPWM, PWM rectifier, SPWM

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Authors: Jun-Geol Park, Kyoung-Il Do, Min-Ju Kwon, Kyung-Hyun Park, Yong-Seo Koo

Abstract:

In this paper, we proposed the SCR (Silicon Controlled Rectifier)-based ESD (Electrostatic Discharge) protection circuit for latch-up immunity. The proposed circuit has a lower trigger voltage and a higher holding voltage characteristic by using the zener diode structure. These characteristics prevent latch-up problem in normal operating conditions. The proposed circuit was analyzed to figure out the electrical characteristics by the variations of design parameters D1, D2 and stack technology to obtain the n-fold electrical characteristics. The simulations are accomplished by using the Synopsys TCAD simulator. When using the stack technology, 2-stack has the holding voltage of 6.9V and 3-stack has the holding voltage of 10.9V.

Keywords: ESD, SCR, trigger voltage, holding voltage

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Authors: Shivarudraswamy, Anubhav Shrivastava, Lakshya Bhat

Abstract:

Distributed generation has indeed become a major area of interest in recent years. Distributed Generation can address large number of loads in a power line and hence has better efficiency over the conventional methods. However there are certain drawbacks associated with it, increase in voltage being the major one. This paper addresses the voltage control at the buses for an IEEE 30 bus system by regulating reactive power. For carrying out the analysis, the suitable location for placing distributed generators (DG) is identified through load flow analysis and seeing where the voltage profile is dipping. MATLAB programming is used to regulate the voltage at all buses within +/-5% of the base value even after the introduction of DG’s. Three methods for regulation of voltage are discussed. A sensitivity based analysis is later carried out to determine the priority among the various methods listed in the paper.

Keywords: distributed generators, distributed system, reactive power, voltage control

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Authors: M. Suresh Kumar, K. Ramani

Abstract:

This paper proposed the harmonic elimination of Cascaded H-Bridge Multi-Level Inverter by using Selective Harmonic Elimination-Pulse Width Modulation method programmed with Particle Swarm Optimization algorithm. PSO method determine proficiently the required switching angles to eliminate low order harmonics up to the 11th order from the inverter output voltage waveform while keeping the magnitude of the fundamental harmonics at the desired value. Results demonstrate that the proposed method does efficiently eliminate a great number of specific harmonics and the output voltage is resulted in minimum Total Harmonic Distortion. The results shown that the PSO algorithm attain successfully to the global solution faster than other algorithms.

Keywords: multi-level inverter, Selective Harmonic Elimination Pulse Width Modulation (SHEPWM), Particle Swarm Optimization (PSO), Total Harmonic Distortion (THD)

Procedia PDF Downloads 580