Search results for: CMOS technology

Authors: Mohsen Bagheri, Ahmad Afifi

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This paper presents a new method for read out of the piezoresistive accelerometer sensors. The circuit works based on instrumentation amplifier and it is useful for reducing offset in Wheatstone bridge. The obtained gain is 645 with 1 μv/°c equivalent drift and 1.58 mw power consumption. A Schmitt trigger and multiplexer circuit control output node. A high speed counter is designed in this work. The proposed circuit is designed and simulated in 0.18 μm CMOS technology with 1.8 v power supply.

Keywords: piezoresistive accelerometer, zero offset, Schmitt trigger, bidirectional reversible counter

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Authors: Anuja Askhedkar, G. H. Agrawal, Madhu Gudgunti

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Direct Charge Transfer Switched Capacitor (DCT-SC) DAC is the internal DAC used in Delta-Sigma (∆∑) DAC which works on Over-Sampling concept. The Switched Capacitor DAC mainly suffers from mismatch among capacitors. Mismatch among capacitors in DAC, causes non linearity between output and input. Dynamic Element Matching (DEM) technique is used to match the capacitors. According to element selection logic there are many types. In this paper, Data Weighted Averaging (DWA) technique is used for mismatch shaping. In this paper, the 4 bit DCT-SC-DAC with DWA-DEM technique is implemented using WINSPICE simulation software in 180nm CMOS technology. DNL for DAC with DWA is ±0.03 LSB and INL is ± 0.02LSB.

Keywords: ∑-Δ DAC, DCT-SC-DAC, mismatch shaping, DWA, DEM

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Authors: Jun Sung Go, Jong Kang Park, Jong Tae Kim

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As semi-conductor manufacturing technology evolves; the single event transient problem becomes more significant issue. Single event transient has a critical impact on both combinational and sequential logic circuits, so it is important to evaluate the soft error tolerance of the circuits at the design stage. In this paper, we present a soft error detecting simulation using scan chain. The simulation model generates a single event transient randomly in the circuit, and detects the soft error during the execution of the test patterns. We verified this model by inserting a scan chain in an 8051 microprocessor using 65 nm CMOS technology. While the test patterns generated by ATPG program are passing through the scan chain, we insert a single event transient and detect the number of soft errors per sub-module. The experiments show that the soft error rates per cell area of the SFR module is 277% larger than other modules.

Keywords: scan chain, single event transient, soft error, 8051 processor

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Authors: Chyuan Haur Kao, Hsiang Chen, Yu Sheng Tsai, Chen Hao Hung, Yu Shan Lee

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Dielectric electrolyte-insulator-semiconductor sensing membranes-based biosensors have been intensively investigated because of their simple fabrication, low cost, and fast response. However, to enhance their sensing performance, it is worthwhile to explore alternative materials, distinct processes, and novel treatments. An ISFET can be viewed as a variation of MOSFET with the dielectric oxide layer as the sensing membrane. Then, modulation on the work function of the gate caused by electrolytes in various ion concentrations could be used to calculate the ion concentrations. Recently, owing to the advancement of CMOS technology, some high dielectric materials substrates as the sensing membranes of electrolyte-insulator-semiconductor (EIS) structures. The EIS with a stacked-layer of SiO₂ layer between the sensing membrane and the silicon substrate exhibited a high pH sensitivity and good long-term stability. IGZO is a wide-bandgap (~3.15eV) semiconductor of the III-VI semiconductor group with several preferable properties, including good transparency, high electron mobility, wide band gap, and comparable with CMOS technology. IGZO was sputtered by reactive radio frequency (RF) on a p-type silicon wafer with various gas ratios of Ar:O₂ and was treated with rapid thermal annealing in O₂ ambient. The sensing performance, including sensitivity, hysteresis, and drift rate was measured and XRD, XPS, and AFM analyses were also used to study the material properties of the IGZO membrane. Moreover, IGZO was used as a sensing membrane in dielectric EIS bio-sensor structures. In addition to traditional pH sensing capability, detection for concentrations of Na+, K+, urea, glucose, and creatinine was performed. Moreover, post rapid thermal annealing (RTA) treatment was confirmed to improve the material properties and enhance the multi-analyte sensing capability for various ions or chemicals in solutions. In this study, the IGZO sensing membrane with annealing in O₂ ambient exhibited a higher sensitivity, higher linearity, higher H+ selectivity, lower hysteresis voltage and lower drift rate. Results indicate that the IGZO dielectric sensing membrane on the EIS structure is promising for future bio-medical device applications.

Keywords: dielectric sensing membrane, IGZO, hydrogen ion, plasma, rapid thermal annealing

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Authors: Parisa Khoshvaght, Mehdi Hosseinzadeh

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During the past few years, the Residue Number System (RNS) has been receiving considerable interest due to its parallel and fault-tolerant properties. This system is a useful tool for Digital Signal Processing (DSP) since it can support parallel, carry-free, high-speed and low power arithmetic. One of the drawbacks of Residue Number System is the fractional numbers, that is, the corresponding circuit is very hard to realize in conventional CMOS technology. In this paper, we propose a method in which the numbers of transistors are significantly reduced. The related delay is extremely diminished, in the first glance we use this method to solve concerning problem of one decimal functional number some how this proposition can be extended to generalize the idea. Another advantage of this method is the independency on the kind of moduli.

Keywords: computer arithmetic, residue number system, number system, one-Hot, VLSI

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Authors: Xin-Yu Shih, Yue-Qu Liu, Hong-Ru Chou

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This paper presents a low-area and fully-reconfigurable Fast Fourier Transform (FFT) hardware design for 3GPP-LTE communication standard. It can fully support 32 different FFT sizes, up to 2048 FFT points. Besides, a special processing element is developed for making reconfigurable computing characteristics possible, while first-in first-out (FIFO) scheduling scheme design technique is proposed for hardware-friendly FIFO resource arranging. In a synthesis chip realization via TSMC 40 nm CMOS technology, the hardware circuit only occupies core area of 0.2325 mm² and dissipates 233.5 mW at maximal operating frequency of 250 MHz.

Keywords: reconfigurable, fast Fourier transform (FFT), single-path delay feedback (SDF), 3GPP-LTE

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Authors: Zhao Bin, Yan Dan Lei

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In this paper, a multi-pattern parallel PRBS generator and a dedicated parallel BER tester is proposed for the 8-Gbps On-chip interconnection testing. A unique full-parallel PRBS checker is also proposed. The proposed design, together with the custom-designed high-speed parallel-to-serial and the serial-to-parallel circuit, will be used to test different on-chip interconnection transceivers. The design is implemented in TSMC 28nm CMOS technology with working voltage at 1.0 V. The serial to parallel ratio is 8:1 so the parallel PRBS generation and BER Tester can be run at lower speed.

Keywords: PRBS, BER, high speed, generator

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Authors: Vasileios Gerakis, Fontounasios Christos, Alkis Hatzopoulos

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A study of the impact of metal guard rings on the coupling between two square metal pads is presented. The structure is designed over a bulk silicon substrate with epitaxial layer, so the coupling through the substrate is also involved. A lightly doped profile is adopted and is simulated by means of an electromagnetic simulator for various pad distances and different metal layers, assuming a 65 nm bulk CMOS technology. The impact of various guard ring design (geometrical) parameters is examined. Furthermore, the increase of isolation (resulting in reduction of the noise coupling) between the pads by cutting the ring, or by using multiple rings, is also analyzed. S parameters are used to compare the various structures.

Keywords: guard rings, metal pad coupling, millimeter wave frequencies, substrate noise,

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Authors: Jörg Lenhardt, Wolfram Schiffmann, Jörg Keller

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While the feature sizes of recent Complementary Metal Oxid Semiconductor (CMOS) devices decrease the influence of static power prevails their energy consumption. Thus, power savings that benefit from Dynamic Frequency and Voltage Scaling (DVFS) are diminishing and temporal shutdown of cores or other microchip components become more worthwhile. A consequence of powering off unused parts of a chip is that the relative difference between idle and fully loaded power consumption is increased. That means, future chips and whole server systems gain more power saving potential through power-aware load balancing, whereas in former times this power saving approach had only limited effect, and thus, was not widely adopted. While powering off complete servers was used to save energy, it will be superfluous in many cases when cores can be powered down. An important advantage that comes with that is a largely reduced time to respond to increased computational demand. We include the above developments in a server power model and quantify the advantage. Our conclusion is that strategies from datacenters when to power off server systems might be used in the future on core level, while load balancing mechanisms previously used at core level might be used in the future at server level.

Keywords: power efficiency, static power consumption, dynamic power consumption, CMOS

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Authors: Felicia K. Oluwalola

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This paper examines the relevance of technology on education. It identified the concept of technology on education, bringing real-world learning to the classroom situation, examples of where technology can be used. This study established the fact that technology facilitates students learning compared with traditional method of teaching. It was recommended that the teachers should use technology to supplement, not replace, other instructional modes. It should be used in conjunction with hands-on labs and activities that also address the concepts targeted by the technology. Also, technology should be students centered and not teachers centered.

Keywords: computer, simulation, classroom teaching, education

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Authors: Jason Gan

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Technology has been around for many years, those that play a crucial part of our lives have evolved quick and fast, from televisions to computers and now mobile technology has also become a part of our lives. However in Singapore a nation with a strong reliance and following in technology, how are young children (0 to 8 years old) coping with these high technology equipment especially mobile technology and why and what are parents doing to manage this trend in the nation. This study aims to uncover some of the parents’ perception behind the use of mobile technology by their children.

Keywords: technology, preschoolers, ICT and Singapore, early childhood

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Authors: Kwounghee Choi

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Technological convergence between the various sectors is expected to have a very large impact on future industrial and economy. This study attempts to do empirical approach between specific technologies’ classification. For technological convergence classification, it is necessary to set the target technology to be analyzed. This study selected target technology from national research and development plan. At first we found a source technology for analysis. Depending on the weight of source technology, NT-based, BT-based, IT-based, ET-based, CS-based convergence types were classified. This study aims to empirically show the concept of convergence technology and convergence types. If we use the source technology to classify convergence type, it will be useful to make practical strategies of convergence technology.

Keywords: technology convergence, source technology, convergence type, R&D strategy, technology classification

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Authors: Kah-Hyong Chang, Xin Liu, Jia Hao Cheong, Saisundar Sankaranarayanan, Dexing Pang, Hongzhao Zheng

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A digital baseband Application-Specific Integrated Circuit (ASIC) is developed for a microchip transponder to transmit signals and temperature levels from biomedical monitoring devices. The transmission protocol is adapted from the ISO/IEC 11784/85 standard. The module has a decimation filter that employs only a single adder-subtractor in its datapath. The filtered output is coded with cyclic redundancy check and transmitted through backscattering Load Shift Keying (LSK) modulation to a reader. Fabricated using the 0.18-μm CMOS technology, the module occupies 0.116 mm² in chip area (digital baseband: 0.060 mm², decimation filter: 0.056 mm²), and consumes a total of less than 0.9 μW of power (digital baseband: 0.75 μW, decimation filter: 0.14 μW).

Keywords: biomedical sensor, decimation filter, radio frequency integrated circuit (RFIC) baseband, temperature sensor

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Authors: Fatma Khadra

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The objective of this research is to identify the acceptance of new technology in a sample of 150 Participants from Qatar University. Based on the Technology Acceptance Model (TAM), we used the Davis’s scale (1989) which contains two item scales for Perceived Usefulness and Perceived Ease of Use. The TAM represents an important theoretical contribution toward understanding how users come to accept and use technology. This model suggests that when people are presented with a new technology, a number of variables influence their decision about how and when they will use it. The results showed that participants accept more technology because flexibility, clarity, enhancing the experience, enjoying, facility, and useful. Also, results showed that younger participants accept more technology than others.

Keywords: new technology, perceived usefulness, perceived ease of use, technology acceptance model

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Authors: Joseph Akyeh, Abdul Samed Muntaka, Emmanuel Anin, Dorcas Nuertey

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Purpose: This study develops and tests arguments that the relationship between technology alignment and supply chain performance is conditional upon levels of technology championing. Methodology: The proposed relationships are tested on a sample of 217 hospitals in a major sub-Saharan African economy. Findings: Findings from the study indicate that technology alignment has a positive and significant effect on supply chain performance. The study further finds that while technology championing strengthens the direct effects of technology alignment on supply chain performance. Theoretical Contributions: A theoretical contribution from this study is the finding that when technology alignment drives supply chain performance is more complex than previously thought it depends on whether or not technology alignment is first championed by top management. Originality: Though some studies have been conducted on technology alignment and health supply chain performance, to the best of the researcher’s knowledge, no previous study has examined the moderating role of technology championing the link between technology alignment and supply chain performance.

Keywords: technology alignment, supply chain performance, technology championing, structural equation modelling

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Authors: Olaje Monday Olaje

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Science and technology has been prove to be the back bone for economic development of any country, and for Nigeria, it has more critical role to play. This paper examines the importance of science and technology education for national development and self dependence for Nigerian citizens. A historical overview of the interconnectivity of science and technology and self dependence is heighted. The current situation and challenges facing science and technology education are also highlighted to bring out the theoretical importance of science and technology education for self dependence which actually has not been practically achieved. Recommendations are also made at the of the study so as to skill acquisition through science and technology for self dependence.

Keywords: acquisition, education, self-dependence, science, technology

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Authors: Kala Bharathan, R. Seshasayanan

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In this paper, a 1-bit Embedded Logic Full Adder (EFA) circuit in transistor level is proposed, which reduces logic complexity, gives low power and high speed. The design is further extended till 64 bits. To evaluate the performance of EFA, a 16, 32, 64-bit both Linear and Square root Carry Select Adder/Subtractor (CSLAS) Structure is also proposed. Realistic testing of proposed circuits is done on 8 X 8 Modified Booth multiplier and comparison in terms of power and delay is done. The EFA is implemented for different multiplier architectures for performance parameter comparison. Overall delay for CSLAS is reduced to 78% when compared to conventional one. The circuit implementations are done on TSMC 28nm CMOS technology using Cadence Virtuoso tool. The EFA has power savings of up to 14% when compared to the conventional adder. The present implementation was found to offer significant improvement in terms of power and speed in comparison to other full adder circuits.

Keywords: embedded logic, full adder, pdp, xor gate

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Authors: P. P. S. Sifolo, P. Tladi, J. Maimela

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This article investigates technology used by Tshwane residents intended for tourism purposes. The aim is to contribute information to the Tshwane interested parties for planning and management concerning technology within the tourism sector. This study identified the types of tourist related technologies used by the Tshwane residents, be it for business purposes or personal use. The study connected the exploitation of technology for tourism purposes through unpacking the tourism sector as it utilizes technology. Quantitative research methodology was used whereby self-completed questionnaires were chosen as research instruments. The research study carried out a search for knowledge on technology for tourism and the Tshwane residents; however the study revealed that technology has certainly imprinted tourism massively because of its effectiveness and efficiency. Technology has assisted tourism businesses stay abreast of competition with ICT and because of that, SA is on the map as one the economically performing countries in Africa. Moreover, technology and tourism make a meaningful impact on job creation and Gross Domestic Product (GDP).

Keywords: tourism, information and communication technology, Tshwane residents, technology for tourism

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Authors: Mohamad Baqer Heidari, Hefzollah.Mohammadian

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This brief presents two original implementations of improved accuracy current-mode multiplier/divider circuits. Besides the advantage of their simplicity, these original multiplier/divider structures present the advantage of very small linearity errors that can be obtained as a result of the proposed design techniques (0.75% and 0.9%, respectively, for an extended range of the input currents). The original multiplier/divider circuits permit a facile reconfiguration, the presented structures representing the functional basis for implementing complex function synthesizer circuits. The proposed computational structures are designed for implementing in 0.18-µm CMOS technology, with a low-voltage operation (a supply voltage of 1.2 V). The circuits’ power consumptions are 60 and 75 µW, respectively, while their frequency bandwidths are 79.6 and 59.7 MHz, respectively.

Keywords: analog signal processing, current-mode operation, functional core, multiplier, reconfigurable circuits, industrial package systems

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Authors: Sunusi Tijjani

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Information and communication technology is an indispensable tool in the performance of office technology managers. Today's offices are automated and equipped with modern office machines that enhances and improve the work of office managers. However, today's office technology managers can process, evaluate, manage and communicate all forms of information using technological devices. Information and Communication Technology is viewed as the process of processing, storing ad dissemination information while office technology managers are trained professional who can effectively operate modern office machines, perform administrative duties and attend meetings to take dawn minute of meetings. This paper examines the importance of information and communication technology toward enhancing the work of office managers. It also stresses the importance of information and communication technology toward proper and accurate record management.

Keywords: communication, information, technology, managers

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Authors: José Carlos Rodríguez, Mario Gómez

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The aim of this paper is to get insight on the nature of university-industry technology transfer (UITT) and technology transfer offices (TTOs) activity at universities in the case of emerging economies. In relation to the process of transferring knowledge/technology in the case of emerging economies, knowledge/technology transfer in these economies are more reactive than in developed economies due to differences in maturity of technologies. It is assumed in this paper that knowledge/technology transfer is a complex phenomenon, and thus the paper contributes to get insight on the nature of UITT and TTOs creation in the case of emerging economies by using a system dynamics model of knowledge/technology transfer in these countries. The paper recognizes the differences between industrialized countries and emerging economies on these phenomena.

Keywords: university-industry technology transfer, technology transfer offices, technology transfer models, emerging economies

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Authors: Guo-Ming Sung, Ramavath Naga Raju Naik

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This paper presents a low power, high speed, sense-amplifier based flip-flop (SAFF). The flip-flop’s power con-sumption and delay are greatly reduced by employing a new conditionally precharge sense-amplifier stage and a single-ended latch stage. Glitch-free and contention-free latch operation is achieved by using a conditional cut-off strategy. The design uses fewer transistors, has a lower clock load, and has a simple structure, all of which contribute to a near-zero setup time. When compared to previous flip-flop structures proposed for similar input/output conditions, this design’s performance and overall PDP have improved. The post layout simulation of the circuit uses 2.91µW of power and has a delay of 65.82 ps. Overall, the power-delay product has seen some enhancements. Cadence Virtuoso Designing tool with CMOS 90nm technology are used for all designs.

Keywords: high-speed, low-power, flip-flop, sense-amplifier

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Authors: Hyungil Chae

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This work presents a method to reduce spinning current of a Hall-effect sensor for low-power magnetic sensor applications. Spinning current of a Hall-effect sensor changes the direction of bias current periodically and can separate signals from DC-offset. The bias current is proportional to the sensor sensitivity but also increases the power consumption. To achieve both high sensitivity and low power consumption, the bias current can be pulse-width modulated. When the bias current duration Tb is reduced by a factor of N compared to the spinning current period of Tₛ/2, the total power consumption can be saved by N times. N can be large as long as the Hall-effect sensor settles down within Tb. The proposed scheme is implemented and simulated in a 0.18um CMOS process, and the power saving factor is 9.6 when N is 10. Acknowledgements: This work was supported by Institute for Information & communications Technology Promotion (IITP) grant funded by the Korea government (MSIP) (20160001360022003, Development of Hall Semi-conductor for Smart Car and Device).

Keywords: chopper stabilization, Hall-effect sensor, pulse width modulation, spinning current

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Authors: Hyun Joung No, Chul Lee

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Even though technology evolves and develops through interaction with each other, not all technologies contribute to the development of technology equally. While some technologies play a central role in developing technology, others play a secondary role. The role of the technological components can be classified as core or non-core (peripheral) technology. The core technologies have a considerable knowledge interaction with other technological components while the non-core technologies barely interact with others within the system. This study introduces the concept that classifies the technological components into core or peripheral technology according to their role and importance in the technology field. The study adapted the social network analysis to examine the relationship between technological components. Using a continuous core-periphery analysis, it identifies the technological network structure and classifies the core and peripheral nodes. Based on their knowledge inflow/outflow direction and their dependence/influence on core technologies, the technological clusters are classified into four categories: (1) high dependence and high influence on core technology, (2) high dependence and low influence on core technology, (3) low dependence and high influence on core technology, and (4) low dependence and low influence on core technology.

Keywords: core technology, periphery technology, technological components, technological role

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Authors: Günther Schuh, Christina König, Toni Drescher

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One of the key factors for the competitiveness and market success of technology-driven companies is the timely provision of information about emerging technologies, changes in existing technologies, as well as relevant related changes in the market's structures and participants. Therefore, many companies conduct technology intelligence (TI) activities to ensure an early identification of appropriate technologies and other (weak) signals. One base activity of TI is technology monitoring, which is defined as the systematic tracking of developments within a specified topic of interest as well as related trends over a long period of time. Due to the very large number of dynamically changing parameters within the technological and the market environment of a company as well as their possible interdependencies, it is necessary to focus technology monitoring on specific indicators or other criteria, which are able to point out technological developments and market changes. In addition to the execution of a literature review on existing approaches, which mainly propose patent-based indicators, it is examined in this paper whether indicator systems from other branches such as risk management or economic research could be transferred to technology monitoring in order to enable an efficient and focused technology monitoring for companies.

Keywords: technology forecasting, technology indicator, technology intelligence, technology management, technology monitoring

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Authors: M. Yousefi, N. Nasirzadeh

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In this paper, dynamic comparator structure employing two methods for power consumption reduction with applications in low-power high-speed analog-to-digital converters have been presented. The proposed comparator has low consumption thanks to power reduction methods. They have the ability for offset adjustment. The comparator consumes 14.3 μW at 100 MHz which is equal to 11.8 fJ. The comparator has been designed and simulated in 180 nm CMOS. Layouts occupy 210 μm².

Keywords: efficiency, comparator, power, low

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Authors: Heungwook Son, Sungjoo Lee

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Recently, due to intensifying competition in several industries, the importance of meeting customer requirements has increased. The role that service plays in satisfying customer‘s requirements is key area of focus. Thus, the concept of using product development-research in the service system has been actively practiced. As strategic decision making tool, various types of the technology roadmap were suggested in the product-service system (PSS). However, the technology roadmap was configured a top-down form around the technologies of the elements. The limitation is that it hard for it to indicate a variety of interrelations. In response, this paper suggests using the planning support tool of PSS for a DSM for the technology roadmap; it consists of the relationship of product-service-technology as a bottom-up form. Therefore, nine types of the technology roadmap of PSS exist. The first defines the relationship of product-service-technology. The second phase identifies output when of the technology roadmaps are adapted to the DSM process. Finally, the DSM-based forms of each type of technology roadmap are presented through case studies.

Keywords: DSM, technology roadmap, PSS, product-service system, bottom-up

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Authors: Geoffrey Sinha

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This paper is primarily addressed to teachers who stand on the threshold of bringing technology and new media into their classrooms. Technology and new media, such as smart phones and tablets have changed the face of communication in general and of language teaching more specifically. New media has widespread appeal among young people in particular, so it is in the teacher’s best interests to bring new media into their lessons. It is the author’s firm belief that technology will never replace the teacher, but it is without question that the twenty-first century teacher must employ technology and new media in some form, or run the risk of failure. The level that one chooses to incorporate new media within their class is entirely in their hands.

Keywords: new media, social media, technology, education, language learning

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Authors: Osagiede Mercy Afe

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After the internet explosion in the 90’s, Technology was immediately integrated into the school system. Technology which symbolizes advancement in human knowledge was seen as a setback by many educators many efforts have been made to help stem this erroneous believes and help educators realize the benefits of technology and ways of implementing it in the classrooms especially in the sciences. This advancement created a constantly expanding gap between the pupil’s perception on the use of technology within the learning atmosphere and the teacher’s perception and limitations hence the focus of this paper is on the need to refocus on the potentials of Science and Technology in enhancing children learning at school especially in science for sustainable development in Nigeria. The paper recommended measures for facilitating the sustenance of science and technology in Nigerian schools so as to enhance the potentials of our children in Science and Technology for a better tomorrow.

Keywords: children, information communication technology (ICT), potentials, sustainable development, science education

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Authors: Agung Sujatmiko

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One of the purposes of patent licensing was to transfer technology from developed countries to developing countries. For this reason, the role of the patent license agreement was very important and had a function as a tool to achieve technological development. This goal was very good, but in fact, many problems and obstacles arose in its implementation, so the technology transfer that had been implemented had not given good results. For this reason, it was necessary to find a solution so that technology could switch properly. The problem approach used the statutory and conceptual approaches. The analysis used was deductive by analyzing general laws and regulations and then concluding. Several regulations related to technology transfer were the main source to find answers to why technology transfer was difficult to achieve and what caused it. Once the cause was known, a solution would be sought.

Keywords: license, patent, technology, tie in clause

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