Search results for: time-domain gating

Authors: R. Manjith, C. Muthukumari

Abstract:

In this paper, a novel Linear Feedback Shift Register (LFSR) with Look Ahead Clock Gating (LACG) technique is presented to reduce the power consumption in modern processors and System-on-Chip. Clock gating is a predominant technique used to reduce unwanted switching of clock signals. Several clock gating techniques to reduce the dynamic power have been developed, of which LACG is predominant. LACG computes the clock enabling signals of each flip-flop (FF) one cycle ahead of time, based on the present cycle data of the flip-flops on which it depends. It overcomes the timing problems in the existing clock gating methods like datadriven clock gating and Auto-Gated flip-flops (AGFF) by allotting a full clock cycle for the determination of the clock enabling signals. Further to reduce the power consumption in LACG technique, FFs can be grouped so that they share a common clock enabling signal. Simulation results show that the novel grouped LFSR with LACG achieves 15.03% power savings than conventional LFSR with LACG and 44.87% than data-driven clock gating.

Keywords: AGFF, data-driven, LACG, LFSR.

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Authors: S. H. Sabzpoushan

Abstract:

In this research we show that the dynamics of an action potential in a cell can be modeled with a linear combination of the dynamics of the gating state variables. It is shown that the modeling error is negligible. Our findings can be used for simplifying cell models and reduction of computational burden i.e. it is useful for simulating action potential propagation in large scale computations like tissue modeling. We have verified our finding with the use of several cell models.

Keywords: Linear model, Action potential, gating dynamics.

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Authors: Hong Li, Linfeng Li, Jianping Hu

Abstract:

With rapid technology scaling, the proportion of the static power consumption catches up with dynamic power consumption gradually. To decrease leakage consumption is becoming more and more important in low-power design. This paper presents a power-gating scheme for P-DTGAL (p-type dual transmission gate adiabatic logic) circuits to reduce leakage power dissipations under deep submicron process. The energy dissipations of P-DTGAL circuits with power-gating scheme are investigated in different processes, frequencies and active ratios. BSIM4 model is adopted to reflect the characteristics of the leakage currents. HSPICE simulations show that the leakage loss is greatly reduced by using the P-DTGAL with power-gating techniques.

Keywords: Leakage reduction, low power, deep submicronCMOS circuits, P-type adiabatic circuits.

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Authors: Shashank Gautam

Abstract:

This paper proposes techniques like MT CMOS, POWER GATING, DUAL STACK, GALEOR and LECTOR to reduce the leakage power. A Full Adder has been designed using these techniques and power dissipation is calculated and is compared with general CMOS logic of Full Adder. Simulation results show the validity of the proposed techniques is effective to save power dissipation and to increase the speed of operation of the circuits to a large extent.

Keywords: Low Power, MT CMOS, Galeor, Lector, Power Gating, Dual Stack, Full Adder.

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Authors: Jianping Hu, Xiaolei Sheng

Abstract:

This paper introduces an adiabatic register file based on two-phase CPAL (Complementary Pass-Transistor Adiabatic Logic circuits) with power-gating scheme, which can operate on a single-phase power clock. A 32×32 single-phase adiabatic register file with power-gating scheme has been implemented with TSMC 0.18μm CMOS technology. All the circuits except for the storage cells employ two-phase CPAL circuits, and the storage cell is based on the conventional memory one. The two-phase non-overlap power-clock generator with power-gating scheme is used to supply the proposed adiabatic register file. Full-custom layouts are drawn. The energy and functional simulations have been performed using the net-list extracted from their layouts. Compared with the traditional static CMOS register file, HSPICE simulations show that the proposed adiabatic register file can work very well, and it attains about 73% energy savings at 100 MHz.

Keywords: Low power, Register file, Complementarypass-transistor logic, Adiabatic logic, Single-phase power clock.

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Authors: E. F. Ochulor, S. O. Adeosun, S. A. Balogun

Abstract:

Effect of sprue/metal head height on mould filling, microstructure and mechanical properties of TWDI casting is studied. Results show that metal/sprue height of 50 mm is not sufficient to push the melt through the gating channel, but as it is increased from 100-350 mm, proper mould filling is achieved. However at higher heights between 200 mm and 350 mm, defects associated with incomplete solidification, carbide precipitation and turbulent flow are evident. This research shows that superior UTS, hardness, nodularity and nodule count are obtained at 100 mm sprue height.

Keywords: Melt pressure and velocity, nodularity, nodule count, sprue height.

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Authors: Ankit Mitra

Abstract:

An adder is one of the most integral component of a digital system like a digital signal processor or a microprocessor. Being an extremely computationally intensive part of a system, the optimization for speed and power consumption of the adder is of prime importance. In this paper we have designed a 1 bit full adder cell based on dynamic TSPC logic to achieve high speed operation. A high threshold voltage sleep transistor is used to reduce the static power dissipation in standby mode. The circuit is designed and simulated in TSPICE using TSMC 180nm CMOS process. Average power consumption, delay and power-delay product is measured which showed considerable improvement in performance over the existing full adder designs.

Keywords: CMOS, TSPC, MTCMOS, ALU, Clock gating, power gating, pipelining.

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Authors: A. Miss May Thu Zar Myint, B. Dr. Kay Thi Lwin

Abstract:

This research focuses on the effect of weight percentage variation and size variation of MgFeSi added, gating system design and reaction chamber design on inmold process. By using inmold process, well-known problem of fading is avoided because the liquid iron reacts with magnesium in the mold and not, as usual, in the ladle. During the pouring operation, liquid metal passes through the chamber containing the magnesium, where the reaction of the metal with magnesium proceeds in the absence of atmospheric oxygen [1].In this paper, the results of microstructural characteristic of ductile iron on this parameters are mentioned. The mechanisms of the inmold process are also described [2]. The data obtained from this research will assist in producing the vehicle parts and other machinery parts for different industrial zones and government industries and in transferring the technology to all industrial zones in Myanmar. Therefore, the inmold technology offers many advantages over traditional treatment methods both from a technical and environmental, as well as an economical point of view. The main objective of this research is to produce ductile iron castings in all industrial sectors in Myanmar more easily with lower costs. It will also assist the sharing of knowledge and experience related to the ductile iron production.

Keywords: ductile iron, inmold process, magnesiumtreatment, microstructural characteristics.

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Authors: Faisal Amin, Abdul Mueed, Xu Jiadong

Abstract:

This paper describes the development of a fully automated measurement software for antenna radiation pattern measurements in a Compact Antenna Test Range (CATR). The CATR has a frequency range from 2-40 GHz and the measurement hardware includes a Network Analyzer for transmitting and Receiving the microwave signal and a Positioner controller to control the motion of the Styrofoam column. The measurement process includes Calibration of CATR with a Standard Gain Horn (SGH) antenna followed by Gain versus angle measurement of the Antenna under test (AUT). The software is designed to control a variety of microwave transmitter / receiver and two axis Positioner controllers through the standard General Purpose interface bus (GPIB) interface. Addition of new Network Analyzers is supported through a slight modification of hardware control module. Time-domain gating is implemented to remove the unwanted signals and get the isolated response of AUT. The gated response of the AUT is compared with the calibration data in the frequency domain to obtain the desired results. The data acquisition and processing is implemented in Agilent VEE and Matlab. A variety of experimental measurements with SGH antennas were performed to validate the accuracy of software. A comparison of results with existing commercial softwares is presented and the measured results are found to be within .2 dBm.

Keywords: Antenna measurement, calibration, time-domain gating, VNA, Positioner controller

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Authors: P. Ruttanee, K-N. Areerak, K-L. Areerak

Abstract:

Dynamic models of power converters are normally time-varying because of their switching actions. Several approaches are applied to analyze the power converters to achieve the timeinvariant models suitable for system analysis and design via the classical control theory. The paper presents how to derive dynamic models of the power system consisting of a three-phase controlled rectifier feeding an uncontrolled buck converter by using the combination between the well known techniques called the DQ and the generalized state-space averaging methods. The intensive timedomain simulations of the exact topology model are used to support the accuracies of the reported model. The results show that the proposed model can provide good accuracies in both transient and steady-state responses.

Keywords: DQ method, Generalized state-space averaging method, Three-phase controlled rectifier, Uncontrolled buck converter, Averaging model, Modeling, Simulation.

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Authors: A. Shayeghi, H. Eimani Kalasar, H. Shayeghi

Abstract:

This paper emphasizes on the application of genetic algorithm (GA) to optimize the parameters of the TMD for achieving the best results in the reduction of the building response under earthquake excitations. The Integral of the Time multiplied Absolute value of the Error (ITAE) based on relative displacement of all floors in the building is taken as a performance index of the optimization criterion. The problem of robustly TMD controller design is formatted as an optimization problem based on the ITAE performance index to be solved using GA that has a story ability to find the most optimistic results. An 11–story realistic building, located in the city of Rasht, Iran is considered as a test system to demonstrate effectiveness of the proposed GA based TMD (GATMD) controller without specifying which mode should be controlled. The results of the proposed GATMD controller are compared with the uncontrolled structure through timedomain simulation and some performance indices. The results analysis reveals that the designed GA based TMD controller has an excellent capability in reduction of the seismically excited example building and the ITAE performance, that is so for remains as unknown, can be introduced a new criteria - method for structural dynamic design.

Keywords: Tuned Mass Damper, Genetic Algorithm, TallBuildings, Structural Dynamics.

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Authors: Syed Munvar Ali, V. Vijaya Kumar Reddy, M. Surya Kalavathi

Abstract:

In this paper, a dual inverter configuration has been implemented for induction motor drive. This isolated dual inverter is capable to produce high quality of output voltage and minimize common mode voltage (CMV). To this isolated dual inverter a decoupled space vector based pulse width modulation (PWM) technique is proposed. Conventional space vector based PWM (SVPWM) techniques require reference voltage vector calculation and sector identification. The proposed decoupled SVPWM technique generates gating pulses from instantaneous phase voltages and gives a CMV of ±v_dc/6. To evaluate proposed algorithm MATLAB based simulation studies are carried on indirect vector controlled open end winding induction motor drive.

Keywords: Inverter configuration, decoupled SVPWM, common mode voltage, vector control.

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Authors: Ravit Gautam, Dipen A. Mistry, Manmohan Singh Meena, Bhupelly Dheeraj, Suresh Mikkili

Abstract:

Due to the increased use of the power electronic equipment, harmonics in the power system has increased to a greater extent. These harmonics results a poor power quality causing a major effect on the customers. Shunt active filters (SHAF) are used for the mitigations of the current harmonics and to maintain constant DC link voltage. PI and Fuzzy logic controllers (FLC) were used to control the performance of the shunt active filter under both balance and unbalance source voltage condition. The results found were not satisfying the IEEE-519 standards of THD to be less than 5%. Hysteresis band current control was used to obtain the gating signals for SHAF, though it has some drawbacks and thus to obtain a better performance of the SHAF to mitigate the harmonics, adaptive hysteresis band current control scheme is implemented. Adaptive hysteresis based SHAF is used to obtain better compensation of current harmonics and to regulate the DC link voltage in a better way.

Keywords: DC Link Voltage, Fuzzy Logic Controller, Adaptive Hysteresis, Harmonics, Shunt Active Filter.

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Authors: Nesapriya. P., S. Rajalaxmi

Abstract:

This paper is based on the bridgeless single-phase Ac–Dc Power Factor Correction (PFC) converters with Fuzzy Logic Controller. High frequency isolated Cuk converters are used as a modular dc-dc converter in Discontinuous Conduction Mode (DCM) of operation of Power Factor Correction. The aim of this paper is to simplify the program complexity of the controller by reducing the number of fuzzy sets of the Membership Functions (MFs) and to improve the efficiency and to eliminate the power quality problems. The output of Fuzzy controller is compared with High frequency triangular wave to generate PWM gating signals of Cuk converter. The proposed topologies are designed to work in Discontinuous Conduction Mode (DCM) to achieve a unity power factor and low total harmonic distortion of the input current. The Fuzzy Logic Controller gives additional advantages such as accurate result, uncertainty and imprecision and automatic control circuitry. Performance comparisons between the proposed and conventional controllers and circuits are performed based on circuit simulations.

Keywords: Fuzzy Logic Controller (FLC), Bridgeless rectifier, Cuk converter, Pulse Width Modulation (PWM), Power Factor Correction, Total Harmonic Distortion (THD).

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Authors: Claude Takenga, Rolf-Dietrich Berndt, Erling Si, Markus Diem, Guohui Qiao, Melanie Gau, Michael Brandstoetter, Martin Kampel, Michael Dworzak

Abstract:

In patients with acute lymphoblastic leukaemia (ALL), treatment response is increasingly evaluated with minimal residual disease (MRD) analyses. Flow Cytometry (FCM) is a fast and sensitive method to detect MRD. However, the interpretation of these multi-parametric data requires intensive operator training and experience. This paper presents a pipeline-software, as a ready-to-use FCM-based MRD-assessment tool for the daily clinical practice for patients with ALL. The new tool increases accuracy in assessment of FCM-MRD in samples which are difficult to analyse by conventional operator-based gating since computer-aided analysis potentially has a superior resolution due to utilization of the whole multi-parametric FCM-data space at once instead of step-wise, two-dimensional plot-based visualization. The system developed as a telemedical network reduces the work-load and lab-costs, staff-time needed for training, continuous quality control, operator-based data interpretation. It allows dissemination of automated FCM-MRD analysis to medical centres which have no established expertise for the benefit of an even larger community of diseased children worldwide. We established a telemedical network system for analysis and clinical follow-up and treatment monitoring of Leukaemia. The system is scalable and adapted to link several centres and laboratories worldwide.

Keywords: Data security, flow cytometry, leukaemia, telematics platform, telemedicine.

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