Search results for: programmable
106 Design and Implementation of A 10-bit SAR ADC with A Programmable Reference
Authors: Hasmayadi Abdul Majid, Yuzman Yusoff, Noor Shelida Salleh
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This paper presents the development of a single-ended 38.5 kS/s 10-bit programmable reference SAR ADC which is realized in MIMOS’s 0.35 µm CMOS process. The design uses a resistive DAC, a dynamic comparator with pre-amplifier and a SAR digital logic to create 10 effective bits ADC. A programmable reference circuitry allows the ADC to operate with different input range from 0.6 V to 2.1 V. A single ended 38.5 kS/s 10-bit programmable reference SAR ADC was proposed and implemented in a 0.35 µm CMOS technology and consumed less than 7.5 mW power with a 3 V supply.Keywords: successive approximation register analog-to-digital converter, SAR ADC, resistive DAC, programmable reference
Procedia PDF Downloads 518105 Research on the Application of Flexible and Programmable Systems in Electronic Systems
Authors: Yang Xiaodong
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This article explores the application and structural characteristics of flexible and programmable systems in electronic systems, with a focus on analyzing their advantages and architectural differences in dealing with complex environments. By introducing mathematical models and simulation experiments, the performance of dynamic module combination in flexible systems and fixed path selection in programmable systems in resource utilization and performance optimization was demonstrated. This article also discusses the mutual transformation between the two in practical applications and proposes a solution to improve system flexibility and performance through dynamic reconfiguration technology. This study provides theoretical reference for the design and optimization of flexible and programmable systems.Keywords: flexibility, programmable, electronic systems, system architecture
Procedia PDF Downloads 8104 Design of a Pulse Generator Based on a Programmable System-on-Chip (PSoC) for Ultrasonic Applications
Authors: Pedro Acevedo, Carlos Díaz, Mónica Vázquez, Joel Durán
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This paper describes the design of a pulse generator based on the Programmable System-on-Chip (PSoC) module. In this module, using programmable logic is possible to implement different pulses which are required for ultrasonic applications, either in a single channel or multiple channels. This module can operate with programmable frequencies from 3-74 MHz; its programming may be versatile covering a wide range of ultrasonic applications. It is ideal for low-power ultrasonic applications where PZT or PVDF transducers are used.Keywords: PSoC, pulse generator, PVDF, ultrasonic transducer
Procedia PDF Downloads 292103 Programmable Shields in Space
Authors: Tapas Kumar Sinha, Joseph Mathew
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At the moment earth is in grave danger due to threats of global warming. The temperature of the earth has risen by almost 20C. Glaciers in the Arctic have started to melt. It would be foolhardy to think that this is a small effect and in time it would go away. Global warming is caused by a number of factors. However, one sure and simple way to totally eliminate this problem is to put programmable shields in space. Just as an umbrella blocks sunlight, a programmable shield in space will block sun rays from reaching the earth as in a solar eclipse and cause cooling in the penumbral region just as it happens during an eclipse.Keywords: glaciers, green house, global warming space, satellites
Procedia PDF Downloads 599102 DNA PLA: A Nano-Biotechnological Programmable Device
Authors: Hafiz Md. HasanBabu, Khandaker Mohammad Mohi Uddin, Md. IstiakJaman Ami, Rahat Hossain Faisal
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Computing in biomolecular programming performs through the different types of reactions. Proteins and nucleic acids are used to store the information generated by biomolecular programming. DNA (Deoxyribose Nucleic Acid) can be used to build a molecular computing system and operating system for its predictable molecular behavior property. The DNA device has clear advantages over conventional devices when applied to problems that can be divided into separate, non-sequential tasks. The reason is that DNA strands can hold so much data in memory and conduct multiple operations at once, thus solving decomposable problems much faster. Programmable Logic Array, abbreviated as PLA is a programmable device having programmable AND operations and OR operations. In this paper, a DNA PLA is designed by different molecular operations using DNA molecules with the proposed algorithms. The molecular PLA could take advantage of DNA's physical properties to store information and perform calculations. These include extremely dense information storage, enormous parallelism, and extraordinary energy efficiency.Keywords: biological systems, DNA computing, parallel computing, programmable logic array, PLA, DNA
Procedia PDF Downloads 129101 Functional and Stimuli Implementation and Verification of Programmable Peripheral Interface (PPI) Protocol
Authors: N. N. Joshi, G. K. Singh
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We present the stimuli implementation and verification of a Programmable Peripheral Interface (PPI) 8255. It involves a designing and verification of configurable intellectual property (IP) module of PPI protocol using Verilog HDL for implementation part and System Verilog for verification. The overview of the PPI-8255 presented then the design specification implemented for the work following the functional description and pin configuration of PPI-8255. The coverage report of design shows that our design and verification environment covered 100% functionality in accordance with the design specification generated by the Questa Sim 10.0b.Keywords: Programmable Peripheral Interface (PPI), verilog HDL, system verilog, questa sim
Procedia PDF Downloads 522100 O.MG- It’s a Cyber-Enabled Fraud
Authors: Damola O. Lawal, David W. Gresty, Diane E. Gan, Louise Hewitt
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This paper investigates the feasibility of using a programmable USB such as the O.MG Cable to perform a file tampering attack. Here, the O.MG Cable, an apparently harmless mobile device charger, is used in an unauthorized way to alter the content of a file (accounts record-January_Contributions.xlsx). The aim is to determine if a forensics analyst can reliably determine who has altered the target file; the O.MG Cable or the user of the machine. This work highlights some of the traces of the O.MG Cable left behind on the target computer itself, such as the Product ID (PID) and Vendor ID (ID). Also discussed is the O.MG Cable’s behavior during the experiments. We determine if a forensics analyst could identify if any evidence has been left behind by the programmable device on the target file once it has been removed from the computer to establish if the analyst would be able to link the traces left by the O.MG Cable to the file tampering. It was discovered that the forensic analyst might mistake the actions of the O.MG Cable for the computer users. Experiments carried out in this work could further the discussion as to whether an innocent user could be punished for the unauthorized changes made by a programmable device.Keywords: O.MG cable, programmable USB, file tampering attack, digital evidence credibility, miscarriage of justice, cyber fraud
Procedia PDF Downloads 15899 Design of a Low Cost Programmable LED Lighting System
Authors: S. Abeysekera, M. Bazghaleh, M. P. L. Ooi, Y. C. Kuang, V. Kalavally
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Smart LED-based lighting systems have significant advantages over traditional lighting systems due to their capability of producing tunable light spectrums on demand. The main challenge in the design of smart lighting systems is to produce sufficient luminous flux and uniformly accurate output spectrum for sufficiently broad area. This paper outlines the programmable LED lighting system design principles of design to achieve the two aims. In this paper, a seven-channel design using low-cost discrete LEDs is presented. Optimization algorithms are used to calculate the number of required LEDs, LEDs arrangements and optimum LED separation distance. The results show the illumination uniformity for each channel. The results also show that the maximum color error is below 0.0808 on the CIE1976 chromaticity scale. In conclusion, this paper considered the simulation and design of a seven-channel programmable lighting system using low-cost discrete LEDs to produce sufficient luminous flux and uniformly accurate output spectrum for sufficiently broad area.Keywords: light spectrum control, LEDs, smart lighting, programmable LED lighting system
Procedia PDF Downloads 18798 Demand Response from Residential Air Conditioning Load Using a Programmable Communication Thermostat
Authors: Saurabh Chanana, Monika Arora
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Demand response is getting increased attention these days due to the increase in electricity demand and introduction of renewable resources in the existing power grid. Traditionally demand response programs involve large industrial consumers but with technological advancement, demand response is being implemented for small residential and commercial consumers also. In this paper, demand response program aims to reduce the peak demand as well as overall energy consumption of the residential customers. Air conditioners are the major reason of peak load in residential sector in summer, so a dynamic model of air conditioning load with thermostat action has been considered for applying demand response programs. A programmable communicating thermostat (PCT) is a device that uses real time pricing (RTP) signals to control the thermostat setting. A new model incorporating PCT in air conditioning load has been proposed in this paper. Results show that introduction of PCT in air conditioner is useful in reducing the electricity payments of customers as well as reducing the peak demand.Keywords: demand response, home energy management, programmable communicating thermostat, thermostatically controlled appliances
Procedia PDF Downloads 60797 Implementation of Iterative Algorithm for Earthquake Location
Authors: Hussain K. Chaiel
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The development in the field of the digital signal processing (DSP) and the microelectronics technology reduces the complexity of the iterative algorithms that need large number of arithmetic operations. Virtex-Field Programmable Gate Arrays (FPGAs) are programmable silicon foundations which offer an important solution for addressing the needs of high performance DSP designer. In this work, Virtex-7 FPGA technology is used to implement an iterative algorithm to estimate the earthquake location. Simulation results show that an implementation based on block RAMB36E1 and DSP48E1 slices of Virtex-7 type reduces the number of cycles of the clock frequency. This enables the algorithm to be used for earthquake prediction.Keywords: DSP, earthquake, FPGA, iterative algorithm
Procedia PDF Downloads 38996 High Performance Field Programmable Gate Array-Based Stochastic Low-Density Parity-Check Decoder Design for IEEE 802.3an Standard
Authors: Ghania Zerari, Abderrezak Guessoum, Rachid Beguenane
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This paper introduces high-performance architecture for fully parallel stochastic Low-Density Parity-Check (LDPC) field programmable gate array (FPGA) based LDPC decoder. The new approach is designed to decrease the decoding latency and to reduce the FPGA logic utilisation. To accomplish the target logic utilisation reduction, the routing of the proposed sub-variable node (VN) internal memory is designed to utilize one slice distributed RAM. Furthermore, a VN initialization, using the channel input probability, is achieved to enhance the decoder convergence, without extra resources and without integrating the output saturated-counters. The Xilinx FPGA implementation, of IEEE 802.3an standard LDPC code, shows that the proposed decoding approach attain high performance along with reduction of FPGA logic utilisation.Keywords: low-density parity-check (LDPC) decoder, stochastic decoding, field programmable gate array (FPGA), IEEE 802.3an standard
Procedia PDF Downloads 29795 Design of Reconfigurable and Non-reciprocal Metasurface with Independent Controls of Transmission Gain, Attenuation and Phase
Authors: Shi Yu Wang, Qian Wei Zhang, He Li, Hao Han He, Yun Bo Li
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The spatial controls of electromagnetic (EM) waves have always been a research hot spot in recent years. And the rapid development of metasurface-based technologies has provided more freedoms for manipulating the EM waves. Here we propose the design of reconfigurable and non-reciprocal metasurface with independent controls of transmission gain, attenuation and phase. The proposed meta-atom mainly consists of the cascaded textures including the receiving antenna, the middle layer in which the power amplifiers (PAs), programmable attenuator and phase shifter locate, and the transmitting antenna. The programmable attenuator and phase shifter can realize the dynamic controls of transmission amplitude and phase independently, and the PA devices in the meta-atom can actualize the performance of non-reciprocal transmission. The proposed meta-atom is analyzed applying field-circuit co-simulation and a sample of the meta-atom is fabricated and measured under using two standard waveguides. The measured results verify the ability of the independent manipulation for transmission amplitude and phase of the proposed the meta-atom and the design method has been verified very well correspondingly.Keywords: active circuits, independent controls of multiple electromagnetic features, non-reciprocal electromagnetic transmission, reconfigurable and programmable
Procedia PDF Downloads 7994 Enhanced Test Scheme based on Programmable Write Time for Future Computer Memories
Authors: Nor Zaidi Haron, Fauziyah Salehuddin, Norsuhaidah Arshad, Sani Irwan Salim
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Resistive random access memories (RRAMs) are one of the main candidates for future computer memories. However, due to their tiny size and immature device technology, the quality of the outgoing RRAM chips is seen as a serious issue. Defective RRAM cells might behave differently than existing semiconductor memories (Dynamic RAM, Static RAM, and Flash), meaning that they are difficult to be detected using existing test schemes. This paper presents an enhanced test scheme, referred to as Programmable Short Write Time (PSWT) that is able to improve the detection of faulty RRAM cells. It is developed by applying multiple weak write operations, each with different time durations. The test circuit embedded in the RRAM chip is made programmable in order to supply different weak write times during testing. The RRAM electrical model is described using Verilog-AMS language and is simulated using HSPICE simulation tools. Simulation results show that the proposed test scheme offers better open-resistive fault detection compared to existing test schemes.Keywords: memory fault, memory test, design-for-testability, resistive random access memory
Procedia PDF Downloads 38793 Field-Programmable Gate Array Based Tester for Protective Relay
Authors: H. Bentarzi, A. Zitouni
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The reliability of the power grid depends on the successful operation of thousands of protective relays. The failure of one relay to operate as intended may lead the entire power grid to blackout. In fact, major power system failures during transient disturbances may be caused by unnecessary protective relay tripping rather than by the failure of a relay to operate. Adequate relay testing provides a first defense against false trips of the relay and hence improves power grid stability and prevents catastrophic bulk power system failures. The goal of this research project is to design and enhance the relay tester using a technology such as Field Programmable Gate Array (FPGA) card NI 7851. A PC based tester framework has been developed using Simulink power system model for generating signals under different conditions (faults or transient disturbances) and LabVIEW for developing the graphical user interface and configuring the FPGA. Besides, the interface system has been developed for outputting and amplifying the signals without distortion. These signals should be like the generated ones by the real power system and large enough for testing the relay’s functionality. The signals generated that have been displayed on the scope are satisfactory. Furthermore, the proposed testing system can be used for improving the performance of protective relay.Keywords: amplifier class D, field-programmable gate array (FPGA), protective relay, tester
Procedia PDF Downloads 21692 Development of a Force-Sensing Toothbrush for Gum Recession Measurement Using Programmable Automation Controller
Authors: Sorayya Kazemi, Hamed Kharrati, Mehdi Abedinpour Fallah
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This paper presents the design and implementation of a novel electric pressure-sensitive toothbrush, capable of measuring the forces applied to the head of the brush. The developed device is used for gum recession measurement. In particular, the percentage of gum recession is measured by a Programmable Automation controller (PAC). Moreover, the brushing forces are measured by a Force Sensing Resistor (FSR) sensor. These forces are analog inputs of PAC. According to the applied forces during patient’s brushing and the patient’s percentage of gum recession, dentist sets the standard force range. The instrument alarms when the patient applies a force over the set range.Keywords: gum recession, force sensing resistor, controller, toothbrush
Procedia PDF Downloads 49791 Technological Development and Implementation of a Robotic Arm Motioned by Programmable Logic Controller
Authors: J. G. Batista, L. J. de Bessa Neto, M. A. F. B. Lima, J. R. Leite, J. I. de Andrade Nunes
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The robot manipulator is an equipment that stands out for two reasons: Firstly because of its characteristics of movement and reprogramming, resembling the arm; secondly, by adding several areas of knowledge of science and engineering. The present work shows the development of the prototype of a robotic manipulator driven by a Programmable Logic Controller (PLC), having two degrees of freedom, which allows the movement and displacement of mechanical parts, tools, and objects in general of small size, through an electronic system. The aim is to study direct and inverse kinematics of the robotic manipulator to describe the translation and rotation between two adjacent links of the robot through the Denavit-Hartenberg parameters. Currently, due to the many resources that microcomputer systems offer us, robotics is going through a period of continuous growth that will allow, in a short time, the development of intelligent robots with the capacity to perform operations that require flexibility, speed and precision.Keywords: Denavit-Hartenberg, direct and inverse kinematics, microcontrollers, robotic manipulator
Procedia PDF Downloads 34790 A Survey of Field Programmable Gate Array-Based Convolutional Neural Network Accelerators
Authors: Wei Zhang
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With the rapid development of deep learning, neural network and deep learning algorithms play a significant role in various practical applications. Due to the high accuracy and good performance, Convolutional Neural Networks (CNNs) especially have become a research hot spot in the past few years. However, the size of the networks becomes increasingly large scale due to the demands of the practical applications, which poses a significant challenge to construct a high-performance implementation of deep learning neural networks. Meanwhile, many of these application scenarios also have strict requirements on the performance and low-power consumption of hardware devices. Therefore, it is particularly critical to choose a moderate computing platform for hardware acceleration of CNNs. This article aimed to survey the recent advance in Field Programmable Gate Array (FPGA)-based acceleration of CNNs. Various designs and implementations of the accelerator based on FPGA under different devices and network models are overviewed, and the versions of Graphic Processing Units (GPUs), Application Specific Integrated Circuits (ASICs) and Digital Signal Processors (DSPs) are compared to present our own critical analysis and comments. Finally, we give a discussion on different perspectives of these acceleration and optimization methods on FPGA platforms to further explore the opportunities and challenges for future research. More helpfully, we give a prospect for future development of the FPGA-based accelerator.Keywords: deep learning, field programmable gate array, FPGA, hardware accelerator, convolutional neural networks, CNN
Procedia PDF Downloads 12889 A Critical Look on Clustered Regularly Interspaced Short Palindromic Repeats Method Based on Different Mechanisms
Authors: R. Sulakshana, R. Lakshmi
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Clustered Regularly Interspaced Short Palindromic Repeats, CRISPR associate (CRISPR/Cas) is an adaptive immunity system found in bacteria and archaea. It has been modified to serve as a potent gene editing tool. Moreover, it has found widespread use in the field of genome research because of its accessibility and low cost. Several bioinformatics methods have been created to aid in the construction of specific single guide RNA (sgRNA), which is highly active and crucial to CRISPR/Cas performance. Various Cas proteins, including Cas1, Cas2, Cas9, and Cas12, have been used to create genome engineering tools because of their programmable sequence specificity. Class 1 and 2 CRISPR/Cas systems, as well as the processes of all known Cas proteins (including Cas9 and Cas12), are discussed in this review paper. In addition, the various CRISPR methodologies and their tools so far discovered are discussed. Finally, the challenges and issues in the CRISPR system along with future works, are presented.Keywords: gene editing tool, Cas proteins, CRISPR, guideRNA, programmable sequence
Procedia PDF Downloads 10588 Embedded Hw-Sw Reconfigurable Techniques For Wireless Sensor Network Applications
Authors: B. Kirubakaran, C. Rajasekaran
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Reconfigurable techniques are used in many engineering and industrial applications for the efficient data transmissions through the wireless sensor networks. Nowadays most of the industrial applications are work for try to minimize the size and cost. During runtime the reconfigurable technique avoid the unwanted hang and delay in the system performance. In recent world Field Programmable Gate Array (FPGA) as one of the most efficient reconfigurable device and widely used for most of the hardware and software reconfiguration applications. In this paper, the work deals with whatever going to make changes in the hardware and software during runtime it’s should not affect the current running process that’s the main objective of the paper our changes be done in a parallel manner at the same time concentrating the cost and power transmission problems during data trans-receiving. Analog sensor (Temperature) as an input for the controller (PIC) through that control the FPGA digital sensors in generalized manner.Keywords: field programmable gate array, peripheral interrupt controller, runtime reconfigurable techniques, wireless sensor networks
Procedia PDF Downloads 40787 Design of an Automatic Saw Cutting Machine for Wood and Aluminum
Authors: Jawad Ul Haq, Evan Mazur, Ahmed Qureshi, Mohamed Al-Hussein
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The uses of wood in furniture, building, bridges and aluminum in transportation and construction, make aluminum and forest economy a prominent matter in North America. Machines available to date to cut the aforementioned materials are mostly industry oriented with complex structure and operations which require special training and skill. Furthermore, requirements such as pneumatics, 3-phase supply are associated with cost, maintenance, and safety hazards. Power saws are very useful tools used to cut and shape materials; however, they can cause serious hand injuries. Operator’s hands in table saw are vulnerable as they are used to guide pieces into the saw. Apart from hands, saw operator is also prone to material being kicked back out of the saw or sustain eye or respiratory injuries due to rapidly flying sawdust and other debris. In this paper, design of an automatic saw cutting machine has been proposed to ensure safety, portability, usage at domestic level and capability to cut both aluminum and wood. This paper demonstrates detailed Mechanical design in SOLIDWORKS and Control Systems using Programmable Logic Controller (PLC), based on the aforementioned design objectives.Keywords: programmable logic controller, saw cutting, control, automation
Procedia PDF Downloads 27386 Field-Programmable Gate Array-Based Baseband Signals Generator of X-Band Transmitter for Micro Satellite/CubeSat
Authors: Shih-Ming Wang, Chun-Kai Yeh, Ming-Hwang Shie, Tai-Wei Lin, Chieh-Fu Chang
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This paper introduces a FPGA-based baseband signals generator (BSG) of X-band transmitter developed by National Space Organization (NSPO), Taiwan, for earth observation. In order to gain more flexibility for various applications, a number of modulation schemes, QPSK, DeQPSK and 8PSK 4D-TCM are included. For micro satellite scenario, the maximum symbol rate is up to 150Mbsps, and the EVM is as low as 1.9%. For CubeSat scenario, the maximum symbol rate is up to 60Mbsps, and the EVM is less than 1.7%. The maximum data rates are 412.5Mbps and 165Mbps, respectively. Besides, triple modular redundancy (TMR) scheme is implemented in order to reduce single event effect (SEE) induced by radiation. Finally, the theoretical error performance is provided based on comprehensive analysis, especially when BER is lower and much lower than 10⁻⁶ due to low error bit requirement of modern high-resolution earth remote-sensing instruments.Keywords: X-band transmitter, FPGA (Field-Programmable Gate Array), CubeSat, micro satellite
Procedia PDF Downloads 29585 Implementation of Edge Detection Based on Autofluorescence Endoscopic Image of Field Programmable Gate Array
Authors: Hao Cheng, Zhiwu Wang, Guozheng Yan, Pingping Jiang, Shijia Qin, Shuai Kuang
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Autofluorescence Imaging (AFI) is a technology for detecting early carcinogenesis of the gastrointestinal tract in recent years. Compared with traditional white light endoscopy (WLE), this technology greatly improves the detection accuracy of early carcinogenesis, because the colors of normal tissues are different from cancerous tissues. Thus, edge detection can distinguish them in grayscale images. In this paper, based on the traditional Sobel edge detection method, optimization has been performed on this method which considers the environment of the gastrointestinal, including adaptive threshold and morphological processing. All of the processes are implemented on our self-designed system based on the image sensor OV6930 and Field Programmable Gate Array (FPGA), The system can capture the gastrointestinal image taken by the lens in real time and detect edges. The final experiments verified the feasibility of our system and the effectiveness and accuracy of the edge detection algorithm.Keywords: AFI, edge detection, adaptive threshold, morphological processing, OV6930, FPGA
Procedia PDF Downloads 23084 Functionalized Ultra-Soft Rubber for Soft Robotics Application
Authors: Shib Shankar Banerjeea, Andreas Ferya, Gert Heinricha, Amit Das
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Recently, the growing need for the development of soft robots consisting of highly deformable and compliance materials emerge from the serious limitations of conventional service robots. However, one of the main challenges of soft robotics is to develop such compliance materials, which facilitates the design of soft robotic structures and, simultaneously, controls the soft-body systems, like soft artificial muscles. Generally, silicone or acrylic-based elastomer composites are used for soft robotics. However, mechanical performance and long-term reliabilities of the functional parts (sensors, actuators, main body) of the robot made from these composite materials are inferior. This work will present the development and characterization of robust super-soft programmable elastomeric materials from crosslinked natural rubber that can serve as touch and strain sensors for soft robotic arms with very high elastic properties and strain, while the modulus is altered in the kilopascal range. Our results suggest that such soft natural programmable elastomers can be promising materials and can replace conventional silicone-based elastomer for soft robotics applications.Keywords: elastomers, soft materials, natural rubber, sensors
Procedia PDF Downloads 15483 Multipurpose Agricultural Robot Platform: Conceptual Design of Control System Software for Autonomous Driving and Agricultural Operations Using Programmable Logic Controller
Authors: P. Abhishesh, B. S. Ryuh, Y. S. Oh, H. J. Moon, R. Akanksha
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This paper discusses about the conceptual design and development of the control system software using Programmable logic controller (PLC) for autonomous driving and agricultural operations of Multipurpose Agricultural Robot Platform (MARP). Based on given initial conditions by field analysis and desired agricultural operations, the structural design development of MARP is done using modelling and analysis tool. PLC, being robust and easy to use, has been used to design the autonomous control system of robot platform for desired parameters. The robot is capable of performing autonomous driving and three automatic agricultural operations, viz. hilling, mulching, and sowing of seeds in the respective order. The input received from various sensors on the field is later transmitted to the controller via ZigBee network to make the changes in the control program to get desired field output. The research is conducted to provide assistance to farmers by reducing labor hours for agricultural activities by implementing automation. This study will provide an alternative to the existing systems with machineries attached behind tractors and rigorous manual operations on agricultural field at effective cost.Keywords: agricultural operations, autonomous driving, MARP, PLC
Procedia PDF Downloads 36382 A High Time Resolution Digital Pulse Width Modulator Based on Field Programmable Gate Array’s Phase Locked Loop Megafunction
Authors: Jun Wang, Tingcun Wei
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The digital pulse width modulator (DPWM) is the crucial building block for digitally-controlled DC-DC switching converter, which converts the digital duty ratio signal into its analog counterpart to control the power MOSFET transistors on or off. With the increase of switching frequency of digitally-controlled DC-DC converter, the DPWM with higher time resolution is required. In this paper, a 15-bits DPWM with three-level hybrid structure is presented; the first level is composed of a7-bits counter and a comparator, the second one is a 5-bits delay line, and the third one is a 3-bits digital dither. The presented DPWM is designed and implemented using the PLL megafunction of FPGA (Field Programmable Gate Arrays), and the required frequency of clock signal is 128 times of switching frequency. The simulation results show that, for the switching frequency of 2 MHz, a DPWM which has the time resolution of 15 ps is achieved using a maximum clock frequency of 256MHz. The designed DPWM in this paper is especially useful for high-frequency digitally-controlled DC-DC switching converters.Keywords: DPWM, digitally-controlled DC-DC switching converter, FPGA, PLL megafunction, time resolution
Procedia PDF Downloads 48081 Pixel Façade: An Idea for Programmable Building Skin
Authors: H. Jamili, S. Shakiba
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Today, one of the main concerns of human beings is facing the unpleasant changes of the environment. Buildings are responsible for a significant amount of natural resources consumption and carbon emissions production. In such a situation, this thought comes to mind that changing each building into a phenomenon of benefit to the environment. A change in a way that each building functions as an element that supports the environment, and construction, in addition to answering the need of humans, is encouraged, the way planting a tree is, and it is no longer seen as a threat to alive beings and the planet. Prospect: Today, different ideas of developing materials that can smartly function are realizing. For instance, Programmable Materials, which in different conditions, can respond appropriately to the situation and have features of modification in shape, size, physical properties and restoration, and repair quality. Studies are to progress having this purpose to plan for these materials in a way that they are easily available, and to meet this aim, there is no need to use expensive materials and high technologies. In these cases, physical attributes of materials undertake the role of sensors, wires and actuators then materials will become into robots itself. In fact, we experience robotics without robots. In recent decades, AI and technology advances have dramatically improving the performance of materials. These achievements are a combination of software optimizations and physical productions such as multi-materials 3D printing. These capabilities enable us to program materials in order to change shape, appearance, and physical properties to interact with different situations. nIt is expected that further achievements like Memory Materials and Self-learning Materials are also added to the Smart Materials family, which are affordable, available, and of use for a variety of applications and industries. From the architectural standpoint, the building skin is significantly considered in this research, concerning the noticeable surface area the buildings skin have in urban space. The purpose of this research would be finding a way that the programmable materials be used in building skin with the aim of having an effective and positive interaction. A Pixel Façade would be a solution for programming a building skin. The Pixel Facadeincludes components that contain a series of attributes that help buildings for their needs upon their environmental criteria. A PIXEL contains series of smart materials and digital controllers together. It not only benefits its physical properties, such as control the amount of sunlight and heat, but it enhances building performance by providing a list of features, depending on situation criteria. The features will vary depending on locations and have a different function during the daytime and different seasons. The primary role of a PIXEL FAÇADE can be defined as filtering pollutions (for inside and outside of the buildings) and providing clean energy as well as interacting with other PIXEL FACADES to estimate better reactions.Keywords: building skin, environmental crisis, pixel facade, programmable materials, smart materials
Procedia PDF Downloads 8880 Classification of Myoelectric Signals Using Multilayer Perceptron Neural Network with Back-Propagation Algorithm in a Wireless Surface Myoelectric Prosthesis of the Upper-Limb
Authors: Kevin D. Manalo, Jumelyn L. Torres, Noel B. Linsangan
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This paper focuses on a wireless myoelectric prosthesis of the upper-limb that uses a Multilayer Perceptron Neural network with back propagation. The algorithm is widely used in pattern recognition. The network can be used to train signals and be able to use it in performing a function on their own based on sample inputs. The paper makes use of the Neural Network in classifying the electromyography signal that is produced by the muscle in the amputee’s skin surface. The gathered data will be passed on through the Classification Stage wirelessly through Zigbee Technology. The signal will be classified and trained to be used in performing the arm positions in the prosthesis. Through programming using Verilog and using a Field Programmable Gate Array (FPGA) with Zigbee, the EMG signals will be acquired and will be used for classification. The classified signal is used to produce the corresponding Hand Movements (Open, Pick, Hold, and Grip) through the Zigbee controller. The data will then be processed through the MLP Neural Network using MATLAB which then be used for the surface myoelectric prosthesis. Z-test will be used to display the output acquired from using the neural network.Keywords: field programmable gate array, multilayer perceptron neural network, verilog, zigbee
Procedia PDF Downloads 38979 Field-Programmable Gate Arrays Based High-Efficiency Oriented Fast and Rotated Binary Robust Independent Elementary Feature Extraction Method Using Feature Zone Strategy
Authors: Huang Bai-Cheng
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When deploying the Oriented Fast and Rotated Binary Robust Independent Elementary Feature (BRIEF) (ORB) extraction algorithm on field-programmable gate arrays (FPGA), the access of global storage for 31×31 pixel patches of the features has become the bottleneck of the system efficiency. Therefore, a feature zone strategy has been proposed. Zones are searched as features are detected. Pixels around the feature zones are extracted from global memory and distributed into patches corresponding to feature coordinates. The proposed FPGA structure is targeted on a Xilinx FPGA development board of Zynq UltraScale+ series, and multiple datasets are tested. Compared with the streaming pixel patch extraction method, the proposed architecture obtains at least two times acceleration consuming extra 3.82% Flip-Flops (FFs) and 7.78% Look-Up Tables (LUTs). Compared with the non-streaming one, the proposed architecture saves 22.3% LUT and 1.82% FF, causing a latency of only 0.2ms and a drop in frame rate for 1. Compared with the related works, the proposed strategy and hardware architecture have the superiority of keeping a balance between FPGA resources and performance.Keywords: feature extraction, real-time, ORB, FPGA implementation
Procedia PDF Downloads 12278 Agile Real-Time Field Programmable Gate Array-Based Image Processing System for Drone Imagery in Digital Agriculture
Authors: Sabiha Shahid Antora, Young Ki Chang
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Along with various farm management technologies, imagery is an important tool that facilitates crop assessment, monitoring, and management. As a consequence, drone imaging technology is playing a vital role to capture the state of the entire field for yield mapping, crop scouting, weed detection, and so on. Although it is essential to inspect the cultivable lands in real-time for making rapid decisions regarding field variable inputs to combat stresses and diseases, drone imagery is still evolving in this area of interest. Cost margin and post-processing complexions of the image stream are the main challenges of imaging technology. Therefore, this proposed project involves the cost-effective field programmable gate array (FPGA) based image processing device that would process the image stream in real-time as well as providing the processed output to support on-the-spot decisions in the crop field. As a result, the real-time FPGA-based image processing system would reduce operating costs while minimizing a few intermediate steps to deliver scalable field decisions.Keywords: real-time, FPGA, drone imagery, image processing, crop monitoring
Procedia PDF Downloads 11377 Design and Fabrication of a Programmable Stiffness-Sensitive Gripper for Object Handling
Authors: Mehdi Modabberifar, Sanaz Jabary, Mojtaba Ghodsi
Abstract:
Stiffness sensing is an important issue in medical diagnostic, robotics surgery, safe handling, and safe grasping of objects in production lines. Detecting and obtaining the characteristics in dwelling lumps embedded in a soft tissue and safe removing and handling of detected lumps is needed in surgery. Also in industry, grasping and handling an object without damaging in a place where it is not possible to access a human operator is very important. In this paper, a method for object handling is presented. It is based on the use of an intelligent gripper to detect the object stiffness and then setting a programmable force for grasping the object to move it. The main components of this system includes sensors (sensors for measuring force and displacement), electrical (electrical and electronic circuits, tactile data processing and force control system), mechanical (gripper mechanism and driving system for the gripper) and the display unit. The system uses a rotary potentiometer for measuring gripper displacement. A microcontroller using the feedback received by the load cell, mounted on the finger of the gripper, calculates the amount of stiffness, and then commands the gripper motor to apply a certain force on the object. Results of Experiments on some samples with different stiffness show that the gripper works successfully. The gripper can be used in haptic interfaces or robotic systems used for object handling.Keywords: gripper, haptic, stiffness, robotic
Procedia PDF Downloads 358