**Commenced**in January 2007

**Frequency:**Monthly

**Edition:**International

**Paper Count:**13

# Search results for: modulo

##### 13 Improved Modulo 2n +1 Adder Design

**Authors:**
Somayeh Timarchi,
Keivan Navi

**Abstract:**

**Keywords:**
Modulo 2n+1 arithmetic,
residue number
system,
low power,
ripple-carry adders.

##### 12 Efficient Power-Delay Product Modulo 2n+1 Adder Design

**Authors:**
Yavar Safaei Mehrabani,
Mehdi Hosseinzadeh

**Abstract:**

As embedded and portable systems were emerged power consumption of circuits had been major challenge. On the other hand latency as determines frequency of circuits is also vital task. Therefore, trade off between both of them will be desirable. Modulo 2n+1 adders are important part of the residue number system (RNS) based arithmetic units with the interesting moduli set (2n-1,2n, 2n+1). In this manuscript we have introduced novel binary representation to the design of modulo 2n+1 adder. VLSI realization of proposed architecture under 180 nm full static CMOS technology reveals its superiority in terms of area, power consumption and power-delay product (PDP) against several peer existing structures.

**Keywords:**
Computer arithmetic,
modulo 2n+1 adders,
Residue Number System (RNS),
VLSI.

##### 11 Group of p-th Roots of Unity Modulo n

**Authors:**
Rochdi Omami,
Mohamed Omami,
Raouf Ouni

**Abstract:**

Let n ≥ 3 be an integer and p be a prime odd number. Let us consider Gp(n) the subgroup of (Z/nZ)* defined by : Gp(n) = {x ∈ (Z/nZ)* / xp = 1}. In this paper, we give an algorithm that computes a generating set of this subgroup.

**Keywords:**
Group,
p-th roots,
modulo,
unity.

##### 10 Group of Square Roots of Unity Modulo n

**Authors:**
Rochdi Omami,
Mohamed Omami,
Raouf Ouni

**Abstract:**

**Keywords:**
Group,
modulo,
square roots,
unity.

##### 9 Classification of the Bachet Elliptic Curves y2 = x3 + a3 in Fp, where p ≡ 1 (mod 6) is Prime

**Authors:**
Nazli Yildiz İkikardes,
Gokhan Soydan,
Musa Demirci,
Ismail Naci Cangul

**Abstract:**

**Keywords:**
Elliptic curves over finite fields,
quadratic residue,
cubic residue.

##### 8 The Number of Rational Points on Elliptic Curves y2 = x3 + a3 on Finite Fields

**Authors:**
Musa Demirci,
Nazlı Yıldız İkikardeş,
Gökhan Soydan,
İsmail Naci Cangül

**Abstract:**

**Keywords:**
Elliptic curves over finite fields,
rational points,
quadratic residue.

##### 7 Equalities in a Variety of Multiple Algebras

**Authors:**
Mona Taheri

**Abstract:**

**Keywords:**
hypergroup,
multiple algebras

##### 6 A Formal Property Verification for Aspect-Oriented Programs in Software Development

**Authors:**
Moustapha Bande,
Hakima Ould-Slimane,
Hanifa Boucheneb

**Abstract:**

**Keywords:**
Aspect-oriented programming,
control flow graph,
satisfiability modulo theories,
property verification.

##### 5 Assessing the Relation between Theory of Multiple Algebras and Universal Algebras

**Authors:**
Mona Taheri

**Abstract:**

**Keywords:**
multiple algebras ,
universal algebras

##### 4 Public Key Cryptosystem based on Number Theoretic Transforms

**Authors:**
C. Porkodi,
R. Arumuganathan

**Abstract:**

**Keywords:**
Cryptography,
decryption,
discrete logarithm
problem encryption,
Integer Factorization problem,
Key agreement,
Number Theoretic Transform.

##### 3 Optimization of SAD Algorithm on VLIW DSP

**Authors:**
Hui-Jae You,
Sun-Tae Chung,
Souhwan Jung

**Abstract:**

**Keywords:**
Optimal implementation,
SAD algorithm,
VLIW,
TMS320C6713.

##### 2 An Efficient Architecture for Interleaved Modular Multiplication

**Authors:**
Ahmad M. Abdel Fattah,
Ayman M. Bahaa El-Din,
Hossam M.A. Fahmy

**Abstract:**

**Keywords:**
Montgomery multiplication,
modular multiplication,
efficient architecture,
FPGA,
RSA

##### 1 A Novel Multiple Valued Logic OHRNS Modulo rn Adder Circuit

**Authors:**
Mehdi Hosseinzadeh,
Somayyeh Jafarali Jassbi,
Keivan Navi

**Abstract:**

Residue Number System (RNS) is a modular representation and is proved to be an instrumental tool in many digital signal processing (DSP) applications which require high-speed computations. RNS is an integer and non weighted number system; it can support parallel, carry-free, high-speed and low power arithmetic. A very interesting correspondence exists between the concepts of Multiple Valued Logic (MVL) and Residue Number Arithmetic. If the number of levels used to represent MVL signals is chosen to be consistent with the moduli which create the finite rings in the RNS, MVL becomes a very natural representation for the RNS. There are two concerns related to the application of this Number System: reaching the most possible speed and the largest dynamic range. There is a conflict when one wants to resolve both these problem. That is augmenting the dynamic range results in reducing the speed in the same time. For achieving the most performance a method is considere named “One-Hot Residue Number System" in this implementation the propagation is only equal to one transistor delay. The problem with this method is the huge increase in the number of transistors they are increased in order m^{2} . In real application this is practically impossible. In this paper combining the Multiple Valued Logic and One-Hot Residue Number System we represent a new method to resolve both of these two problems. In this paper we represent a novel design of an OHRNS-based adder circuit. This circuit is useable for Multiple Valued Logic moduli, in comparison to other RNS design; this circuit has considerably improved the number of transistors and power consumption.

**Keywords:**
Computer Arithmetic,
Residue Number System,
Multiple Valued Logic,
One-Hot,
VLSI.