Search results for: 8051 processor

Authors: S. Thomet, S. De-Paoli, F. Ghaffari, J. M. Daveau, P. Roche, O. Romain

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In this paper, we present a hardware module dedicated to understanding the fail reason of a System on Chip (SoC) exposed to a particle beam. Impact of Single-Event Effects (SEE) on processor-based SoCs is a concern that has increased in the past decade, particularly for terrestrial applications with automotive safety increasing requirements, as well as consumer and industrial domains. The SEE created by the impact of a particle on an SoC may have consequences that can end to instability or crashes. Specific hardening techniques for hardware and software have been developed to make such systems more reliable. SoC is then qualified using cosmic ray Accelerated Soft-Error Rate (ASER) to ensure the Soft-Error Rate (SER) remains in mission profiles. Understanding where errors are occurring is another challenge because of the complexity of operations performed in an SoC. Common techniques to monitor an SoC running under a beam are based on non-intrusive debug, consisting of recording the program counter and doing some consistency checking on the fly. To detect and understand SEE, we have developed a module embedded within the SoC that provide support for recording probes, hardware watchpoints, and a memory mapped register bank dedicated to software usage. To identify CPU failure modes and the most important resources to probe, we have carried out a fault injection campaign on the RTL model of the SoC. Probes are placed on generic CPU registers and bus accesses. They highlight the propagation of errors and allow identifying the failure modes. Typical resulting errors are bit-flips in resources creating bad addresses, illegal instructions, longer than expected loops, or incorrect bus accesses. Although our module is processor agnostic, it has been interfaced to a RISC-V by probing some of the processor registers. Probes are then recorded in a ring buffer. Associated hardware watchpoints are allowing to do some control, such as start or stop event recording or halt the processor. Finally, the module is also providing a bank of registers where the firmware running on the SoC can log information. Typical usage is for operating system context switch recording. The module is connected to a dedicated debug bus and is interfaced to a remote controller via a debugger link. Thus, a remote controller can interact with the monitoring module without any intrusiveness on the SoC. Moreover, in case of CPU unresponsiveness, or system-bus stall, the recorded information can still be recovered, providing the fail reason. A preliminary version of the module has been integrated into a test chip currently being manufactured at ST in 28-nm FDSOI technology. The module has been triplicated to provide reliable information on the SoC behavior. As the primary application domain is automotive and safety, the efficiency of the module will be evaluated by exposing the test chip under a fast-neutron beam by the end of the year. In the meantime, it will be tested with alpha particles and electromagnetic fault injection (EMFI). We will report in the paper on fault-injection results as well as irradiation results.

Keywords: fault injection, SoC fail reason, SoC soft error rate, terrestrial application

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Authors: J. Van Engeland, C. Lavigne, S. De Jaeger

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In the light of the transition towards a more circular economy, recovery of products, parts or materials will gain in importance. Additionally, the EU proximity principle related to waste management and emissions generated by transporting large amounts of end-of-life products, shift attention to local recovery networks. The Flemish inter-communal cooperation for municipal solid waste management Meetjesland (IVM) is currently investigating the set-up of such a network. More specifically, the network encompasses the recycling of polyvinyl chloride (PVC), which is collected in separate containers. When these containers are full, a truck should transport them to the processor which can recycle the PVC into new products. This paper proposes a model to optimize the container collection. The containers are located at different Civic Amenity sites (CA sites) in a certain region. Since people can drop off their waste at these CA sites, the containers will gradually fill up during a planning horizon. If a certain container is full, it has to be collected and replaced by an empty container. The collected waste is then transported to a single processor. To perform this collection and transportation of containers, the responsible firm has a set of vehicles stationed at a single depot and different personnel crews. A vehicle can load exactly one container. If a trailer is attached to the vehicle, it can load an additional container. Each day of the planning horizon, the different crews and vehicles leave the depot to collect containers at the different sites. After loading one or two containers, the crew has to drive to the processor for unloading the waste and to pick up empty containers. Afterwards, the crew can again visit sites or it can return to the depot to end its collection work for that day. All along the collection process, the crew has to respect the opening hours of the sites. In order to allow for some flexibility, a crew is allowed to wait a certain amount of time at the gate of a site until it opens. The problem described can be modelled as a variant to the PVRP-TW (Periodic Vehicle Routing Problem with Time Windows). However, a vehicle can at maximum load two containers, hence only two subsequent site visits are possible. For that reason, we will refer to the model as a model for building tactical waste collection schemes. The goal is to a find a schedule describing which crew should visit which CA site on which day to minimize the number of trucks and the routing costs. The model was coded in IBM CPLEX Optimization studio and applied to a number of test instances. Good results were obtained, and specific suggestions concerning route and truck costs could be made. For a large range of input parameters, collection schemes using two trucks are obtained.

Keywords: container collection, crew scheduling, mixed integer linear programming, waste management

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Authors: Prasad Kalagura, B. Veeresh kumar

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We constructed an interface system that would allow a similarly paralyzed user to interact with a computer with almost full functional capability. A real-time tracking algorithm is implemented based on adaptive skin detection and motion analysis. The clicking of the mouse is activated by the user's eye blinking through a sensor. The keyboard function is implemented by voice recognition kit.

Keywords: embedded ARM7 processor, mouse pointer control, voice recognition

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Authors: Akm Shahidullah

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This paper assessed the medicinal plants production and related entrepreneurial and management aspects with a focus to understand the present medicinal plants-based supply chain of Bangladesh. It delineated the overall supply chain and the extent of benefit that the plant-producingagrientrepreneursderive out of the existing system of the chain. The key objective was to put forward innovative supply chain strategiesthatcan leverage the benefit of the rural farmer-entrepreneur of medicinal plants. A field-based investigation was carried out in the Natore district of northwest Bangladesh, where a total of 225 farmers and households from eight villages were engaged in the production of medicinal plant species. The research had a survey with the agrientrepreneurs of two of those villages and focus group discussions at a union level to gather information about the price, buyers, seasonality, and overall supply infrastructure and trading mechanisms of the plant products. The research also gathered explanations on the overall supply chain system of the plants and plant-based processed products through key informant interviews with the local and regional selling agents, stockists, wholesalers, and secondary processors. The findings revealed that, in the existing supply chain system, the primary and wholesale secondary markets were mostly dominated by middlemen who cause market distortions and inflated prices due to a lack of coordination between the primary producers and secondary processors. The discoordination and inefficiencies in the supply chain system could be offset by the producer-processor relationship integration that could result in a multitude of benefits to both the parties in terms of price, quality, lead time, and overall control of the supply chain. Therefore, to ensure the growth of medicinal plants production, the industry users, secondary processors, and policy stakeholders should ensure that the primary producers get the fair share of the benefit; the producer-processor relationship integration in the supply chain offers to ensure that fairness with maximum producer surplus.

Keywords: medicinal-plants, agrientrepreneur, supply chain, relationship integration, Bangladesh

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Authors: M. K. Benhaoua, A. E. H. Benyamina, T. Djeradi, P. Boulet

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In this paper, we propose adaptive routing that considers the routing of communications in order to optimize the overall performance. The routing technique uses a newly proposed Algorithm to route communications between the tasks. The routing we propose of the communications leads to a better optimization of several performance metrics (time and energy consumption). Experimental results show that the proposed routing approach provides significant performance improvements when compared to those using static routing.

Keywords: multi-processor systems-on-chip (mpsocs), network-on-chip (noc), heterogeneous architectures, adaptive routin

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Authors: Keshav Raj Acharya, Prabina Sharma

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Sugandhakokila (Cinnamomum glaucescens Nees. Dury) is a large evergreen native tree species; mostly confined naturally in mid-hills of Rapti Zone of Nepal. The species is identified as prioritized for agro-technology development as well as for research and development by a department of plant resources. This species is band for export outside the country without processing by the government of Nepal to encourage the value addition within the country. The present study was carried out in Chillikot village of Dang district to find out the economic contribution of C. glaucescens in the local economy and to document the major conservation threats for this species. Participatory Rural Appraisal (PRA) tools such as Household survey, key informants interviews and focus group discussions were carried out to collect the data. The present study reveals that about 1.7 million Nepalese rupees (NPR) have been contributed annually in the local economy of 29 households from the collection of C. glaucescens berries in the study area. The average annual income of each family was around NPR 67,165.38 (US$ 569.19) from the sale of the berries which contributes about 53% of the total household income. Six different value chain actors are involved in C. glaucescens business. Maximum profit margin was taken by collector followed by producer, exporter and processor. The profit margin was found minimum to regional and village traders. The total profit margin for producers was NPR 138.86/kg, and regional traders have gained NPR 17/kg. However, there is a possibility to increase the profit of producers by NPR 8.00 more for each kg of berries through the initiation of community forest user group and village cooperatives in the area. Open access resource, infestation by an insect to over matured trees and browsing by goats were identified as major conservation threats for this species. Handing over the national forest as a community forest, linking the producers with the processor through organized market channel and replacing the old tree through new plantation has been recommended for future.

Keywords: community forest, conservation threats, C. glaucescens, value chain analysis

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Authors: M. K. Benhaoua, A. K. Singh, A. E. H. Benyamina

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In this paper, we propose heuristic for dynamic communications mapping that considers the placement of communications in order to optimize the overall performance. The mapping technique uses a newly proposed Algorithm to place communications between the tasks. The placement we propose of the communications leads to a better optimization of several performance metrics (time and energy consumption). Experimental results show that the proposed mapping approach provides significant performance improvements when compared to those using static routing.

Keywords: Multi-Processor Systems-on-Chip (MPSoCs), Network-on-Chip (NoC), heterogeneous architectures, dynamic mapping heuristics

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Authors: Hung-Yuan Chang, Wen-Lung Chiang, Kuo-Liang Wu, Chen-Tsung Lin

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National Space Organization (NSPO) has completed in 2014 the development of a space-borne GPS receiver, including design, manufacture, comprehensive functional test, environmental qualification test and so on. The main performance of this receiver include 8-meter positioning accuracy, 0.05 m/sec speed-accuracy, the longest 90 seconds of cold start time, and up to 15g high dynamic scenario. The receiver will be integrated in the autonomous FORMOSAT-7 NSPO-Built satellite scheduled to be launched in 2019 to execute pre-defined scientific missions. The flight model of this receiver manufactured in early 2015 will pass comprehensive functional tests and environmental acceptance tests, etc., which are expected to be completed by the end of 2015. The space-borne GPS receiver is a pure software design in which all GPS baseband signal processing are executed by a digital signal processor (DSP), currently only 50% of its throughput being used. In response to the booming global navigation satellite systems, NSPO will gradually expand this receiver to become a multi-mode, multi-band, high-precision navigation receiver, and even a science payload, such as the reflectometry receiver of a global navigation satellite system. The fundamental purpose of this extension study is to port some software algorithms such as signal acquisition and correlation, reused code and large amount of computation load to the FPGA whose processor is responsible for operational control, navigation solution, and orbit propagation and so on. Due to the development and evolution of the FPGA is pretty fast, the new system architecture upgraded via an FPGA should be able to achieve the goal of being a multi-mode, multi-band high-precision navigation receiver, or scientific receiver. Finally, the results of tests show that the new system architecture not only retains the original overall performance, but also sets aside more resources available for future expansion possibility. This paper will explain the detailed DSP/FPGA architecture, development, test results, and the goals of next development stage of this receiver.

Keywords: space-borne, GPS receiver, DSP, FPGA, multi-mode multi-band

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Authors: Turgut Ayten, Tayfun Çay

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In the current expropriation of Turkey, the state acquires necessary lands for its investment without permission of the owners and not searching for alternative solutions, so it is determined that neither processor nor processed is not happy. In this study, interactions of enterprises in Turkey are analysed in case the necessary land for public investments are acquired by expropriation purposed land consolidation. Legal basis, positive and negative sides, financial effects to enterprises of this method is evaluated according to Konya Kadınhanı, Kolukısa avenue which is on the Konya-Ankara High-Speed Train Route.

Keywords: expropriation, land consolidation, land consolidation for expropriation purpose, sustainable rural development

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Authors: Jong-Bae Lee, Seongsoo Lee

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Local interconnect network (LIN) is a communication protocol that combines sensors, actuators, and processors to a functional module in automotive applications. In this paper, a LIN ver. 2.2A controller was designed in Verilog hardware description language (Verilog HDL) and implemented in field-programmable gate array (FPGA). Its operation was verified by making full-scale LIN network with the presented FPGA-implemented LIN controller, commercial LIN transceivers, and commercial processors. When described in Verilog HDL and synthesized in 0.18 μm technology, its gate size was about 2,300 gates.

Keywords: local interconnect network, controller, transceiver, processor

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Authors: Yiannis G. Smirlis

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The classification and the prediction of efficiencies in Data Envelopment Analysis (DEA) is an important issue, especially in large scale problems or when new units frequently enter the under-assessment set. In this paper, we contribute to the subject by proposing a grid structure based on interval segmentations of the range of values for the inputs and outputs. Such intervals combined, define hyper-rectangles that partition the space of the problem. This structure, exploited by Interval DEA models and a dominance relation, acts as a DEA pre-processor, enabling the classification and prediction of efficiency scores, without applying any DEA models.

Keywords: data envelopment analysis, interval DEA, efficiency classification, efficiency prediction

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Authors: Gete Umbrey, Saifur Rahman

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Graphs are found to be most capable in computing, and its abstract structures have been applied in some specific computations and algorithms like in phase encoding controller, processor microcontroller, and synthesis of a CMOS switching network, etc. Being motivated by these works, we develop an independent approach to study semiring structures and various properties by defining the binary operations which in fact, seems analogous to an existing definition in some sense but with a different approach. This work emphasizes specifically on the construction of semigroup and semiring structures on the set of undirected graphs, and their properties are investigated therein. It is expected that the investigation done here may have some interesting applications in theoretical computer science, networking and decision making, and also on joining of two network systems.

Keywords: graphs, join and union of graphs, semiring, weighted graphs

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Authors: Kumar Sambhav Pandey, Anamika Singh

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The continuous researches in the field of computer architecture basically aims at accelerating the computational speed and to gain enhanced performance. In this era, the superscalar, sub-scalar concept has not gained enough attention for improving the computation performance. In this paper, we have presented a sub-scalar approach to utilize the parallelism present with in the data while processing. The main idea is to split the data into individual smaller entities and these entities are processed with a defined known set of instructions. This sub-scalar approach to the MIPS architecture can bring out significant improvement in the computational speedup. MIPS-I is the basic design taken in consideration for the development of sub-scalar MIPS64 for increasing the instruction level parallelism (ILP) and resource utilization.

Keywords: dataword, MIPS, processor, sub-scalar

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Authors: Jaehyung An, Sungjoo Lee

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Patent documents constitute an up-to-date and reliable source of knowledge for reflecting technological advance, so patent analysis has been widely used for identification of technological trends and formulation of technology strategies. But, identifying technological information from patent data entails some limitations such as, high cost, complexity, and inconsistency because it rely on the expert’ knowledge. To overcome these limitations, researchers have applied to a quantitative analysis based on the keyword technique. By using this method, you can include a technological implication, particularly patent documents, or extract a keyword that indicates the important contents. However, it only uses the simple-counting method by keyword frequency, so it cannot take into account the sematic relationship with the keywords and sematic information such as, how the technologies are used in their technology area and how the technologies affect the other technologies. To automatically analyze unstructured technological information in patents to extract the semantic information, it should be transformed into an abstracted form that includes the technological key concepts. Specific sentence structure ‘SAO’ (subject, action, object) is newly emerged by representing ‘key concepts’ and can be extracted by NLP (Natural language processor). An SAO structure can be organized in a problem-solution format if the action-object (AO) states that the problem and subject (S) form the solution. In this paper, we propose the new methodology that can extract the SAO structure through technical elements extracting rules. Although sentence structures in the patents text have a unique format, prior studies have depended on general NLP (Natural language processor) applied to the common documents such as newspaper, research paper, and twitter mentions, so it cannot take into account the specific sentence structure types of the patent documents. To overcome this limitation, we identified a unique form of the patent sentences and defined the SAO structures in the patents text data. There are four types of technical elements that consist of technology adoption purpose, application area, tool for technology, and technical components. These four types of sentence structures from patents have their own specific word structure by location or sequence of the part of speech at each sentence. Finally, we developed algorithms for extracting SAOs and this result offer insight for the technology innovation process by providing different perspectives of technology.

Keywords: NLP, patent analysis, SAO, semantic-analysis

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Authors: Vojtěch Gybas, Libor Klubal, Kateřina Kostolányová

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This case study responds to the current trends in ICT. Mobile Touch iPads can provide very good assistance to disabled seniors. The intuitive tablet environment, the possibility of the formation environment and its portability, has a very positive effect on the use of particular communication. For comparison, using a conventional PC/notebook, word processor, keyboard and computer mouse compared to the iPad and selected applications. The results of this case study show that the use of mobile touch devices iPad for seniors with mental retardation is a great benefit. These devices do not require high demands on graphomotorics like a standard PC devices.

Keywords: ICT, iPad, handicapped seniors, communication, computer/notebook, applications, text editor

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Authors: Can Xiao, Ouanhong Jiang

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Based on the two instruction sets of complex instruction set computing (CISC) and reduced instruction set computing (RISC), processors developed in their respective “expertise” fields. This paper will summarize research on the differences in performance and energy efficiency between CISC and RISC and strive to eliminate the influence of peripheral configuration factors. We will discuss whether processor performance is centered around instruction sets or implementation. In addition, the rapidly developing RISC-V poses a challenge to existing models. We will analyze research results, analyze the impact of instruction sets themselves, and finally make suggestions for the development of RISC-V.

Keywords: ISA, RISC-V, ARM, X86, power, energy efficiency

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Authors: Tomas Seidl

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'Enjoy the Czech traditions with all sences!' is the main communication headline of one of the major current marketing project representing the intangible cultural heritage of the Czech Republic to its visitors. The project CZ.1.06/4.1.00/12.08915 and CZ.1.06/4.1.00/12.08916 which is solved in the period 2013-2015 is co-financed form the EU financial sources from the Integrated Operational Programme. The primary goal of the project was to analyze the dislocation and potential of the intangible cultural heritage in the Czech Republic. Further goal was to prepare a useful regionalization. An as solution based on the outcomes the creative and media strategy was created and prepared. The processor – CzechTourism expect the following web and mobile application development and successful marketing campaign in 2015.

Keywords: traditions, intangible cultural heritage, Czech Republic, CzechTourism, digital performance

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Authors: Jasbir Singh Gill, Baljit Singh

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Scheduling and mapping the application task graph on multiprocessor parallel systems is considered as the most crucial and critical NP-complete problem. Many genetic algorithms have been proposed to solve such problems. In this paper, two genetic approach based algorithms have been designed and developed with or without task duplication. The proposed algorithms work on two fitness functions. The first fitness i.e. task fitness is used to minimize the total finish time of the schedule (schedule length) while the second fitness function i.e. process fitness is concerned with allocating the tasks to the available highly efficient processor from the list of available processors (load balance). Proposed genetic-based algorithms have been experimentally implemented and evaluated with other state-of-art popular and widely used algorithms.

Keywords: parallel computing, task scheduling, task duplication, genetic algorithm

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Authors: U. Pruthviraj, Praveen Kumar R. A. K. Athul, K. V. Gangadharan, S. Rao Shrikantha

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An open source based autonomous unmanned marine surface vehicle (UMSV) is developed for some of the marine applications such as pollution control, environmental monitoring and thermal imaging. A double rotomoulded hull boat is deployed which is rugged, tough, quick to deploy and moves faster. It is suitable for environmental monitoring, and it is designed for easy maintenance. A 2HP electric outboard marine motor is used which is powered by a lithium-ion battery and can also be charged from a solar charger. All connections are completely waterproof to IP67 ratings. In full throttle speed, the marine motor is capable of up to 7 kmph. The motor is integrated with an open source based controller using cortex M4F for adjusting the direction of the motor. This UMSV can be operated by three modes: semi-autonomous, manual and fully automated. One of the channels of a 2.4GHz radio link 8 channel transmitter is used for toggling between different modes of the USMV. In this electric outboard marine motor an on board GPS system has been fitted to find the range and GPS positioning. The entire system can be assembled in the field in less than 10 minutes. A Flir Lepton thermal camera core, is integrated with a 64-bit quad-core Linux based open source processor, facilitating real-time capturing of thermal images and the results are stored in a micro SD card which is a data storage device for the system. The thermal camera is interfaced to an open source processor through SPI protocol. These thermal images are used for finding oil spills and to look for people who are drowning at low visibility during the night time. A Real Time clock (RTC) module is attached with the battery to provide the date and time of thermal images captured. For the live video feed, a 900MHz long range video transmitter and receiver is setup by which from a higher power output a longer range of 40miles has been achieved. A Multi-parameter probe is used to measure the following parameters: conductivity, salinity, resistivity, density, dissolved oxygen content, ORP (Oxidation-Reduction Potential), pH level, temperature, water level and pressure (absolute).The maximum pressure it can withstand 160 psi, up to 100m. This work represents a field demonstration of an open source based autonomous navigation system for a marine surface vehicle.

Keywords: open source, autonomous navigation, environmental monitoring, UMSV, outboard motor, multi-parameter probe

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Authors: Ersan Aktas, Eren Turanoğuz

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In this study, the quad-electrical rotor driven unmanned aerial vehicle system is designed and modeled using fundamental dynamic equations. After that, mechanical, electronical and control system of the air vehicle are designed and implemented. Brushless motor speeds are altered via electronic speed controllers in order to achieve desired controllability. The vehicle's fundamental Euler angles (i.e., roll angle, pitch angle, and yaw angle) are obtained via AHRS sensor. These angles are provided as an input to the control algorithm that run on soft the processor on the electronic card. The vehicle control algorithm is implemented in the electronic card. Controller is designed and improved for each Euler angles. Finally, flight tests have been performed to observe and improve the flight characteristics.

Keywords: quadrotor, UAS applications, control architectures, PID

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Authors: Yossiri Ariyakul, Piyakiat Insom, Poonyawat Sangiamkulthavorn, Takamichi Nakamoto

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In this paper, the method of optimization algorithm for sensor network comprised of movable sensor nodes which can be used for odor source localization was proposed. A sensor node is composed of an odor sensor, an anemometer, and a wireless communication module. The odor intensity measured from the sensor nodes are sent to the processor to perform the localization based on optimization algorithm by which the odor source localization map is obtained as a result. The map can represent the exact position of the odor source or show the direction toward it remotely. The proposed method was experimentally validated by creating the odor source localization map using three, four, and five sensor nodes in which the accuracy to predict the position of the odor source can be observed.

Keywords: odor sensor, odor source localization, optimization, sensor network

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Authors: Naime Boudemagh

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In this work, we aim to improve the detection performances of radar systems. To this end, we propose and analyze a novel censoring technique of undesirable samples, of priori unknown positions, that may be present in the environment under investigation. Therefore, we consider heterogeneous backgrounds characterized by the presence of some irregularities such that clutter edge transitions and/or interfering targets. The proposed detector, termed automatic censoring constant false alarm (AC-CFAR), operates exclusively in a Gaussian background. It is built to allow the segmentation of the environment to regions and switch automatically to the appropriate detector; namely, the cell averaging CFAR (CA-CFAR), the censored mean level CFAR (CMLD-CFAR) or the order statistic CFAR (OS-CFAR). Monte Carlo simulations show that the AC-CFAR detector performs like the CA-CFAR in a homogeneous background. Moreover, the proposed processor exhibits considerable robustness in a heterogeneous background.

Keywords: CFAR, automatic censoring, heterogeneous environments, radar systems

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Authors: Shiuh-Jer Huang, Shin-Ham Lee, Sheam-Chyun Lin

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A two wheel inverted pendulum (TWIP) vehicle is built with two hub DC motors for motion control evaluation. Arduino Nano micro-processor is chosen as the control kernel for this electric test plant. Accelerometer and gyroscope sensors are built in to measure the tilt angle and angular velocity of the inverted pendulum vehicle. Since the TWIP has significantly hub motor dead zone and nonlinear system dynamics characteristics, the vehicle system is difficult to control by traditional model based controller. The intelligent model-free fuzzy sliding mode controller (FSMC) was employed as the main control algorithm. Then, intelligent controllers are designed for TWIP balance control, and two wheels synchronization control purposes.

Keywords: balance control, synchronization control, two-wheel inverted pendulum, TWIP

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Authors: Boudjedra Abderrahim, Toumi Salah, Boutalbi Mostefa, Frihi Mohammed

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Nowadays, using the advancement of technology in semiconductor device fabrication, many transistors can be integrated to a single chip (VLSI). Although the growth chip density potentially eases systems-on-chip (SoCs) integrating thousands of processing element (PE) such as memory, processor, interfaces cores, system complexity, high-performance interconnect and scalable on-chip communication architecture become most challenges for many digital and embedded system designers. Networks-on-chip (NoCs) becomes a new paradigm that makes possible integrating heterogeneous devices and allows many communication constraints and performances. In this paper, we are interested for good performance and low area for implementation and a behavioral modeling of network on chip mesh topology design using VHDL hardware description language with performance evaluation and FPGA implementation results.

Keywords: design, implementation, communication system, network on chip, VHDL

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Authors: Roman Snytsar

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Pseudo-random numbers are often used in scientific computing such as the Monte Carlo Simulations or the Quantum Inspired Optimization. Requirements for a parallel random number generator running in the modern multi-core vector environment are more stringent than those for sequential random number generators. As well as passing the usual quality tests, the output of the parallel random number generator must be verifiable and reproducible throughout the concurrent execution. We propose a family of vectorized Permuted Congruential Generators. Implementations are available for multiple modern vector modern computer architectures. Besides demonstrating good single core performance, the generators scale easily across many processor cores and multiple distributed nodes. We provide performance and parallel speedup analysis and comparisons between the implementations.

Keywords: pseudo-random numbers, quantum optimization, SIMD, parallel computing

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Authors: Boudemagh Naime

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Automatic radar detection requires some methods of adapting to variations in the background clutter in order to control their false alarm rate. The problem becomes more complicated in non-Gaussian environment. In fact, the conventional approach in real time applications requires a complex statistical modeling and much computational operations. To overcome these constraints, we propose another approach based on artificial neural network (ANN-CMLD-CFAR) using a Back Propagation (BP) training algorithm. The considered environment follows a log-normal distribution in the presence of multiple Rayleigh-targets. To evaluate the performances of the considered detector, several situations, such as scale parameter and the number of interferes targets, have been investigated. The simulation results show that the ANN-CMLD-CFAR processor outperforms the conventional statistical one.

Keywords: radat detection, ANN-CMLD-CFAR, log-normal clutter, statistical modelling

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Authors: Aleksey Fedorov

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Building a scalable platform for quantum computing remains one of the most challenging tasks in quantum science and technologies. However, the implementation of most important quantum operations with qubits (quantum analogues of classical bits), such as multiqubit Toffoli gate, requires either a polynomial number of operation or a linear number of operations with the use of ancilla qubits. Therefore, the reduction of the number of operations in the presence of scalability is a crucial goal in quantum information processing. One of the most elegant ideas in this direction is to use qudits (multilevel systems) instead of qubits and rely on additional levels of qudits instead of ancillas. Although some of the already obtained results demonstrate a reduction of the number of operation, they suffer from high complexity and/or of the absence of scalability. We show a strong reduction of the number of operations for the realization of the Toffoli gate by using qudits for a scalable multi-qudit processor. This is done on the basis of a general relation between the dimensionality of qudits and their topology of connections, that we derived.

Keywords: quantum computing, qudits, Toffoli gates, gate decomposition

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Authors: Hyun Chul Koag, Hyun-Sik Ahn

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In this paper, we propose a design approach for the safety mechanism of an actuator used in a commercial vehicle’s EPS system. As the number of electric/electronic system in a vehicle increases, the importance of the functional safety has been receiving much attention. EPS(Electric Power Steering) systems for commercial vehicles require large power than passenger vehicles, and hence, dual motor can be applied to get more torque. We show how to formulate the development process for the design of hardware and software of an EPS system using dual motors. A lot of safety mechanisms for the processor, sensors, and memory have been suggested, however, those for actuators have not been fully researched. It is shown by metric analyses that the target ASIL(Automotive Safety Integrated Level) is satisfied in the point of view of hardware of EPS controller.

Keywords: safety mechanism, functional safety, commercial vehicles, electric power steering

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Authors: Gagandeep Kaur

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Cloud computing uses various computing resources such as CPU, memory, processor etc. which is used to deliver service over the network and is one of the emerging fields for large scale distributed computing. In cloud computing, execution of large number of tasks with available resources to achieve high performance, minimal total time for completion, minimum response time, effective utilization of resources etc. are the major research areas. In the proposed research, an algorithm has been proposed to achieve high performance in load balancing and resource utilization. The proposed algorithm is used to reduce the makespan, increase the resource utilization and performance cost for independent tasks. Further scheduling metrics based on algorithm in cloud computing has been proposed.

Keywords: resource utilization, response time, load balancing, performance cost

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Authors: Liang Zhao, Chong-quan Zhong

Abstract:

In order to improve the control performance of vector inverter, an improved parameter identification solution for induction motor is proposed in this paper. Dc or AC voltage is applied to the induction motor using the SVPWM through the inverter. Then stator resistance, stator leakage inductance, rotor resistance, rotor leakage inductance and mutual inductance are obtained according to the signal response. The discrete Fourier transform (DFT) is used to deal with the noise and harmonic. The impact on parameter identification caused by delays in the inverter switch tube, tube voltage drop and dead-time is avoided by effective compensation measures. Finally, the parameter identification experiment is conducted based on the vector inverter which using TMS320F2808 DSP as the core processor and results show that the strategy is verified.

Keywords: vector inverter, parameter identification, SVPWM; DFT, dead-time compensation

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