Search results for: Vedic.

Authors: Shobha Sharma, Amita Dev, Akanksha Kant

Abstract:

Digital signal processor, image signal processor and FIR filters have multipliers as an important part of their design. On the basis of Vedic mathematics, Vedic multipliers have come out to be very fast multipliers. One of the image processing applications is edge detection. This research presents a small area and high speed 8 bit Vedic multiplier system comprising of compressor based adders. This results in faster edge detection. This architecture is tested on Xilinx vertex 4 FPGA board and simulations were carried out using the Xilinx synthesis tool. Comparisons are made and this system is found to be smaller in area with high speed (the lesser propagation delay). This compressor based Vedic multiplier is 1.1 times speedier than a typical Vedic multiplier. Also, this Vedic Multiplier is 2 times speedier than a ‘simple’ multiplier.

Keywords: Detection of edges, Vedic multiplier, image processing, Urdhva Tiryakbhyam sutra.

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Authors: Zulhelmi Zakaria, Shuja A. Abbasi

Abstract:

A new approach has been used for optimized design of multipliers based upon the concepts of Vedic mathematics. The design has been targeted to state-of-the art field-programmable gate arrays (FPGAs). The multiplier generates partial products using Vedic mathematics method by employing basic 4x4 multipliers designed by exploiting 6-input LUTs and multiplexers in the same slices resulting in drastic reduction in area. The multiplier is realized on Xilinx FPGAs using devices Virtex-5 and Virtex-6.Carry Chain Adder was employed to obtain final products. The performance of the proposed multiplier was examined and compared to well-known multipliers such as Booth, Carry Save, Carry ripple, and array multipliers. It is demonstrated that the proposed multiplier is superior in terms of speed as well as power consumption.

Keywords: Multiplier, Vedic Mathematics, LUTs, FPGAs.

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Authors: Akhilesh G. Naik, Dipankar Pal

Abstract:

In today’s scenario, the complexity of digital signal processing (DSP) applications and various microcontroller architectures have been increasing to such an extent that the traditional approaches to multiplier design in most processors are becoming outdated for being comparatively slow. Modern processing applications require suitable pipelined approaches, and therefore, algorithms that are friendlier with pipelined architectures. Traditional algorithms like Wallace Tree, Radix-4 Booth, Radix-8 Booth, Dadda architectures have been proven to be comparatively slow for pipelined architectures. These architectures, therefore, need to be optimized or combined with other architectures amongst them to enhance its performances and to be made suitable for pipelined hardware/architectures. Recently, Vedic algorithm mathematically has proven to be efficient by appearing to be less complex and with fewer steps for its output establishment and have assumed renewed importance. This paper describes and shows how the Vedic algorithm can be better suited for pipelined architectures and also can be combined with traditional architectures and algorithms for enhancing its ability even further. In this paper, we also established that for complex applications on DSP and other microcontroller architectures, using Vedic approach for multiplication proves to be the best available and efficient option.

Keywords: Wallace tree, Radix-4 Booth, Radix-8 Booth, Dadda, Vedic, Single-Stage Karatsuba, Looped Karatsuba.

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Authors: A. Bandyopadhyay

Abstract:

Vedic philosophy is one of the oldest existing philosophies of the world. Started around 6500 BC, in Western Indian subcontinent, the Indus valley Civilizations developed a theology which, gradually developed into a well-established philosophy of beliefs, popularly known as ‘Hindu religion’. In Vedic theology, the abstract concept of God was formulated mostly by close observation of the dynamicity and the recurrence of natural and universal phenomena. Through the ages, the philosophy of this theology went through various discursions, debates, and questionings and the abstract concept of God was, in time, formalized into more representational forms by the means of various signs and symbols. Often, these symbols were used in more subtle ways in the construction of “sacred” sculptures and structures. Apparently, two different philosophies were developed from the Vedic philosophy and these two philosophies are mostly seen in the northern part and southern part of the Indian subcontinent. This paper tries to summarize the complex philosophical treaties of Hinduism of northern and southern India and seeks to understand the meanings of the various signs and symbolisms that were incorporated in the architecture of Hindu temples, including the names given to various parts of the temples. The Hindu temples are not only places of worship or ‘houses of Gods’ like the Greek and Roman temples but are also structures that symbolize the dynamicity and also spiritual upliftment of human beings.

Keywords: Hindu, philosophy, temple, Vedic.

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Authors: Harpreet Singh Dhillon, Abhijit Mitra

Abstract:

A reduced-bit multiplication algorithm based on the ancient Vedic multiplication formulae is proposed in this paper. Both the Vedic multiplication formulae, Urdhva tiryakbhyam and Nikhilam, are first discussed in detail. Urdhva tiryakbhyam, being a general multiplication formula, is equally applicable to all cases of multiplication. It is applied to the digital arithmetic and is shown to yield a multiplier architecture which is very similar to the popular array multiplier. Due to its structure, it leads to a high carry propagation delay in case of multiplication of large numbers. Nikhilam Sutra, on the other hand, is more efficient in the multiplication of large numbers as it reduces the multiplication of two large numbers to that of two smaller numbers. The framework of the proposed algorithm is taken from this Sutra and is further optimized by use of some general arithmetic operations such as expansion and bit-shifting to take advantage of bit-reduction in multiplication. We illustrate the proposed algorithm by reducing a general 4x4-bit multiplication to a single 2 x 2-bit multiplication operation.

Keywords: Multiplication, algorithm, Vedic mathematics, digital arithmetic, reduced-bit.

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Authors: Behzad Moeini Sam, Sara Mohammadi Avandi, Afroz Kianpor

Abstract:

The rituals of fire among the Iranians originate in the general Proto-Indo-European and Indo-Iranian eras when they lived in regions known as the Pontic-Caspian (Indo-Europeans) and Kazakhstan (the Andronovo culture belonging to the Indo-Iranian tribes), and we can get to know about their vulgar heritage despite their separation from each other during several millennia. The early Aryan settlers of Iran had brought their cults to their new home and were bequeathed to them by their Indo-Iranian ancestors. Tradition speaks of several great sacred Iranian fires consecrated by the pre-Zoroastrian kings. Ātar or fire is comparable to the Vedic Agni Atar's functions and elaborately are delineated in the Later Avesta. This paper aims to show the fire cults among the Iranian Lur tribes who originate in the past. Therefore, it will be searched for rituals equally in Indo-European and Indo-Iranian Periods and Old Iranian Texts and their frequency among the Lur tribes. In addition to the library books, we tried to interview the chiefs of Lur tribes. Finally, we concluded that the fire among the Lur Tribes is a sequence of beliefs of the Proto-Indo-European and Indo-Iranian Periods reflected in Old and Middle Iranian texts.

Keywords: Indo-European, Ancient Iran, Fire, Lur, Zoroastrian.

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Authors: S. Pramanik

Abstract:

Since the early ages, the Hindu temples have been interpreted through various Vedic philosophies. These temples are visited by pilgrims which demonstrate the rituals and religious belief of communities, reflecting a variety of actions and behaviors. Darsana— a direct seeing, is a part of the pilgrimage activity. During the process of Darsana, a devotee is prepared for entry in the temple to realize the cognizing Truth culminating in visualizing the idol of God, placed at the Garbhagriha (sanctum sanctorum). For this, the pilgrim must pass through a sequential arrangement of spaces. During the process of progress, the pilgrims visualize the spaces differently from various points of views. The viewpoints create a variety of spatial patterns in the minds of pilgrims coherent to the Hindu philosophies. The space organization and its order are perceived by various techniques of spatial analysis. A temple, as examples of Kalinga stylistic variations, has been chosen for the study. This paper intends to demonstrate some visual patterns generated during the process of Darsana (visibility) and its accessibility by Point Isovist Studies and Visibility Graph Analysis from the entrance (Simha Dwara) to The Sanctum sanctorum (Garbhagriha).

Keywords: Hindu Temple Architecture, Point Isovist, space syntax analysis, visibility graph analysis.

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