Search results for: Computer memory

Authors: Chokri Jebali, Noureddine Boulejfen, Ali Gharsallah, Fadhel M. Ghannouchi

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In this paper, a system level behavioural model for RF power amplifier, which exhibits memory effects, and based on multibranch system is proposed. When higher order terms are included, the memory polynomial model (MPM) exhibits numerical instabilities. A set of memory orthogonal polynomial model (OMPM) is introduced to alleviate the numerical instability problem associated to MPM model. A data scaling and centring algorithm was applied to improve the power amplifier modeling accuracy. Simulation results prove that the numerical instability can be greatly reduced, as well as the model precision improved with nonlinear model.

Keywords: power amplifier, orthogonal model, polynomialmodel , memory effects.

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Authors: Mathew Wakefield, Matthew Mitchell, Lisa Wise, Christopher McCarthy

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This paper aims to provide an interpretation of artificial neural networks (ANNs) and explore some of its implications. The interpretation views ANNs as a memory which encodes instances of experience. An experiment explores the behavior of encoding and retrieval of instances from memory. A localised representation ANN is created that allows control over encoding and retrieved memory sample size and is experimented with using the MNIST digits dataset. The relationship between input familiarity, conflict within retrieved samples, and error rates is described and demonstrated to be an effective driver for memory encoding. Results indicate that selective encoding and retrieval samples that allow detection of memory conflicts produce optimal performance, and that error rates are normally distributed with input familiarity and conflict. By using input familiarity and sample consistency to guide memory encoding, the number of encoding trials on the dataset were reduced to 18.33% of the training data while maintaining good recognition performance on the test data.

Keywords: Artificial Neural Networks, ANNs, representation, memory, conflict monitoring, confidence.

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Authors: A. Brener, B. Balabekov, N. Zhumataev

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In the paper we submit the non-local modification of kinetic Smoluchowski equation for binary aggregation applying to dispersed media having memory. Our supposition consists in that that intensity of evolution of clusters is supposed to be a function of the product of concentrations of the lowest orders clusters at different moments. The new form of kinetic equation for aggregation is derived on the base of the transfer kernels approach. This approach allows considering the influence of relaxation times hierarchy on kinetics of aggregation process in media with memory.

Keywords: Binary aggregation, Media with memory, Non-local model, Relaxation times

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Authors: Guowei Hou, Lixin Yu, Wei Zhuang, Hui Qin, Xue Yang

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Formal verification is proposed to ensure the correctness of the design and make functional verification more efficient. As cache plays a vital role in the design of System on Chip (SoC), and cache with Memory Management Unit (MMU) and cache memory unit makes the state space too large for simulation to verify, then a formal verification is presented for such system design. In the paper, a formal model checking verification flow is suggested and a new cache memory model which is called “exhaustive search model” is proposed. Instead of using large size ram to denote the whole cache memory, exhaustive search model employs just two cache blocks. For cache system contains data cache (Dcache) and instruction cache (Icache), Dcache memory model and Icache memory model are established separately using the same mechanism. At last, the novel model is employed to the verification of a cache which is module of a custom-built SoC system that has been applied in practical, and the result shows that the cache system is verified correctly using the exhaustive search model, and it makes the verification much more manageable and flexible.

Keywords: Cache system, formal verification, novel model, System on Chip (SoC).

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Authors: Anna R. Alyusheva, Veronika V. Nourkova

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The aim of the present paper is to investigate the interdependency among ego-identity status, autobiographical memory and cultural life story schema. The study shows considerable differences between autobiographical memory characteristics and “family script", which is typical for participants (adolescents, M age years = 17.84, SD = 1.18, N = 58), with different ego-identity statuses. Participants with diffused ego-identity status recalled fewer autobiographical memories. Additionally, this group of participants recalled fewer events from their parents- life. Participants with moratorium ego-identity status dated their first recollections to a later age than others, and recalled fewer memories relating to their childhood. Participants with achieved identity status recalled more self-defining memories and events from their parents- life. They used more functions from the autobiographical memory. There weren-t any significant differences between the foreclosed identity status group and the others. These findings support the idea of a bidirectional relation between culture, memory and self.

Keywords: Autobiographical memory, autobiographical narrative, cultural life script, ego-identity

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Authors: Nagi Mekhiel

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Many applications use vector operations by applying single instruction to multiple data that map to different locations in conventional memory. Transferring data from memory is limited by access latency and bandwidth affecting the performance gain of vector processing. We present a memory system that makes all of its content available to processors in time so that processors need not to access the memory, we force each location to be available to all processors at a specific time. The data move in different orbits to become available to other processors in higher orbits at different time. We use this memory to apply parallel vector operations to data streams at first orbit level. Data processed in the first level move to upper orbit one data element at a time, allowing a processor in that orbit to apply another vector operation to deal with serial code limitations inherited in all parallel applications and interleaved it with lower level vector operations.

Keywords: Memory organization, parallel processors, serial code, vector processing.

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Authors: S. Rozhkova, O. Rozhkova, A. Harlova, V. Lasukov

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For optimal unbiased filter as mean-square and in the case of functioning anomalous noises in the observation memory channel, we have proved insensitivity of filter to inaccurate knowledge of the anomalous noise intensity matrix and its equivalence to truncated filter plotted only by non anomalous components of an observation vector.

Keywords: Mathematical expectation, filtration, anomalous noise, memory.

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Authors: Muhammed Yousoof, Mohd Sapiyan, Khaja Kamaluddin

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Many difficulties are faced in the process of learning computer programming. This paper will propose a system framework intended to reduce cognitive load in learning programming. In first section focus is given on the process of learning and the shortcomings of the current approaches to learning programming. Finally the proposed prototype is suggested along with the justification of the prototype. In the proposed prototype the concept map is used as visualization metaphor. Concept maps are similar to the mental schema in long term memory and hence it can reduce cognitive load well. In addition other method such as part code method is also proposed in this framework to can reduce cognitive load.

Keywords: Cognitive load, concept maps, working memory, split attention effect, partial code programs.

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Authors: Andrey R. Khazbulatov, Moldir Nurpeiis

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Contemporary science and technologies largely widen the gap between the spiritual and rational of the society. Industrial and technological breakthroughs might radically affect most processes in the society, thus losing the cultural heritage. The thinkers recognized the dangers of the decadence in the first place. In the present article the ways of preserving cultural heritage have been investigated. Memory has always been a necessary condition for selfidentification, - continuity is based on this. The authors have supported the hypothesis that continuity and ethnic memory are the very mechanisms that preserve cultural heritage. Such problemformulating will facilitate another, new look at the material, spiritual and arts spheres of the cultural heritage of numerous ethnic groups. The fundamental works by major European and Kazakh scientists have been taken as a basis for the research done.

Keywords: Continuity, cultural heritage, ethnic memory

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Authors: Vasily G. Moshnyaga

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This paper presents an optimized MPEG2 video codec implementation, which drastically reduces the number of computations and memory accesses required for video compression. Unlike traditional scheme, we reuse data stored in frame memory to omit unnecessary coding operations and memory read/writes for unchanged macroblocks. Due to dynamic memory sharing among reference frames, data-driven macroblock characterization and selective macroblock processing, we perform less than 15% of the total operations required by a conventional coder while maintaining high picture quality.

Keywords: Data reuse, adaptive processing, video coding, MPEG

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Authors: Anatoli Torokhti, Stan Miklavcic

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We study a new technique for optimal data compression subject to conditions of causality and different types of memory. The technique is based on the assumption that some information about compressed data can be obtained from a solution of the associated problem without constraints of causality and memory. This allows us to consider two separate problem related to compression and decompression subject to those constraints. Their solutions are given and the analysis of the associated errors is provided.

Keywords: stochastic signals, optimization problems in signal processing.

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Authors: C. Galasso

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The ancestral relationship between humans and geographical environment has long been at the center of an interdisciplinary dialogue, which sees one of its main research nodes in the relationship between memory and places. Given its deep complexity, this symbiotic connection continues to look for a proper definition that appears increasingly negotiated by different disciplines. Numerous fields of knowledge are involved, from anthropology to semiotics of space, from photography to architecture, up to subjects traditionally far from these reasonings. This is the case of Design of Communication, a young discipline, now confident in itself and its objectives, aimed at finding and investigating original forms of visualization and representation, between sedimented knowledge and new technologies. In particular, Design of Communication for the Territory offers an alternative perspective to the debate, encouraging the reactivation and reconstruction of the memory of places. Recognizing mnemotopes as a cultural object of vertical interpretation of the memory-place relationship, design can become a real mediator of the territorial fixation of memories, making them increasingly accessible and perceptible, contributing to build a topography of memory. According to a mnemotopic vision, Communication Design can support the passage from a memory in which the observer participates only as an individual to a collective form of memory. A mnemotopic form of Communication Design can, through geolocation and content map-based systems, make chronology a topography rooted in the territory and practicable; it can be useful to understand how the perception of the memory of places changes over time, considering how to insert them in the contemporary world. Mnemotopes can be materialized in different format of translation, editing and narration and then involved in complex systems of communication. The memory of places, therefore, if stabilized by the tools offered by Communication Design, can make visible ruins and territorial stratifications, illuminating them with new communicative interests that can be shared and participated.

Keywords: Memory of places, design of communication, territory, mnemotope, topography of memory.

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Authors: Truong Quang Dang Khoa, Masahiro Nakagawa

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In this paper, a novel associative memory model will be proposed and applied to memory retrievals based on the conventional continuous time model. The conventional model presents memory capacity is very low and retrieval process easily converges to an equilibrium state which is very different from the stored patterns. Genetic Algorithms is well-known with the capability of global optimal search escaping local optimum on progress to reach a global optimum. Based on the well-known idea of Genetic Algorithms, this work proposes a heuristic rule to make a mutation when the state of the network is trapped in a spurious memory. The proposal heuristic associative memory show the stored capacity does not depend on the number of stored patterns and the retrieval ability is up to ~ 1.

Keywords: Artificial Intelligent, Soft Computing, NeuralNetworks, Genetic Algorithms, Hopfield Neural Networks, andAssociative Memories.

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Authors: Vasundara Patel K. S., Harsha N. Bhushan, Kiran G. Gadag, Nischal Prasad B. N., Mohmmed Haroon

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The most widely used semiconductor memory types are the Dynamic Random Access Memory (DRAM) and Static Random Access memory (SRAM). Competition among memory manufacturers drives the need to decrease power consumption and reduce the probability of read failure. A technology that is relatively new and has not been explored is the FinFET technology. In this paper, a single cell Schmitt Trigger Based Static RAM using FinFET technology is proposed and analyzed. The accuracy of the result is validated by means of HSPICE simulations with 32nm FinFET technology and the results are then compared with 6T SRAM using the same technology.

Keywords: Schmitt trigger based SRAM, FinFET, and Static Noise Margin.

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Authors: Chih-Hao Chen, Hsing-Chung Lee, Qingdong Ling, Hsiao-Jung Chen, Sun-Chong Wang, Li-Ching Wu, H.C. Lee

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Segmentation, filtering out of measurement errors and identification of breakpoints are integral parts of any analysis of microarray data for the detection of copy number variation (CNV). Existing algorithms designed for these tasks have had some successes in the past, but they tend to be O(N2) in either computation time or memory requirement, or both, and the rapid advance of microarray resolution has practically rendered such algorithms useless. Here we propose an algorithm, SAD, that is much faster and much less thirsty for memory – O(N) in both computation time and memory requirement -- and offers higher accuracy. The two key ingredients of SAD are the fundamental assumption in statistics that measurement errors are normally distributed and the mathematical relation that the product of two Gaussians is another Gaussian (function). We have produced a computer program for analyzing CNV based on SAD. In addition to being fast and small it offers two important features: quantitative statistics for predictions and, with only two user-decided parameters, ease of use. Its speed shows little dependence on genomic profile. Running on an average modern computer, it completes CNV analyses for a 262 thousand-probe array in ~1 second and a 1.8 million-probe array in 9 seconds

Keywords: Cancer, pathogenesis, chromosomal aberration, copy number variation, segmentation analysis.

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Authors: Chin-Hung Li

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Determining how many virtual machines a Linux host could run can be a challenge. One of tough missions is to find the balance among performance, density and usability. Now KVM hypervisor has become the most popular open source full virtualization solution. It supports several ways of running guests with more memory than host really has. Due to large differences between minimum and maximum guest memory requirements, this paper presents initial results on same-page merging, ballooning and live migration techniques that aims at optimum memory usage on KVM-based cloud platform. Given the design of initial experiments, the results data is worth reference for system administrators. The results from these experiments concluded that each method offers different reliability tradeoff.

Keywords: Kernel-based Virtual Machine, Overcommit, Virtualization.

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Authors: S. Rozhkova, O. Rozhkova, A. Harlova, V. Lasukov

Abstract:

We have conducted the optimal synthesis of rootmean- squared objective filter to estimate the state vector in the case if within the observation channel with memory the anomalous noises with unknown mathematical expectation are complement in the function of the regular noises. The synthesis has been carried out for linear stochastic systems of continuous - time.

Keywords: Mathematical expectation, filtration, anomalous noise, memory.

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Authors: Dhany Saputra, Dayang R. A. Rambli, Oi Mean Foong

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In this paper, we propose an improvement of pattern growth-based PrefixSpan algorithm, called I-PrefixSpan. The general idea of I-PrefixSpan is to use sufficient data structure for Seq-Tree framework and separator database to reduce the execution time and memory usage. Thus, with I-PrefixSpan there is no in-memory database stored after index set is constructed. The experimental result shows that using Java 2, this method improves the speed of PrefixSpan up to almost two orders of magnitude as well as the memory usage to more than one order of magnitude.

Keywords: ArrayList, ArrayIntList, minimum support, sequence database, sequential patterns.

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Authors: Amjad Nusayr

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Software security is a general term used to any type of software architecture or model in which security aspects are incorporated in this architecture. These aspects are not part of the main logic of the underlying program. Software security can be achieved using a combination of approaches including but not limited to secure software designs, third part component validation, and secure coding practices. Memory safety is one feature in software security where we ensure that any object in memory is have a valid pointer or a reference with a valid type. Aspect Oriented Programming (AOP) is a paradigm that is concerned with capturing the cross-cutting concerns in code development. AOP is generally used for common cross-cutting concerns like logging and Database transaction managing. In this paper we introduce the concepts that enable AOP to be used for the purpose of memory and type safety. We also present ideas for extending AOP in software security practices.

Keywords: Aspect oriented programming, programming languages, software security, memory and type safety.

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Authors: A. Alghanim, J. Benedikt, P. J. Tasker

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The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.

Keywords: Low Frequency Memory, IntermodulationDistortion (IMD).

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Authors: Bharatendra Rai

Abstract:

Sequences of words in text data have long-term dependencies and are known to suffer from vanishing gradient problem when developing deep learning models. Although recurrent networks such as long short-term memory networks help overcome this problem, achieving high text classification performance is a challenging problem. Convolutional recurrent networks that combine advantages of long short-term memory networks and convolutional neural networks, can be useful for text classification performance improvements. However, arriving at suitable hyperparameter values for convolutional recurrent networks is still a challenging task where fitting of a model requires significant computing resources. This paper illustrates the advantages of using convolutional recurrent networks for text classification with the help of statistically planned computer experiments for hyperparameter tuning. 

Keywords: Convolutional recurrent networks, hyperparameter tuning, long short-term memory networks, Tukey honest significant differences

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Authors: Ashraf Anwar

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In this work, I present a review on Sparse Distributed Memory for Small Cues (SDMSCue), a variant of Sparse Distributed Memory (SDM) that is capable of handling small cues. I then conduct and show some cognitive experiments on SDMSCue to test its cognitive soundness compared to SDM. Small cues refer to input cues that are presented to memory for reading associations; but have many missing parts or fields from them. The original SDM failed to handle such a problem. SDMSCue handles and overcomes this pitfall. The main idea in SDMSCue; is the repeated projection of the semantic space on smaller subspaces; that are selected based on the input cue length and pattern. This process allows for Read/Write operations using an input cue that is missing a large portion. SDMSCue is augmented with the use of genetic algorithms for memory allocation and initialization. I claim that SDM functionality is a subset of SDMSCue functionality.

Keywords: Artificial intelligence, recall, recognition, SDM, SDMSCue.

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Authors: Yi-Pin Hsu, Shin-Yu Lin

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An efficient parallel form in digital signal processor can improve the algorithm performance. The butterfly structure is an important role in fast Fourier transform (FFT), because its symmetry form is suitable for hardware implementation. Although it can perform a symmetric structure, the performance will be reduced under the data-dependent flow characteristic. Even though recent research which call as novel memory reference reduction methods (NMRRM) for FFT focus on reduce memory reference in twiddle factor, the data-dependent property still exists. In this paper, we propose a parallel-computing approach for FFT implementation on digital signal processor (DSP) which is based on data-independent property and still hold the property of low-memory reference. The proposed method combines final two steps in NMRRM FFT to perform a novel data-independent structure, besides it is very suitable for multi-operation-unit digital signal processor and dual-core system. We have applied the proposed method of radix-2 FFT algorithm in low memory reference on TI TMSC320C64x DSP. Experimental results show the method can reduce 33.8% clock cycles comparing with the NMRRM FFT implementation and keep the low-memory reference property.

Keywords: Parallel-computing, FFT, low-memory reference, TIDSP.

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Authors: Jasim. A. Ghaeb

Abstract:

A high performance computer includes a fast processor and millions bytes of memory. During the data processing, huge amount of information are shuffled between the memory and processor. Because of its small size and its effectiveness speed, cache has become a common feature of high performance computers. Enhancing cache performance proved to be essential in the speed up of cache-based computers. Most enhancement approaches can be classified as either software based or hardware controlled. The performance of the cache is quantified in terms of hit ratio or miss ratio. In this paper, we are optimizing the cache performance based on enhancing the cache hit ratio. The optimum cache performance is obtained by focusing on the cache hardware modification in the way to make a quick rejection to the missed line's tags from the hit-or miss comparison stage, and thus a low hit time for the wanted line in the cache is achieved. In the proposed technique which we called Even- Odd Tabulation (EOT), the cache lines come from the main memory into cache are classified in two types; even line's tags and odd line's tags depending on their Least Significant Bit (LSB). This division is exploited by EOT technique to reject the miss match line's tags in very low time compared to the time spent by the main comparator in the cache, giving an optimum hitting time for the wanted cache line. The high performance of EOT technique against the familiar mapping technique FAM is shown in the simulated results.

Keywords: Caches, Cache performance, Hit time, Cache hit ratio, Cache mapping, Cache memory.

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Authors: Suzana Basaruddin, Haryani Haron, Siti Arpah Noodin

Abstract:

Managing knowledge of research is one way to ensure just in time information and knowledge to support research strategist and activities. Unfortunately researcher found the vital research knowledge in IHL (Institutions of Higher Learning) are scattered, unstructured and unorganized. Aiming on lay aside conceptual foundations for understanding and developing OMS (Organizational Memory System) to facilitate research in IHL, this research revealed ten factors contributed to the needs of research in the IHL and seven internal challenges of IHL in promoting research to their academic members. This study then suggested a comprehensive support of managing research knowledge using Organizational Memory System (OMS). Eight OMS characteristics to support research were identified. Finally the initial work in designing OMS was projected using knowledge taxonomy. All analysis is derived from pertinent research paper related to research in IHL and OMS. Further study can be conducted to validate and verify results presented.

Keywords: corporate memory, Institutions of Higher Learning, organizational memory system, research

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Authors: Thomas Canhao Xu, Bo Yang, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen

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With the increasing number of on-chip components and the critical requirement for processing power, Chip Multiprocessor (CMP) has gained wide acceptance in both academia and industry during the last decade. However, the conventional bus-based onchip communication schemes suffer from very high communication delay and low scalability in large scale systems. Network-on-Chip (NoC) has been proposed to solve the bottleneck of parallel onchip communications by applying different network topologies which separate the communication phase from the computation phase. Observing that the memory bandwidth of the communication between on-chip components and off-chip memory has become a critical problem even in NoC based systems, in this paper, we propose a novel 3D NoC with on-chip Dynamic Random Access Memory (DRAM) in which different layers are dedicated to different functionalities such as processors, cache or memory. Results show that, by using our proposed architecture, average link utilization has reduced by 10.25% for SPLASH-2 workloads. Our proposed design costs 1.12% less execution cycles than the traditional design on average.

Keywords: 3D integration, network-on-chip, memory-on-chip, DRAM, chip multiprocessor.

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Authors: Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, Daoud Berkani

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This paper presents a VLSI design approach of a highspeed and real-time 2-D Discrete Wavelet Transform computing. The proposed architecture, based on new and fast convolution approach, reduces the hardware complexity in addition to reduce the critical path to the multiplier delay. Furthermore, an advanced twodimensional (2-D) discrete wavelet transform (DWT) implementation, with an efficient memory area, is designed to produce one output in every clock cycle. As a result, a very highspeed is attained. The system is verified, using JPEG2000 coefficients filters, on Xilinx Virtex-II Field Programmable Gate Array (FPGA) device without accessing any external memory. The resulting computing rate is up to 270 M samples/s and the (9,7) 2-D wavelet filter uses only 18 kb of memory (16 kb of first-in-first-out memory) with 256×256 image size. In this way, the developed design requests reduced memory and provide very high-speed processing as well as high PSNR quality.

Keywords: Discrete Wavelet Transform (DWT), Fast Convolution, FPGA, VLSI.

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Authors: Eiko Takaoka, Yoshiyuki Fukushima, Koichiro Hirose, Tadashi Hasegawa

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Although, all high school students in Japan are required to learn informatics, many of them do not learn this topic sufficiently. In response to this situation, we propose a support package for high school informatics classes. To examine what students learned and if they sufficiently understood the context of the lessons, a questionnaire survey was distributed to 186 students. We analyzed the results of the questionnaire and determined the weakest units, which were “basic computer configuration” and “memory and secondary storage”. We then developed a package for teaching these units. We propose that our package be applied in high school classrooms.

Keywords: Computer Science Unplugged, computer science outreach, high school curriculum, experimental evaluation.

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Authors: Leila Maleki, Ezatollah Ahmadi

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The aim of this study was to investigate the effectiveness of memory training exercise on cognitive flexibility. The method of this study was experimental. The statistical population selected 40 students 14 years old, samples were chosen by available sampling method and then they were replaced in experimental (training program) group and control group randomly and answered to Wisconsin Card Sorting Test; covariance test results indicated that there were a significant in post-test scores of experimental group (p<0.005).

Keywords: Cognitive flexibility, working memory exercises, problem solving, reaction time.

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Authors: N. Khon, A. Kim, T. Mukhitdinova

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The aim of this research was to reveal the link between mental variables, such as spatial abilities, memory, intellect and professional experience of drivers. Participants were allocated to four groups: no experience, inexperienced, skilled and professionals (total 85 participants). The level of ability for spatial navigation and indicator of nonverbal memory grow along the process of accumulation of driving experience. At high levels of driving experience, this tendency is especially noticeable. The professionals having personal achievements in driving (racing) differ from skilled drivers in better feeling of direction, which is specific for them not just in a short-term situation of an experimental task, but also in life-size perspective. The level of ability of mental rotation does not grow with the growth of driving experience, which confirms the multiple intelligence theory according to which spatial abilities represent specific, other than logical intelligence type of intellect. The link between spatial abilities, memory, intellect and professional experience of drivers seems to be different relating spatial navigation or mental rotation as different kinds of spatial abilities.

Keywords: Memory, spatial abilities, intellect, drivers.

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