Search results for: memory loss
Commenced in January 2007
Frequency: Monthly
Edition: International
Paper Count: 1358

Search results for: memory loss

1328 Kinetics of Aggregation in Media with Memory

Authors: A. Brener, B. Balabekov, N. Zhumataev

Abstract:

In the paper we submit the non-local modification of kinetic Smoluchowski equation for binary aggregation applying to dispersed media having memory. Our supposition consists in that that intensity of evolution of clusters is supposed to be a function of the product of concentrations of the lowest orders clusters at different moments. The new form of kinetic equation for aggregation is derived on the base of the transfer kernels approach. This approach allows considering the influence of relaxation times hierarchy on kinetics of aggregation process in media with memory.

Keywords: Binary aggregation, Media with memory, Non-local model, Relaxation times

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1327 Formal Verification of Cache System Using a Novel Cache Memory Model

Authors: Guowei Hou, Lixin Yu, Wei Zhuang, Hui Qin, Xue Yang

Abstract:

Formal verification is proposed to ensure the correctness of the design and make functional verification more efficient. As cache plays a vital role in the design of System on Chip (SoC), and cache with Memory Management Unit (MMU) and cache memory unit makes the state space too large for simulation to verify, then a formal verification is presented for such system design. In the paper, a formal model checking verification flow is suggested and a new cache memory model which is called “exhaustive search model” is proposed. Instead of using large size ram to denote the whole cache memory, exhaustive search model employs just two cache blocks. For cache system contains data cache (Dcache) and instruction cache (Icache), Dcache memory model and Icache memory model are established separately using the same mechanism. At last, the novel model is employed to the verification of a cache which is module of a custom-built SoC system that has been applied in practical, and the result shows that the cache system is verified correctly using the exhaustive search model, and it makes the verification much more manageable and flexible.

Keywords: Cache system, formal verification, novel model, System on Chip (SoC).

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1326 Identity Formation and Autobiographical Memory: Two Interrelated Concepts of Development

Authors: Anna R. Alyusheva, Veronika V. Nourkova

Abstract:

The aim of the present paper is to investigate the interdependency among ego-identity status, autobiographical memory and cultural life story schema. The study shows considerable differences between autobiographical memory characteristics and “family script", which is typical for participants (adolescents, M age years = 17.84, SD = 1.18, N = 58), with different ego-identity statuses. Participants with diffused ego-identity status recalled fewer autobiographical memories. Additionally, this group of participants recalled fewer events from their parents- life. Participants with moratorium ego-identity status dated their first recollections to a later age than others, and recalled fewer memories relating to their childhood. Participants with achieved identity status recalled more self-defining memories and events from their parents- life. They used more functions from the autobiographical memory. There weren-t any significant differences between the foreclosed identity status group and the others. These findings support the idea of a bidirectional relation between culture, memory and self.

Keywords: Autobiographical memory, autobiographical narrative, cultural life script, ego-identity

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1325 Parallel Vector Processing Using Multi Level Orbital DATA

Authors: Nagi Mekhiel

Abstract:

Many applications use vector operations by applying single instruction to multiple data that map to different locations in conventional memory. Transferring data from memory is limited by access latency and bandwidth affecting the performance gain of vector processing. We present a memory system that makes all of its content available to processors in time so that processors need not to access the memory, we force each location to be available to all processors at a specific time. The data move in different orbits to become available to other processors in higher orbits at different time. We use this memory to apply parallel vector operations to data streams at first orbit level. Data processed in the first level move to upper orbit one data element at a time, allowing a processor in that orbit to apply another vector operation to deal with serial code limitations inherited in all parallel applications and interleaved it with lower level vector operations.

Keywords: Memory organization, parallel processors, serial code, vector processing.

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1324 Analysis of Filtering in Stochastic Systems on Continuous-Time Memory Observations in the Presence of Anomalous Noises

Authors: S. Rozhkova, O. Rozhkova, A. Harlova, V. Lasukov

Abstract:

For optimal unbiased filter as mean-square and in the case of functioning anomalous noises in the observation memory channel, we have proved insensitivity of filter to inaccurate knowledge of the anomalous noise intensity matrix and its equivalence to truncated filter plotted only by non anomalous components of an observation vector.

Keywords: Mathematical expectation, filtration, anomalous noise, memory.

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1323 The Preservation of Cultural Heritage: Continuity and Memory

Authors: Andrey R. Khazbulatov, Moldir Nurpeiis

Abstract:

Contemporary science and technologies largely widen the gap between the spiritual and rational of the society. Industrial and technological breakthroughs might radically affect most processes in the society, thus losing the cultural heritage. The thinkers recognized the dangers of the decadence in the first place. In the present article the ways of preserving cultural heritage have been investigated. Memory has always been a necessary condition for selfidentification, - continuity is based on this. The authors have supported the hypothesis that continuity and ethnic memory are the very mechanisms that preserve cultural heritage. Such problemformulating will facilitate another, new look at the material, spiritual and arts spheres of the cultural heritage of numerous ethnic groups. The fundamental works by major European and Kazakh scientists have been taken as a basis for the research done.

Keywords: Continuity, cultural heritage, ethnic memory

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1322 Loss of P16/INK4A Protein Expression is a Common Abnormality in Hodgkin's Lymphoma

Authors: Fawzi Irshaid, Fatiha Dilmi, Khaled Tarawneh, Raji Hadeth, Adnan Jaran, Ahad Al-Khatib

Abstract:

P16/INK4A is tumor suppressor protein that plays a critical role in cell cycle regulation. Loss of P16 protein expression has been implicated in pathogenesis of many cancers, including lymphoma. Therefore, we sought to investigate if loss of P16 protein expression is associated with lymphoma and/or any specific lymphoma subtypes (Hodgkin-s lymphoma (HL) and nonHodgkin-s lymphoma (NHL)). Fifty-five lymphoma cases consisted of 30 cases of HL and 25 cases of NHL, with an age range of 3 to 78 years, were examined for loss of P16 by immunohistochemical technique using a specific antibody reacting against P16. In total, P16 loss was seen in 33% of all lymphoma cases. P16 loss was identified in 47.7% of HL cases. In contrast, only 16% of NHL showed loss of P16. Loss of P16 was seen in 67% of HL patients with 50 years of age or older, whereas P16 loss was found in only 42% of HL patients with less than 50 years of age. P16 loss in HL is somewhat higher in male (55%) than in female (30%). In subtypes of HL, P16 loss was found exclusively in all cases of lymphocyte depletion, lymphocyte predominance and unclassified cases, whereas P16 loss was seen in 39% of mixed cellularity and 29% of nodular sclerosis cases. In low grade NHL patients, P16 loss was seen in approximately one-third of cases, whereas no or very rare of P16 loss was found in intermediate and high grade cases. P16 loss did not show any correlation with age or gender of NHL patients. In conclusion, the high rate of P16 loss seen in our study suggests that loss of P16 expression plays a critical role in the pathogenesis of lymphoma, particularly with HL.

Keywords: B-cells, immunostaining, P16 protein, Reed-Sternberg cells, tumors.

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1321 An Implementation of Data Reusable MPEG Video Coding Scheme

Authors: Vasily G. Moshnyaga

Abstract:

This paper presents an optimized MPEG2 video codec implementation, which drastically reduces the number of computations and memory accesses required for video compression. Unlike traditional scheme, we reuse data stored in frame memory to omit unnecessary coding operations and memory read/writes for unchanged macroblocks. Due to dynamic memory sharing among reference frames, data-driven macroblock characterization and selective macroblock processing, we perform less than 15% of the total operations required by a conventional coder while maintaining high picture quality.

Keywords: Data reuse, adaptive processing, video coding, MPEG

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1320 Compression and Filtering of Random Signals under Constraint of Variable Memory

Authors: Anatoli Torokhti, Stan Miklavcic

Abstract:

We study a new technique for optimal data compression subject to conditions of causality and different types of memory. The technique is based on the assumption that some information about compressed data can be obtained from a solution of the associated problem without constraints of causality and memory. This allows us to consider two separate problem related to compression and decompression subject to those constraints. Their solutions are given and the analysis of the associated errors is provided.

Keywords: stochastic signals, optimization problems in signal processing.

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1319 Mnemotopic Perspectives: Communication Design as Stabilizer for the Memory of Places

Authors: C. Galasso

Abstract:

The ancestral relationship between humans and geographical environment has long been at the center of an interdisciplinary dialogue, which sees one of its main research nodes in the relationship between memory and places. Given its deep complexity, this symbiotic connection continues to look for a proper definition that appears increasingly negotiated by different disciplines. Numerous fields of knowledge are involved, from anthropology to semiotics of space, from photography to architecture, up to subjects traditionally far from these reasonings. This is the case of Design of Communication, a young discipline, now confident in itself and its objectives, aimed at finding and investigating original forms of visualization and representation, between sedimented knowledge and new technologies. In particular, Design of Communication for the Territory offers an alternative perspective to the debate, encouraging the reactivation and reconstruction of the memory of places. Recognizing mnemotopes as a cultural object of vertical interpretation of the memory-place relationship, design can become a real mediator of the territorial fixation of memories, making them increasingly accessible and perceptible, contributing to build a topography of memory. According to a mnemotopic vision, Communication Design can support the passage from a memory in which the observer participates only as an individual to a collective form of memory. A mnemotopic form of Communication Design can, through geolocation and content map-based systems, make chronology a topography rooted in the territory and practicable; it can be useful to understand how the perception of the memory of places changes over time, considering how to insert them in the contemporary world. Mnemotopes can be materialized in different format of translation, editing and narration and then involved in complex systems of communication. The memory of places, therefore, if stabilized by the tools offered by Communication Design, can make visible ruins and territorial stratifications, illuminating them with new communicative interests that can be shared and participated.

Keywords: Memory of places, design of communication, territory, mnemotope, topography of memory.

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1318 Heuristic Continuous-time Associative Memories

Authors: Truong Quang Dang Khoa, Masahiro Nakagawa

Abstract:

In this paper, a novel associative memory model will be proposed and applied to memory retrievals based on the conventional continuous time model. The conventional model presents memory capacity is very low and retrieval process easily converges to an equilibrium state which is very different from the stored patterns. Genetic Algorithms is well-known with the capability of global optimal search escaping local optimum on progress to reach a global optimum. Based on the well-known idea of Genetic Algorithms, this work proposes a heuristic rule to make a mutation when the state of the network is trapped in a spurious memory. The proposal heuristic associative memory show the stored capacity does not depend on the number of stored patterns and the retrieval ability is up to ~ 1.

Keywords: Artificial Intelligent, Soft Computing, NeuralNetworks, Genetic Algorithms, Hopfield Neural Networks, andAssociative Memories.

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1317 The Links between Brain Insulin Resistance and Alzheimer’s Disease

Authors: Negar Khezri, Golnaz Yaghoubnezhadzanganeh, Amirreza Attarzadeh

Abstract:

Type 2 Diabetes (T2DM) and Alzheimer's disease (AD) are two main health problems influencing millions of people in the world. Neuron loss and synaptic impairment that interfere with cognition and memory cause for the behavioral indications of AD. While it is now accepted that insulin has central neuromodulatory purpose, it was contemplated for many years that brain is insusceptible to insulin, involving its function in memory and learning, which are impaired in AD. The common characteristics of both AD and T2D are impaired insulin signaling, oxidative stress, the excitation of inflammatory pathways and unqualified glucose metabolism. This review summarizes how the recognition of these mechanisms may lead to the development of alternative therapeutic approaches. Here we summarize how the recognition of these mechanisms may lead to the development of alternative therapeutic approaches.

Keywords: Alzheimer’s disease, diabetes, insulin resistance, neurodegenerative.

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1316 Performance Assessment of a Variable-Flux Permanent-Magnet Memory Motor

Authors: Michel Han, Christophe Besson, Alain Savary, Yvan Becher

Abstract:

The variable flux permanent magnet synchronous motor (VF-PMSM), also called "Memory Motor", is a new generation of motor capable of modifying the magnetization state with short pulses of current during operation or standstill. The impact of such operation is the expansion of the operating range in the torque-speed characteristic and an improvement in energy efficiency at high-speed in comparison to conventional permanent magnet synchronous machines (PMSMs). This paper reviews the operating principle and the unique features of the proposed memory motor. The benefits of this concept are highlighted by comparing the performance of the rotor of the VF-PMSM to that of two PM rotors that are typically found in the industry. The investigation emphasizes the properties of the variable magnetization and presents the comparison of the torque-speed characteristic with the capability of loss reduction in a VF-PMSM by means of experimental results, especially when tests are conducted under identical conditions for each rotor (same stator, same inverter and same experimental setup). The experimental results demonstrated that the VF-PMSM gives an additional degree of freedom to optimize the efficiency over a wide speed range. Thus, with a design easy to manufacture and with the possibility of controlling the magnetization and the demagnetization of the magnets during operations, the VF-PMSM can be interesting for various applications.

Keywords: Efficiency, magnetization state, memory motors, performances, permanent-magnet, synchronous machine, variable-flux, variable magnetization, wide speed application.

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1315 Schmitt Trigger Based SRAM Using Finfet Technology- Shorted Gate Mode

Authors: Vasundara Patel K. S., Harsha N. Bhushan, Kiran G. Gadag, Nischal Prasad B. N., Mohmmed Haroon

Abstract:

The most widely used semiconductor memory types are the Dynamic Random Access Memory (DRAM) and Static Random Access memory (SRAM). Competition among memory manufacturers drives the need to decrease power consumption and reduce the probability of read failure. A technology that is relatively new and has not been explored is the FinFET technology. In this paper, a single cell Schmitt Trigger Based Static RAM using FinFET technology is proposed and analyzed. The accuracy of the result is validated by means of HSPICE simulations with 32nm FinFET technology and the results are then compared with 6T SRAM using the same technology.

Keywords: Schmitt trigger based SRAM, FinFET, and Static Noise Margin.

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1314 On the Design of Shape Memory Alloy Locking Mechanism: A Novel Solution for Laparoscopic Ligation Process

Authors: Reza Yousefian, Michael A. Kia, Mehrdad Hosseini Zadeh

Abstract:

The blood ducts must be occluded to avoid loss of blood from vessels in laparoscopic surgeries. This paper presents a locking mechanism to be used in a ligation laparoscopic procedure (LigLAP I), as an alternative solution for a stapling procedure. Currently, stapling devices are being used to occlude vessels. Using these devices may result in some problems, including injury of bile duct, taking up a great deal of space behind the vessel, and bile leak. In this new procedure, a two-layer suture occludes a vessel. A locking mechanism is also required to hold the suture. Since there is a limited space at the device tip, a Shape Memory Alloy (SMA) actuator is used in this mechanism. Suitability for cleanroom applications, small size, and silent performance are among the advantages of SMA actuators in biomedical applications. An experimental study is conducted to examine the function of the locking mechanism. To set up the experiment, a prototype of a locking mechanism is built using nitinol, which is a nickel-titanium shape memory alloy. The locking mechanism successfully locks a polymer suture for all runs of the experiment. In addition, the effects of various surface materials on the applied pulling forces are studied. Various materials are mounted at the mechanism tip to compare the maximum pulling forces applied to the suture for each material. The results show that the various surface materials on the device tip provide large differences in the applied pulling forces.

Keywords: Laparoscopic surgery, ligation process, locking mechanism, Shape Memory Alloy (SMA) actuator.

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1313 Evaluating the Effectiveness of Memory Overcommit Techniques on KVM-based Hosting Platform

Authors: Chin-Hung Li

Abstract:

Determining how many virtual machines a Linux host could run can be a challenge. One of tough missions is to find the balance among performance, density and usability. Now KVM hypervisor has become the most popular open source full virtualization solution. It supports several ways of running guests with more memory than host really has. Due to large differences between minimum and maximum guest memory requirements, this paper presents initial results on same-page merging, ballooning and live migration techniques that aims at optimum memory usage on KVM-based cloud platform. Given the design of initial experiments, the results data is worth reference for system administrators. The results from these experiments concluded that each method offers different reliability tradeoff.

Keywords: Kernel-based Virtual Machine, Overcommit, Virtualization.

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1312 Synthesis of Filtering in Stochastic Systems on Continuous-Time Memory Observations in the Presence of Anomalous Noises

Authors: S. Rozhkova, O. Rozhkova, A. Harlova, V. Lasukov

Abstract:

We have conducted the optimal synthesis of rootmean- squared objective filter to estimate the state vector in the case if within the observation channel with memory the anomalous noises with unknown mathematical expectation are complement in the function of the regular noises. The synthesis has been carried out for linear stochastic systems of continuous - time.

Keywords: Mathematical expectation, filtration, anomalous noise, memory.

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1311 Transmission Loss Allocation via Loss Function Decomposition and Current Projection Concept

Authors: M.R. Ebrahimi, Z. Ghofrani, M. Ehsan

Abstract:

One of the major problems in liberalized power markets is loss allocation. In this paper, a different method for allocating transmission losses to pool market participants is proposed. The proposed method is fundamentally based on decomposition of loss function and current projection concept. The method has been implemented and tested on several networks and one sample summarized in the paper. The results show that the method is comprehensive and fair to allocating the energy losses of a power market to its participants.

Keywords: Transmission loss, loss allocation, current projectionconcept, loss function decomposition.

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1310 Mining Sequential Patterns Using I-PrefixSpan

Authors: Dhany Saputra, Dayang R. A. Rambli, Oi Mean Foong

Abstract:

In this paper, we propose an improvement of pattern growth-based PrefixSpan algorithm, called I-PrefixSpan. The general idea of I-PrefixSpan is to use sufficient data structure for Seq-Tree framework and separator database to reduce the execution time and memory usage. Thus, with I-PrefixSpan there is no in-memory database stored after index set is constructed. The experimental result shows that using Java 2, this method improves the speed of PrefixSpan up to almost two orders of magnitude as well as the memory usage to more than one order of magnitude.

Keywords: ArrayList, ArrayIntList, minimum support, sequence database, sequential patterns.

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1309 Extending the Aspect Oriented Programming Joinpoint Model for Memory and Type Safety

Authors: Amjad Nusayr

Abstract:

Software security is a general term used to any type of software architecture or model in which security aspects are incorporated in this architecture. These aspects are not part of the main logic of the underlying program. Software security can be achieved using a combination of approaches including but not limited to secure software designs, third part component validation, and secure coding practices. Memory safety is one feature in software security where we ensure that any object in memory is have a valid pointer or a reference with a valid type. Aspect Oriented Programming (AOP) is a paradigm that is concerned with capturing the cross-cutting concerns in code development. AOP is generally used for common cross-cutting concerns like logging and Database transaction managing. In this paper we introduce the concepts that enable AOP to be used for the purpose of memory and type safety. We also present ideas for extending AOP in software security practices.

Keywords: Aspect oriented programming, programming languages, software security, memory and type safety.

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1308 Effect of Low Frequency Memory on High Power 12W LDMOS Transistors Intermodulation Distortion

Authors: A. Alghanim, J. Benedikt, P. J. Tasker

Abstract:

The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.

Keywords: Low Frequency Memory, IntermodulationDistortion (IMD).

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1307 Dual-Network Memory Model for Temporal Sequences

Authors: Motonobu Hattori, Rina Suzuki

Abstract:

In neural networks, when new patters are learned by a network, they radically interfere with previously stored patterns. This drawback is called catastrophic forgetting. We have already proposed a biologically inspired dual-network memory model which can much reduce this forgetting for static patterns. In this model, information is first stored in the hippocampal network, and thereafter, it is transferred to the neocortical network using pseudopatterns. Because temporal sequence learning is more important than static pattern learning in the real world, in this study, we improve our conventional  dual-network memory model so that it can deal with temporal sequences without catastrophic forgetting. The computer simulation results show the effectiveness of the proposed dual-network memory model.  

Keywords: Catastrophic forgetting, dual-network, temporal sequences.

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1306 Review and Experiments on SDMSCue

Authors: Ashraf Anwar

Abstract:

In this work, I present a review on Sparse Distributed Memory for Small Cues (SDMSCue), a variant of Sparse Distributed Memory (SDM) that is capable of handling small cues. I then conduct and show some cognitive experiments on SDMSCue to test its cognitive soundness compared to SDM. Small cues refer to input cues that are presented to memory for reading associations; but have many missing parts or fields from them. The original SDM failed to handle such a problem. SDMSCue handles and overcomes this pitfall. The main idea in SDMSCue; is the repeated projection of the semantic space on smaller subspaces; that are selected based on the input cue length and pattern. This process allows for Read/Write operations using an input cue that is missing a large portion. SDMSCue is augmented with the use of genetic algorithms for memory allocation and initialization. I claim that SDM functionality is a subset of SDMSCue functionality.

Keywords: Artificial intelligence, recall, recognition, SDM, SDMSCue.

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1305 Parallel-computing Approach for FFT Implementation on Digital Signal Processor (DSP)

Authors: Yi-Pin Hsu, Shin-Yu Lin

Abstract:

An efficient parallel form in digital signal processor can improve the algorithm performance. The butterfly structure is an important role in fast Fourier transform (FFT), because its symmetry form is suitable for hardware implementation. Although it can perform a symmetric structure, the performance will be reduced under the data-dependent flow characteristic. Even though recent research which call as novel memory reference reduction methods (NMRRM) for FFT focus on reduce memory reference in twiddle factor, the data-dependent property still exists. In this paper, we propose a parallel-computing approach for FFT implementation on digital signal processor (DSP) which is based on data-independent property and still hold the property of low-memory reference. The proposed method combines final two steps in NMRRM FFT to perform a novel data-independent structure, besides it is very suitable for multi-operation-unit digital signal processor and dual-core system. We have applied the proposed method of radix-2 FFT algorithm in low memory reference on TI TMSC320C64x DSP. Experimental results show the method can reduce 33.8% clock cycles comparing with the NMRRM FFT implementation and keep the low-memory reference property.

Keywords: Parallel-computing, FFT, low-memory reference, TIDSP.

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1304 Developing OMS in IHL

Authors: Suzana Basaruddin, Haryani Haron, Siti Arpah Noodin

Abstract:

Managing knowledge of research is one way to ensure just in time information and knowledge to support research strategist and activities. Unfortunately researcher found the vital research knowledge in IHL (Institutions of Higher Learning) are scattered, unstructured and unorganized. Aiming on lay aside conceptual foundations for understanding and developing OMS (Organizational Memory System) to facilitate research in IHL, this research revealed ten factors contributed to the needs of research in the IHL and seven internal challenges of IHL in promoting research to their academic members. This study then suggested a comprehensive support of managing research knowledge using Organizational Memory System (OMS). Eight OMS characteristics to support research were identified. Finally the initial work in designing OMS was projected using knowledge taxonomy. All analysis is derived from pertinent research paper related to research in IHL and OMS. Further study can be conducted to validate and verify results presented.

Keywords: corporate memory, Institutions of Higher Learning, organizational memory system, research

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1303 3D Network-on-Chip with on-Chip DRAM: An Empirical Analysis for Future Chip Multiprocessor

Authors: Thomas Canhao Xu, Bo Yang, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen

Abstract:

With the increasing number of on-chip components and the critical requirement for processing power, Chip Multiprocessor (CMP) has gained wide acceptance in both academia and industry during the last decade. However, the conventional bus-based onchip communication schemes suffer from very high communication delay and low scalability in large scale systems. Network-on-Chip (NoC) has been proposed to solve the bottleneck of parallel onchip communications by applying different network topologies which separate the communication phase from the computation phase. Observing that the memory bandwidth of the communication between on-chip components and off-chip memory has become a critical problem even in NoC based systems, in this paper, we propose a novel 3D NoC with on-chip Dynamic Random Access Memory (DRAM) in which different layers are dedicated to different functionalities such as processors, cache or memory. Results show that, by using our proposed architecture, average link utilization has reduced by 10.25% for SPLASH-2 workloads. Our proposed design costs 1.12% less execution cycles than the traditional design on average.

Keywords: 3D integration, network-on-chip, memory-on-chip, DRAM, chip multiprocessor.

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1302 VLSI Design of 2-D Discrete Wavelet Transform for Area-Efficient and High-Speed Image Computing

Authors: Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, Daoud Berkani

Abstract:

This paper presents a VLSI design approach of a highspeed and real-time 2-D Discrete Wavelet Transform computing. The proposed architecture, based on new and fast convolution approach, reduces the hardware complexity in addition to reduce the critical path to the multiplier delay. Furthermore, an advanced twodimensional (2-D) discrete wavelet transform (DWT) implementation, with an efficient memory area, is designed to produce one output in every clock cycle. As a result, a very highspeed is attained. The system is verified, using JPEG2000 coefficients filters, on Xilinx Virtex-II Field Programmable Gate Array (FPGA) device without accessing any external memory. The resulting computing rate is up to 270 M samples/s and the (9,7) 2-D wavelet filter uses only 18 kb of memory (16 kb of first-in-first-out memory) with 256×256 image size. In this way, the developed design requests reduced memory and provide very high-speed processing as well as high PSNR quality.

Keywords: Discrete Wavelet Transform (DWT), Fast Convolution, FPGA, VLSI.

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1301 An Optimized Multi-block Method for Turbulent Flows

Authors: M. Goodarzi, P. Lashgari

Abstract:

A major part of the flow field involves no complicated turbulent behavior in many turbulent flows. In this research work, in order to reduce required memory and CPU time, the flow field was decomposed into several blocks, each block including its special turbulence. A two dimensional backward facing step was considered here. Four combinations of the Prandtl mixing length and standard k- E models were implemented as well. Computer memory and CPU time consumption in addition to numerical convergence and accuracy of the obtained results were mainly investigated. Observations showed that, a suitable combination of turbulence models in different blocks led to the results with the same accuracy as the high order turbulence model for all of the blocks, in addition to the reductions in memory and CPU time consumption.

Keywords: Computer memory, CPU time, Multi-block method, Turbulence modeling.

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1300 Remarks Regarding Queuing Model and Packet Loss Probability for the Traffic with Self-Similar Characteristics

Authors: Mihails Kulikovs, Ernests Petersons

Abstract:

Network management techniques have long been of interest to the networking research community. The queue size plays a critical role for the network performance. The adequate size of the queue maintains Quality of Service (QoS) requirements within limited network capacity for as many users as possible. The appropriate estimation of the queuing model parameters is crucial for both initial size estimation and during the process of resource allocation. The accurate resource allocation model for the management system increases the network utilization. The present paper demonstrates the results of empirical observation of memory allocation for packet-based services.

Keywords: Queuing System, Packet Loss Probability, Measurement-Based Admission Control (MBAC), Performanceevaluation, Quality of Service (QoS).

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1299 Effectiveness of Working Memory Training on Cognitive Flexibility

Authors: Leila Maleki, Ezatollah Ahmadi

Abstract:

The aim of this study was to investigate the effectiveness of memory training exercise on cognitive flexibility. The method of this study was experimental. The statistical population selected 40 students 14 years old, samples were chosen by available sampling method and then they were replaced in experimental (training program) group and control group randomly and answered to Wisconsin Card Sorting Test; covariance test results indicated that there were a significant in post-test scores of experimental group (p<0.005).

Keywords: Cognitive flexibility, working memory exercises, problem solving, reaction time.

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