Search results for: gate capacitance

Authors: Xuerui Niu, Bolin Wang, Xinchuang Zhang, Xiaohua Ma, Bin Hou, Ling Yang

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The application of discrete GaN-based power switches requires the collaboration of silicon-based peripheral circuit structures. However, the packages and interconnection between the Si and GaN devices can introduce parasitic effects to the circuit, which has great impacts on GaN power transistors. GaN-based monolithic power integration technology is an emerging solution which can improve the stability of circuits and allow the GaN-based devices to achieve more functions. Complementary logic circuits consisting of GaN-based E-mode p-channel heterostructure field-effect transistors (p-HFETs) and E-mode n-channel HEMTs can be served as the gate drivers. E-mode p-HFETs with recessed gate have attracted increasing interest because of the low leakage current and large gate swing. However, they suffer from a poor interface between the gate dielectric and polarized nitride layers. The reliability of p-HFETs is analyzed and discussed in this work. In circuit applications, the inverter is always operated with dynamic gate voltage (VGS) rather than a constant VGS. Therefore, dynamic electrical stress has been simulated to resemble the operation conditions for E-mode p-HFETs. The dynamic electrical stress condition is as follows. VGS is a square waveform switching from -5 V to 0 V, VDS is fixed, and the source grounded. The frequency of the square waveform is 100kHz with the rising/falling time of 100 ns and duty ratio of 50%. The effective stress time is 1000s. A number of stress tests are carried out. The stress was briefly interrupted to measure the linear IDS-VGS, saturation IDS-VGS, As VGS switches from -5 V to 0 V and VDS = 0 V, devices are under negative-bias-instability (NBI) condition. Holes are trapped at the interface of oxide layer and GaN channel layer, which results in the reduction of VTH. The negative shift of VTH is serious at the first 10s and then changes slightly with the following stress time. However, different phenomenon is observed when VDS reduces to -5V. VTH shifts negatively during stress condition, and the variation in VTH increases with time, which is different from that when VDS is 0V. Two mechanisms exists in this condition. On the one hand, the electric field in the gate region is influenced by the drain voltage, so that the trapping behavior of holes in the gate region changes. The impact of the gate voltage is weakened. On the other hand, large drain voltage can induce the hot holes generation and lead to serious hot carrier stress (HCS) degradation with time. The poor-quality interface between the oxide layer and GaN channel layer at the gate region makes a major contribution to the high-density interface traps, which will greatly influence the reliability of devices. These results emphasize that the improved etching and pretreatment processes needs to be developed so that high-performance GaN complementary logics with enhanced stability can be achieved.

Keywords: GaN-based E-mode p-HFETs, dynamic electric stress, threshold voltage, monolithic power integration technology

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Authors: Abdelaziz Rabehi

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The current–voltage (I–V) characteristics of Au/GaN Schottky diodes were measured at room temperature. In addition, capacitance–voltage–frequency (C–V–f) characteristics are investigated by considering the interface states (Nss) at frequency range 100 kHz to 1 MHz. From the I–V characteristics of the Schottky diode, ideality factor (n) and barrier height (Φb) values of 1.22 and 0.56 eV, respectively, were obtained from a forward bias I–V plot. In addition, the interface states distribution profile as a function of (Ess − Ev) was extracted from the forward bias I–V measurements by taking into account the bias dependence of the effective barrier height (Φe) for the Schottky diode. The C–V curves gave a barrier height value higher than those obtained from I–V measurements. This discrepancy is due to the different nature of the I–V and C–V measurement techniques.

Keywords: Schottky diodes, frequency dependence, barrier height, interface states

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Authors: Hani Baek, Gwang Min Sun, Chansun Shin, Sung Ho Ahn

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Fast neutron irradiation using nuclear reactors is an effective method to improve switching loss and short circuit durability of power semiconductor (insulated gate bipolar transistors (IGBT) and insulated gate transistors (IGT), etc.). However, not only fast neutrons but also thermal neutrons, epithermal neutrons and gamma exist in the nuclear reactor. And the electrical properties of the IGBT may be deteriorated by the irradiation of gamma. Gamma irradiation damages are known to be caused by Total Ionizing Dose (TID) effect and Single Event Effect (SEE), Displacement Damage. Especially, the TID effect deteriorated the electrical properties such as leakage current and threshold voltage of a power semiconductor. This work can confirm the effect of the gamma irradiation on the electrical properties of 600 V NPT-IGBT. Irradiation of gamma forms lattice defects in the gate oxide and Si-SiO₂ interface of the IGBT. It was confirmed that this lattice defect acts on the center of the trap and affects the threshold voltage, thereby negatively shifted the threshold voltage according to TID. In addition to the change in the carrier mobility, the conductivity modulation decreases in the n-drift region, indicating a negative influence that the forward voltage drop decreases. The turn-off delay time of the device before irradiation was 212 ns. Those of 2.5, 10, 30, 70 and 100 kRad(Si) were 225, 258, 311, 328, and 350 ns, respectively. The gamma irradiation increased the turn-off delay time of the IGBT by approximately 65%, and the switching characteristics deteriorated.

Keywords: NPT-IGBT, gamma irradiation, switching, turn-off delay time, recombination, trap center

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Authors: Zahid Ali Ghazi

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Supercapacitors (SCs) have emerged as auspicious energy storage devices because of their fast charge-discharge characteristics and high power densities. In the current study, a simple approach is used to coat activated carbon (AC) with a thin layer of nickel (Ni) by an electroless deposition process to enhance the electrochemical performance of the SC. The synergistic combination of large surface area and high electrical conductivity of the AC, as well as the pseudocapacitive behavior of the metallic Ni, has shown great potential to overcome the limitations of traditional SC materials. First, the materials were characterized using X-ray diffraction (XRD) for crystallography, scanning electron microscopy (SEM) for surface morphology and energy dispersion X-ray (EDX) for elemental analysis. The electrochemical performance of the nickel-coated activated carbon (Ni-AC) is systematically evaluated through various techniques, including galvanostatic charge-discharge (GCD), cyclic voltammetry (CV), and electrochemical impedance spectroscopy (EIS). The GCD results revealed that Ni/AC has a higher specific capacitance (1559 F/g) than bare AC (222 F/g) at 1 A/g current density in a 2 M KOH electrolyte. Even at a higher current density of 20 A/g, the Ni/AC showed a high capacitance of 944 F/g as compared to 77 F/g by AC. The specific capacitance (1318 F/g) calculated from CV measurements for Ni-AC at 10mV/sec was in close agreement with GCD data. Furthermore, the bare AC exhibited a low energy of 15 Wh/kg at a power density of 356 W/kg whereas, an energy density of 111 Wh/kg at a power density of 360 W/kg was achieved by Ni/AC-850 electrode and demonstrated a long life cycle with 94% capacitance retention over 50000 charge/discharge cycles at 10 A/g. In addition, the EIS study disclosed that the Rs and Rct values of Ni/AC electrodes were much lower than those of bare AC. The superior performance of Ni/AC is mainly attributed to the presence of excessive redox active sites, large electroactive surface area and corrosive resistance properties of Ni. We believe that this study will provide new insights into the controlled coating of ACs and other porous materials with metals for developing high-performance SCs and other energy storage devices.

Keywords: supercapacitor, cyclic voltammetry, coating, energy density, activated carbon

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Authors: Ghania Zerari, Abderrezak Guessoum, Rachid Beguenane

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This paper introduces high-performance architecture for fully parallel stochastic Low-Density Parity-Check (LDPC) field programmable gate array (FPGA) based LDPC decoder. The new approach is designed to decrease the decoding latency and to reduce the FPGA logic utilisation. To accomplish the target logic utilisation reduction, the routing of the proposed sub-variable node (VN) internal memory is designed to utilize one slice distributed RAM. Furthermore, a VN initialization, using the channel input probability, is achieved to enhance the decoder convergence, without extra resources and without integrating the output saturated-counters. The Xilinx FPGA implementation, of IEEE 802.3an standard LDPC code, shows that the proposed decoding approach attain high performance along with reduction of FPGA logic utilisation.

Keywords: low-density parity-check (LDPC) decoder, stochastic decoding, field programmable gate array (FPGA), IEEE 802.3an standard

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Authors: Pardhasaradhi Gudla, Imanual A.

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The generated electrical power in offshore needs to be transmitted to grid which is located in onshore by using subsea cables. Long subsea cables produce reactive power, which should be compensated in order to limit transmission losses, to optimize the transmission capacity, and to keep the grid voltage within the safe operational limits. Installation cost of wind farm includes the structure design cost and electrical system cost. India has targeted to achieve 175GW of renewable energy capacity by 2022 including offshore wind power generation. Due to sea depth is more in India, the installation cost will be further high when compared to European countries where offshore wind energy is already generating successfully. So innovations are required to reduce the offshore wind power project cost. This paper presents the optimized techniques to reduce the installation cost of offshore wind firm with respect to electrical transmission systems. This technical paper provides the techniques for increasing the current carrying capacity of subsea cable by decreasing the reactive power generation (capacitance effect) of the subsea cable. There are many methods for reactive power compensation in wind power plants so far in execution. The main reason for the need of reactive power compensation is capacitance effect of subsea cable. So if we diminish the cable capacitance of cable then the requirement of the reactive power compensation will be reduced or optimized by avoiding the intermediate substation at midpoint of the transmission network.

Keywords: offshore wind power, optimized techniques, power system, sub sea cable

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Authors: Deepika Sharma, Bal Krishan

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In this paper, the structure of N-channel VDMOS was designed and analyzed using Silvaco TCAD tools by varying N+ source doping concentration, P-Body doping concentration, gate oxide thickness and the diffuse time. VDMOS is considered to be ideal power switches due to its high input impedance and fast switching speed. The performance of the device was analyzed from the Ids vs Vgs curve. The electrical characteristics such as threshold voltage, gate oxide thickness and breakdown voltage for the proposed device structures were extarcted. Effect of epitaxial layer on various parameters is also observed.

Keywords: on-resistance, threshold voltage, epitaxial layer, breakdown voltage

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Authors: Chingwen Yeh, Yu Ru Chen

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This paper aims to explore the growth and development of children in the creative dance class of Cloud Gate Dance School in Taichung Taiwan. Professor Chingwen Yeh’s qualitative research method was applied in this study. First of all, application of Dalcroze Eurhythmic teaching materials such as music, teaching aids, speaking language through classroom situation was collected and exam. Second, the in-class observation on the participation of the young children's learning situation was recorded both by words and on video screen as the research data. Finally, data analysis was categorized into the following aspects: children's body movement coordination, children’s mind concentration and imagination and children’s verbal expression. Through the in-depth interviews with the in-class teachers, parents of participating children and other in class observers were conducted from time to time; this research found the children's body rhythm, language skills, and social learning growth were improved in certain degree through the creative dance training. These authors hope the study can contribute as the further research reference on the related topic.

Keywords: Cloud Gate Dance School, creative dance, Dalcroze, Eurhythmic

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Authors: Nadish Anand, Richard D. Gould

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A simplistic model is introduced for determining the thermal characteristics of a Low-rise Residential (LRR) building and then predicts the energy usage by its Heating Ventilation & Air Conditioning (HVAC) system according to changes in weather conditions which are reflected in the Ambient Temperature (Outside Air Temperature). The LRR buildings are treated as a simple lump for solving the heat transfer problem and the model is derived using the lumped capacitance model of transient conduction heat transfer from bodies. Since most contemporary HVAC systems have a thermostat control which will have an offset temperature and user defined set point temperatures which define when the HVAC system will switch on and off. The aim is to predict without any error the Body Temperature (i.e. the Inside Air Temperature) which will estimate the switching on and off of the HVAC system. To validate the mathematical model derived from lumped capacitance we have used EnergyPlus simulation engine, which simulates Buildings with considerable accuracy. We have predicted through the low order model the Inside Air Temperature of a single house kept in three different climate zones (Detroit, Raleigh & Austin) and different orientations for summer and winter seasons. The prediction error from the model for the same day as that of model parameter calculation has showed an error of < 10% in winter for almost all the orientations and climate zones. Whereas the prediction error is only <10% for all the orientations in the summer season for climate zone at higher latitudes (Raleigh & Detroit). Possible factors responsible for the large variations are also noted in the work, paving way for future research.

Keywords: building energy, energy consumption, energy+, HVAC, low order model, lumped capacitance

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Authors: Ruey-Chi Wang, Po-Hsiang Huang, Ping-Chang Chuang, Shu-Jen Chen

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High-performance Li: CuO/reduced graphene oxide (RGO) flexible electrodes for supercapacitors were fabricated via a low-temperature and low-cost route. To increase energy density while maintaining high power density and long-term cyclability, Li was doped to increase the electrical conductivity of CuO particles between RGO flakes. Electrochemical measurements show that the electrical conductivity, specific capacitance, energy density, and rate capability were all enhanced by Li incorporation. The optimized Li:CuO/RGO electrodes show a high energy density of 179.9 Wh/kg and a power density of 900.0 W/kg at a current density of 1 A/g. Cyclic life tests show excellent stability over 10,000 cycles with a capacitance retention of 93.2%. Li doping improves the electrochemical performance of CuO, making CuO a promising pseudocapacitive material for fabricating low-cost excellent supercapacitors.

Keywords: supercapacitor, CuO, RGO, lithium

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Authors: Margarita Mayoral-Villa, J. Klapp, L. Di G. Sigalotti, J. E. V. Guzmán

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Automated learning techniques are widely applied in the energy sector to address challenging problems from a practical point of view. To this end, we discuss the implementation of a Message Passing algorithm (MPNN)within a Graph Neural Network(GNN)to leverage the neighborhood of a set of nodes during the aggregation process. This approach enables the characterization of multiphase diffusion processes in the reservoir, such that the flow paths underlying the interconnections between multiple wells may be inferred from previously available data on flow rates and bottomhole pressures. The results thus obtained compare favorably with the predictions produced by the Reduced Order Capacitance-Resistance Models (CRM) and suggest the potential of MPNNs to enhance the robustness of the forecasts while improving the computational efficiency.

Keywords: multiphase diffusion, message passing neural network, well interconnection, interwell connectivity, graph neural network, capacitance-resistance models

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Authors: Mert Kıranç, Ekrem Duman, Murat Özbilen

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In order to achieve new product development (NPD) activities on time and within budgetary constraints, the NPD managers need a well-designed methodology. This study intends to create an integrated project management methodology for the ones who focus on new product development projects. In the scope of the study, four different management systems are combined. These systems are called as 'Schedule-oriented Stage-Gate Method, Risk Management, Change Management and Earned Value Management'. New product development term is quite common in many different industries such as defense industry, construction, health care/dental, higher education, fast moving consumer goods, white goods, electronic devices, marketing and advertising and software development. All product manufacturers run against each other’s for introducing a new product to the market. In order to achieve to produce a more competitive product in the market, an optimum project management methodology is chosen, and this methodology is adapted to company culture. The right methodology helps the company to present perfect product to the customers at the right time. The benefits of proposed methodology are discussed as an application by a company. As a result, how the integrated methodology improves the efficiency and how it achieves the success of the project are unfolded.

Keywords: project, project management, management methodology, new product development, risk management, change management, earned value, stage-gate

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Authors: Suruchi Saini, Hitender Kumar Tyagi

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With the rapid progress of the nanotechnology industry, it is becoming increasingly important to have compact semiconductor devices to function and offer the best results at various technology nodes. While performing the scaling of the device, several short-channel effects occur. To minimize these scaling limitations, some device architectures have been developed in the semiconductor industry. FinFET is one of the most promising structures. Also, the double-gate 2D Fin field effect transistor has the benefit of suppressing short channel effects (SCE) and functioning well for less than 14 nm technology nodes. In the present research, the MuGFET simulation tool is used to analyze and explain the electrical behaviour of a double-gate 2D Fin field effect transistor. The drift-diffusion and Poisson equations are solved self-consistently. Various models, such as Fermi-Dirac distribution, bandgap narrowing, carrier scattering, and concentration-dependent mobility models, are used for device simulation. The transfer and output characteristics of the double-gate 2D Fin field effect transistor are determined at 10 nm technology node. The performance parameters are extracted in terms of threshold voltage, trans-conductance, leakage current and current on-off ratio. In this paper, the device performance is analyzed at different structure parameters. The utilization of the Id-Vg curve is a robust technique that holds significant importance in the modeling of transistors, circuit design, optimization of performance, and quality control in electronic devices and integrated circuits for comprehending field-effect transistors. The FinFET structure is optimized to increase the current on-off ratio and transconductance. Through this analysis, the impact of different channel widths, source and drain lengths on the Id-Vg and transconductance is examined. Device performance was affected by the difficulty of maintaining effective gate control over the channel at decreasing feature sizes. For every set of simulations, the device's features are simulated at two different drain voltages, 50 mV and 0.7 V. In low-power and precision applications, the off-state current is a significant factor to consider. Therefore, it is crucial to minimize the off-state current to maximize circuit performance and efficiency. The findings demonstrate that the performance of the current on-off ratio is maximum with the channel width of 3 nm for a gate length of 10 nm, but there is no significant effect of source and drain length on the current on-off ratio. The transconductance value plays a pivotal role in various electronic applications and should be considered carefully. In this research, it is also concluded that the transconductance value of 340 S/m is achieved with the fin width of 3 nm at a gate length of 10 nm and 2380 S/m for the source and drain extension length of 5 nm, respectively.

Keywords: current on-off ratio, FinFET, short-channel effects, transconductance

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Authors: Debananda Mohapatra, Subramanya Badrayyana, Smrutiranjan Parida

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Recognizing the upcoming era of carbon nanostructures and their revolutionary applications, we investigated the formation and supercapacitor application of highly pure and hydrophilic carbon nano-onions (CNOs) by economical one-step flame-synthesis procedure. The facile and scalable method uses easily available organic carbon source such as clarified butter, restricting the use of any catalyst, sophisticated instrumentation, high vacuum and post processing purification procedure. The active material was conformally coated onto a locally available cotton wipe by “sonicating and drying” process to obtain novel, lightweight, inexpensive, flexible, binder-free electrodes with strong adhesion between nanoparticles and porous wipe. This interesting electrode with CNO as the active material delivers a specific capacitance of 102.16 F/g, the energy density of 14.18 Wh/kg and power density of 2448 W/kg which are the highest values reported so far in symmetrical two electrode cell configuration with 1M Na2SO4 as an electrolyte. Incorporation of CuO nanoparticles to these functionalized CNOs by one-step hydrothermal method add up to a significant specific capacitance of 420 F/g with deliverable energy and power density at 58.33 Wh/kg and 4228 W/kg, respectively. The free standing CNOs, as well as CNO-CuO composite electrode, showed an excellent cyclic performance and stability retaining 95 and 90% initial capacitance even after 5000 charge-discharge cycles at a current density of 5 A/g. This work presents a new platform for high performance supercapacitors for next generation wearable electronic devices.

Keywords: binder-free, flame synthesis, flexible, carbon nano-onion

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Authors: Gobinda Gopal Khan, Ashutosh K. Singh, Debasish Sarkar

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Unique one-dimensional (1D) Ni-NiO and Co-Ni/Co3O4-NiO core/shell nano-heterostructures are fabricated by combining the electrochemical deposition and annealing. The high-performance pseudo-capacitor electrode based on the Ni-NiO and Co-Ni/Co3O4-NiO core/shell nano-heterostructures is designed and demonstrated. The Co-Ni/Co3O4-NiO core/shell nano-heterostructures exhibit high specific capacitance (2013 Fg-1 at 2.5 Ag-1), high energy and power density (23 Wh kg-1 and 5.5 kW kg-1, at the discharge current density of 20.8 A g-1.), good capacitance retention, and long cyclicality. The remarkable electrochemical property of the large surface area nano-heterostructures is demonstrated based on the novel nano-architectural design of the electrode with the coexistence of the two highly redox active materials at the surface supported by highly conducting metal alloy channel at the core for faster charge transport.

Keywords: nano-heterostructures, energy storage, supercapacitors, electrochemical deposition

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Authors: G. K. S. Prakash, Rao K. Srinivasa

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MEMS plays an important role in wide range of applications like biological, automobiles, military and communication engineering. This paper mainly investigates on capacitive shunt RF MEMS switch with low actuation voltage and low insertion losses. To trim the pull-in voltage, a step structure has introduced to trim air gap between the beam and the dielectric layer with that pull in voltage is trim to 2.9 V. The switching time of the proposed switch is 39.1μs, and capacitance ratio is 67. To get more isolation, we have used aluminum nitride as dielectric material instead of silicon nitride (Si₃N₄) and silicon dioxide (SiO₂) because aluminum nitride has high dielectric constant (εᵣ = 9.5) increases the OFF capacitance and eventually increases the isolation of the switch. The results show that the switch is ON state involves return loss (S₁₁) less than -25 dB up to 40 GHz and insertion loss (S₂₁) is more than -1 dB up to 35 GHz. In OFF state switch shows maximum isolation (S₂₁) of -38 dB occurs at a frequency of 25-27 GHz for K band applications.

Keywords: RF MEMS, actuation voltage, isolation loss, switches

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Authors: M. Kessi

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We investigated the effect of the magnetic field on carrier transport phenomena in the transistor channel region of Double-Gate Metal-Oxide-Semiconductor Field-Effect Transistor (MOSFET). This explores the Lorentz force and basic physical properties of solids exposed to a constant external magnetic field. The magnetic field modulates the electrons and potential distribution in the case of silicon Tunnel FETs. This modulation shows up in the device's external electrical characteristics such as ON current (ION), subthreshold leakage current (IOF), the threshold voltage (VTH), the magneto-transconductance (gm) and the output magneto-conductance (gDS) of Tunnel FET. Moreover, the channel doping concentration and potential distribution are obtained using the numerical method by solving Poisson’s transport equation in 3D modules semiconductor magnetic sensors available in Silvaco TCAD tools. The numerical simulations of the magnetic nano-sensors are relatively new. In this work, we present the results of numerical simulations based on 3D magnetic sensors. The results show excellent accuracy comportment and good agreement compared with that obtained in the experimental study of MOSFETs technology.

Keywords: single-gate MOSFET, magnetic field, hall field, Lorentz force

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Authors: Gashin Shahsavari, Gilles Arnaud-Fassetta, Alberto Campisano, Roberto Bertilotti, Fabien Riou

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Sewer deposits have been identified as a major cause of dysfunctions in combined sewer systems regarding sewer management, which induces different negative consequents resulting in poor hydraulic conveyance, environmental damages as well as worker’s health. In order to overcome the problematics of sedimentation, flushing has been considered as the most operative and cost-effective way to minimize the sediments impacts and prevent such challenges. Flushing, by prompting turbulent wave effects, can modify the bed form depending on the hydraulic properties and geometrical characteristics of the conduit. So far, the dynamics of the bed-load during high-flow events in combined sewer systems as a complex environment is not well understood, mostly due to lack of measuring devices capable to work in the “hostile” in combined sewer system correctly. In this regards, a one-episode flushing issue from an opening gate valve with weir function was carried out in a trunk sewer in Paris to understanding its cleansing efficiency on the sediments (thickness: 0-30 cm). During more than 1h of flushing within 5 m distance in downstream of this flushing device, a maximum flowrate and a maximum level of water have been recorded at 5 m in downstream of the gate as 4.1 m3/s and 2.1 m respectively. This paper is aimed to evaluate the efficiency of this type of gate for around 1.1 km (from the point -50 m to +1050 m in downstream from the gate) by (i) determining bed grain-size distribution and sediments evolution through the sewer channel, as well as their organic matter content, and (ii) identifying sections that exhibit more changes in their texture after the flush. For the first one, two series of sampling were taken from the sewer length and then analyzed in laboratory, one before flushing and second after, at same points among the sewer channel. Hence, a non-intrusive sampling instrument has undertaken to extract the sediments smaller than the fine gravels. The comparison between sediments texture after the flush operation and the initial state, revealed the most modified zones by the flush effect, regarding the sewer invert slope and hydraulic parameters in the zone up to 400 m from the gate. At this distance, despite the increase of sediment grain-size rages, D50 (median grain-size) varies between 0.6 mm and 1.1 mm compared to 0.8 mm and 10 mm before and after flushing, respectively. Overall, regarding the sewer channel invert slope, results indicate that grains smaller than sands (< 2 mm) are more transported to downstream along about 400 m from the gate: in average 69% before against 38% after the flush with more dispersion of grain-sizes distributions. Furthermore, high effect of the channel bed irregularities on the bed material evolution has been observed after the flush.

Keywords: bed-load evolution, combined sewer systems, flushing efficiency, sediments transport

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Authors: A. boursali, A. Guen Bouazza, M. Khaouani, Z. Kourdi, B. Bouazza

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This paper presents the design, development and characterization of the devices simulation for X-Band Radar applications. The effect of an InAlN/GaN structure on the RF performance High Electron Mobility Transistor (HEMT) device. Systematic investigations on the small signal as well as power performance as functions of the drain biases are presented. Were improved for X-band applications. The Power Added Efficiency (PAE) was achieved over 23% for X-band. The developed devices combine two InAlN/GaN HEMTs of 30nm gate periphery and exhibited the output power of over 50W. An InAlN/GaN HEMT with 30nm gate periphery was developed and exhibited the output power of over 120W.

Keywords: InAlN/GaN, HEMT, RF analyses, PAE, X-Band, radar

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Authors: H. Bentarzi, A. Zitouni

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The reliability of the power grid depends on the successful operation of thousands of protective relays. The failure of one relay to operate as intended may lead the entire power grid to blackout. In fact, major power system failures during transient disturbances may be caused by unnecessary protective relay tripping rather than by the failure of a relay to operate. Adequate relay testing provides a first defense against false trips of the relay and hence improves power grid stability and prevents catastrophic bulk power system failures. The goal of this research project is to design and enhance the relay tester using a technology such as Field Programmable Gate Array (FPGA) card NI 7851. A PC based tester framework has been developed using Simulink power system model for generating signals under different conditions (faults or transient disturbances) and LabVIEW for developing the graphical user interface and configuring the FPGA. Besides, the interface system has been developed for outputting and amplifying the signals without distortion. These signals should be like the generated ones by the real power system and large enough for testing the relay’s functionality. The signals generated that have been displayed on the scope are satisfactory. Furthermore, the proposed testing system can be used for improving the performance of protective relay.

Keywords: amplifier class D, field-programmable gate array (FPGA), protective relay, tester

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Authors: Jae-Chang Kwak, Yong-Seo Koo

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The high efficiency power management IC (PMIC) with switching device is presented in this paper. PMIC is controlled with PFM control method in order to have high power efficiency at high current level. Dynamic Threshold voltage CMOS (DT-CMOS) with low on-resistance is designed to decrease conduction loss. The threshold voltage of DT-CMOS drops as the gate voltage increase, resulting in a much higher current handling capability than standard MOSFET. PFM control circuits consist of a generator, AND gate and comparator. The generator is made to have 1.2MHz oscillation voltage. The DC-DC converter based on PFM control circuit and low on-resistance switching device is presented in this paper.

Keywords: DT-CMOS, PMIC, PFM, DC-DC converter

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Authors: S. Slimani, B. Djellouli

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Novel materials and innovative device structures has become necessary for the future of CMOS. High mobility materials like Ge is a very promising material due to its high mobility and is being considered to replace Si in the channel to achieve higher drive currents and switching speeds .Various approaches to circumvent the scaling limits to benchmark the performance of nanoscale MOSFETS with different channel materials, the optimized structure is simulated within nextnano in order to highlight the quantum effects on DG MOSFETs when Si is replaced by Ge and SiO2 is replaced by ZrO2 and HfO2as the gate dielectric. The results have shown that Ge MOSFET have the highest mobility and high permittivity oxides serve to maintain high drive current. The simulations show significant improvements compared with DGMOSFET using SiO2 gate dielectric and Si channel.

Keywords: high mobility, high-k, quantum effects, SOI-DGMOSFET

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Authors: Ingy N. Bkrey, Ahmed A. Moniem

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We succeeded to produce a high performance and flexible graphene/Manganese dioxide (G/MnO2) electrode coated on flexible polyethylene terephthalate (PET) substrate. The graphene film is initially synthesized by drop-casting the graphene oxide (GO) solution on the PET substrate, followed by simultaneous reduction and patterning of the dried film using carbon dioxide (CO2) laser beam with power of 1.8 W. Potentiostatic Anodic Deposition method was used to deposit thin film of MnO2 with different loading mass 10 – 50 and 100 μg.cm-2 on the pre-prepared graphene film. The electrodes were fully characterized in terms of structure, morphology, and electrochemical performance. A maximum specific capacitance of 973 F.g-1 was attributed when depositing 50 μg.cm-2 MnO2 on the laser reduced graphene oxide rGO (or G/50MnO2) and over 92% of its initial capacitance was retained after 1000 cycles. The good electrochemical performance and long-term cycling stability make our proposed approach a promising candidate in the supercapacitor applications.

Keywords: electrode deposition, flexible, graphene oxide, graphene, high power CO2 Laser, MnO2

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Authors: Santhosh Ravichandran, F. J. Rodríguez-Varela

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In this study, a biocarbon (BC) was made from sewage sludge from the water treatment plant (PTAR) in Saltillo, Coahuila, Mexico. The sludge was carbonized in water and then chemically activated by pyrolysis. The biocarbon was evaluated physicochemically using XRD, SEM-EDS, and FESEM. A broad (002) peak attributable to graphitic structures indicates that the material is amorphous. The resultant biocarbon has a high specific surface area (412 m2 g-1), a large pore volume (0.39 cm3 g-1), interconnected hierarchical porosity, and outstanding electrochemical performance. It is appropriate for high-performance supercapacitor electrode materials due to its high specific capacitance of 358 F g-1, great rate capability, and outstanding cycling stability (around 87% capacitance retention after 10,000 cycles, even at a high current density of 19 A g-1). In an aqueous solution, the constructed BC/BC symmetric supercapacitor exhibits increased super capacitor behavior with a high energy density of 29.5 Whkg-1. The concept provides an efficient method for producing high-performance electrode materials for supercapacitors from conventional water treatment biomass wastes.

Keywords: supercapacitors, carbon, material science, batteries

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Authors: Rehan Deshmukh, Sunil Bhand, Utpal Roy

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We report the label-free electrochemical detection of Escherichia coli O157:H7 (ATCC 43895) in potable water using a DNA probe as a sensing molecule targeting the open reading frame marker. Indium tin oxide (ITO) surface was modified with organosilane and, glutaraldehyde was applied as a linker to fabricate the DNA sensor chip. Non-Faradic electrochemical impedance spectroscopy (EIS) behavior was investigated at each step of sensor fabrication using cyclic voltammetry, impedance, phase, relative permittivity, capacitance, and admittance. Atomic force microscopy (AFM) and scanning electron microscopy (SEM) revealed significant changes in surface topographies of DNA sensor chip fabrication. The decrease in the percentage of pinholes from 2.05 (Bare ITO) to 1.46 (after DNA hybridization) suggested the capacitive behavior of the DNA sensor chip. The results of non-Faradic EIS studies of DNA sensor chip showed a systematic declining trend of the capacitance as well as the relative permittivity upon DNA hybridization. DNA sensor chip exhibited linearity in 0.5 to 25 pg/10mL for E. coli O157:H7 (ATCC 43895). The limit of detection (LOD) at 95% confidence estimated by logistic regression was 0.1 pg DNA/10mL of E. coli O157:H7 (equivalent to 13.67 CFU/10mL) with a p-value of 0.0237. Moreover, the fabricated DNA sensor chip used for detection of E. coli O157:H7 showed no significant cross-reactivity with closely and distantly related bacteria such as Escherichia coli MTCC 3221, Escherichia coli O78:H11 MTCC 723 and Bacillus subtilis MTCC 736. Consequently, the results obtained in our study demonstrated the possible application of developed DNA sensor chips for E. coli O157:H7 ATCC 43895 in real water samples as well.

Keywords: capacitance, DNA sensor, Escherichia coli O157:H7, open reading frame marker

Procedia PDF Downloads 129

Authors: Samane Maroufi, Rasoul Khayyam Nekouei, Sajjad Mofarah

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Fabrication of the state-of-the-art portable pseudocapacitors with the desired transparency, mechanical flexibility, capacitance, and durability is challenging. In most cases, the fabrication of such devices requires critical elements which are either under the crisis of depletion or their extraction from virgin mineral ores have sever environmental impacts. This urges the use of secondary resources instead of virgin resources in fabrication of advanced devices. In this research, ultrathin films of defect-rich Mn1−x−y(CexLay)O2−δ with controllable thicknesses in the range between 5 nm to 627 nm and transmittance (≈29–100%) have been fabricated via an electrochemical chronoamperometric deposition technique using an aqueous precursor derived during the selective purification of rare earth oxide (REOs) isolated from end-of-life nickel-metal hydride (Ni-MH) batteries. Intercalation/de-intercalation of anionic O2− through the atomic tunnels of the stratified Mn1−x−y(CexLay)O2−δ crystallites was found to be responsible for outstanding areal capacitance of 3.4 mF cm−2 of films with 86% transmittance. The intervalence charge transfer among interstitial Ce/La cations and Mn oxidation states within the Mn1−x−y(CexLay)O2−δ structure resulted in excellent capacitance retention of ≈90% after 16 000 cycles. The synthesised transparent flexible Mn1−x−y(CexLay)O2−δ full-cell pseudocapacitor device possessed the energy and power densities of 0.088 μWh cm⁻² and 843 µW cm⁻², respectively. These values show insignificant changes under vigorous twisting and bending to 45–180° confirming these value-added materials are intriguing alternatives for size-sensitive energy storage devices. This research confirms the feasibility of utilisation of secondary waste resources for the fabrication of high-quality pseudocapacitors with engineered defects with the desired flexibility, transparency, and cycling stability suitable for size-sensitive portable electronic devices.

Keywords: pseudocapacitors, energy storage devices, flexible and transparent, sustainability

Procedia PDF Downloads 74

Authors: A. N. Moulai Khatir

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SOI-Multifin-FETs are placed to be the workhorse of the industry for the coming few generations, and thus, in a few years because their excellent transistor characteristics, ideal sub-threshold swing, low drain induced barrier lowering (DIBL) without pocket implantation, and negligible body bias dependency. The corner effect may also exist in the two lower corners; this effect is called the BOX effect, which can also occur in the direction X-Z. The electric field lines from the source and drain cross the bottom oxide and arrive in the silicon. This effect is also called DIVSB (Drain Induced Virtual Substrate Basing). The potential in the silicon film in particular near the drain is increased by the drain bias. It is similar to DIBL and result in a decrease of the threshold voltage. This work provides an understanding of the limitation of this effect by reducing the fin width for components with increased fin number.

Keywords: SOI, finFET, corner effect, dual-gate, tri-gate, BOX, multi-finFET

Procedia PDF Downloads 475

Authors: Muhammad Ahsan

Abstract:

The effective decommissioning of oil and gas fields and related assets is one of the most important challenges facing the oil and gas industry today and in the future. Decommissioning decisions can no longer be avoided by the operators and the industry as a whole. Decommissioning yields no return on investment and carries significant regulatory liabilities. The main objective of this paper is to provide an approach and mechanism for the estimation of emissions associated with decommissioning of Oil and Gas fields. The model uses gate to gate approach and considers field life from development phase up to asset end life. The model incorporates decommissioning processes which includes; well plugging, plant dismantling, wellhead, and pipeline dismantling, cutting and temporary fabrication, new manufacturing from raw material and recycling of metals. The results of the GHG emissions during decommissioning phase are 2.31x10-2 Kg CO2 Eq. per Mcf of the produced natural gas. Well plug and abandonment evolved to be the most GHG emitting activity with 84.7% of total field decommissioning operational emissions.

Keywords: LCA (life cycle analysis), gas field, decommissioning, emissions

Procedia PDF Downloads 173

Authors: José de Jesús Rivero Oliva, Jesús Salomón Llanes, Manuel Perdomo Ojeda, Antonio Torres Valle

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Combinatorial explosion is a common problem to both predominant methods for solving fault trees: Minimal Cut Set (MCS) approach and Binary Decision Diagram (BDD). High memory consumption impedes the complete solution of very complex fault trees. Only approximated non-conservative solutions are possible in these cases using truncation or other simplification techniques. The paper proposes a method (CSolv+) for solving complex fault trees, without any possibility of combinatorial explosion. Each individual MCS is immediately discarded after its contribution to the basic events importance measures and the Top gate Upper Bound Probability (TUBP) has been accounted. An estimation of the Top gate Exact Probability (TEP) is also provided. Therefore, running in a computer cluster, CSolv+ will guarantee the complete solution of complex fault trees. It was successfully applied to 40 fault trees from the Aralia fault trees database, performing the evaluation of the top gate probability, the 1000 Significant MCSs (SMCS), and the Fussell-Vesely, RRW and RAW importance measures for all basic events. The high complexity fault tree nus9601 was solved with truncation probabilities from 10-²¹ to 10-²⁷ just to limit the execution time. The solution corresponding to 10-²⁷ evaluated 3.530.592.796 MCSs in 3 hours and 15 minutes.

Keywords: system reliability analysis, probabilistic risk assessment, fault tree analysis, basic events importance measures

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Authors: Imtiaz Ahmed Khan, Sabu John, Sania Waqar, Lijing Wang, Mac Fergusson, Ilija Najdovski

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Evolution of textiles, from its orthodox to more interactive role has stirred the researchers to uncover its application in numerous arenas. The idea of using textile based materials for wearable energy harvesting and storage devices have gained immense popularity. This is mainly due to textile comfort and flexibility features. In this work, nano-carbonous materials were infused on cellulosic fibers using caustic soda treatment. This paper presents the complete procedure of yarn supercapacitors fabrication process through dip coating technique and its characterization method. The main objective is to study, the effect of varying caustic soda concentration on mass loading of activated carbon on yarns and the related capacitance output of the designed yarn supercapacitor. Polyvinyl alcohol and Phosphoric acid were used as electrolyte in a two-electrode cell assembly to measure device electrochemical performance. The results show a promising increase in capacitance value using this technique.

Keywords: yarn supercapacitors, activated carbon, dip coating, caustic soda, electrolyte, electrochemical characterization

Procedia PDF Downloads 446