Search results for: memory motors

Authors: Baghdasaryan Marinka

Abstract:

The operation modes of the synchronous motors used in the production processes are greatly conditioned by the accidentally changing technological and power indices.  As a result, the electrical drive synchronous motor may appear in irregular operation regimes. Although there are numerous works devoted to the development of the regulator for the synchronous motor operation modes, their application for the motors working in the irregular modes is not expedient. In this work, to estimate the issues concerning the stability of the synchronous electrical drive system, the transfer functions of the electrical drive synchronous motors operating in the synchronous and induction modes have been obtained.  For that purpose, a model for investigating the frequency characteristics has been developed in the LabView environment. Frequency characteristics for assessing the transient process of the electrical drive system, operating in the synchronous and induction modes have been obtained, and based on their assessment, a regulator for improving the operation modes of the motor has been proposed. The proposed regulator can be successfully used to prevent the irregular modes of the electrical drive synchronous motor, as well as to estimate the operation state of the drive motor of the mechanism with a changing load.

Keywords: Electrical drive system, synchronous motor, regulator, stability, transition process.

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Authors: Amjad Nusayr

Abstract:

Software security is a general term used to any type of software architecture or model in which security aspects are incorporated in this architecture. These aspects are not part of the main logic of the underlying program. Software security can be achieved using a combination of approaches including but not limited to secure software designs, third part component validation, and secure coding practices. Memory safety is one feature in software security where we ensure that any object in memory is have a valid pointer or a reference with a valid type. Aspect Oriented Programming (AOP) is a paradigm that is concerned with capturing the cross-cutting concerns in code development. AOP is generally used for common cross-cutting concerns like logging and Database transaction managing. In this paper we introduce the concepts that enable AOP to be used for the purpose of memory and type safety. We also present ideas for extending AOP in software security practices.

Keywords: Aspect oriented programming, programming languages, software security, memory and type safety.

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Authors: A. Alghanim, J. Benedikt, P. J. Tasker

Abstract:

The increasing demand for higher data rates in wireless communication systems has led to the more effective and efficient use of all allocated frequency bands. In order to use the whole bandwidth at maximum efficiency, one needs to have RF power amplifiers with a higher linear level and memory-less performance. This is considered to be a major challenge to circuit designers. In this thesis the linearity and memory are studied and examined via the behavior of the intermodulation distortion (IMD). A major source of the in-band distortion can be shown to be influenced by the out-of-band impedances presented at either the input or the output of the device, especially those impedances terminated the low frequency (IF) components. Thus, in order to regulate the in-band distortion, the out of-band distortion must be controllable. These investigations are performed on a 12W LDMOS device characterised at 2.1 GHz within a purpose built, high-power measurement system.

Keywords: Low Frequency Memory, IntermodulationDistortion (IMD).

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Authors: Motonobu Hattori, Rina Suzuki

Abstract:

In neural networks, when new patters are learned by a network, they radically interfere with previously stored patterns. This drawback is called catastrophic forgetting. We have already proposed a biologically inspired dual-network memory model which can much reduce this forgetting for static patterns. In this model, information is first stored in the hippocampal network, and thereafter, it is transferred to the neocortical network using pseudopatterns. Because temporal sequence learning is more important than static pattern learning in the real world, in this study, we improve our conventional  dual-network memory model so that it can deal with temporal sequences without catastrophic forgetting. The computer simulation results show the effectiveness of the proposed dual-network memory model.  

Keywords: Catastrophic forgetting, dual-network, temporal sequences.

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Authors: Young-Lim Choi, Nak-Yun Choi, Jae-Yong Seo, Sang-Il Park, Jong-Wook Kim

Abstract:

This paper proposes a prototype of a lower-limb rehabilitation system for recovering and strengthening patients- injured lower limbs. The system is composed of traction motors for each leg position, a treadmill as a walking base, tension sensors, microcontrollers controlling motor functions and a main system with graphic user interface. For derivation of reference or normal velocity profiles of the body segment point, kinematic method is applied based on the humanoid robot model using the reference joint angle data of normal walking.

Keywords: Rehabilitation, lower limb, treadmill, humanoid robot.

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Authors: Ashraf Anwar

Abstract:

In this work, I present a review on Sparse Distributed Memory for Small Cues (SDMSCue), a variant of Sparse Distributed Memory (SDM) that is capable of handling small cues. I then conduct and show some cognitive experiments on SDMSCue to test its cognitive soundness compared to SDM. Small cues refer to input cues that are presented to memory for reading associations; but have many missing parts or fields from them. The original SDM failed to handle such a problem. SDMSCue handles and overcomes this pitfall. The main idea in SDMSCue; is the repeated projection of the semantic space on smaller subspaces; that are selected based on the input cue length and pattern. This process allows for Read/Write operations using an input cue that is missing a large portion. SDMSCue is augmented with the use of genetic algorithms for memory allocation and initialization. I claim that SDM functionality is a subset of SDMSCue functionality.

Keywords: Artificial intelligence, recall, recognition, SDM, SDMSCue.

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Authors: G. Das, S. Das, P. Purkait, A. Dasgupta, M. Kumar

Abstract:

Properly sized capacitor banks are connected across induction motors for several reasons including power factor correction, reducing distortions, increasing capacity, etc. Total harmonic distortion (THD) and power factor (PF) are used in such cases to quantify the improvements obtained through connection of the external capacitor banks. On the other hand, one of the methods for assessing the motor internal condition is by the use of Park-s pattern analysis. In spite of taking adequate precautionary measures, the capacitor banks may sometimes malfunction. Such a minor fault in the capacitor bank is often not apparently discernible. This may however, give rise to substantial degradation of power factor correction performance and may also damage the supply profile. The case is more severe with the fact that the Park-s pattern gets distorted due to such external capacitor faults, and can give anomalous results about motor internal fault analyses. The aim of this paper is to present simulation and hardware laboratory test results to have an understanding of the anomalies in harmonic distortion and Park-s pattern analyses in induction motors due to capacitor bank defects.

Keywords: Capacitor bank, harmonic distortion, induction motor, Park's pattern, PSCAD simulation.

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Authors: Yi-Pin Hsu, Shin-Yu Lin

Abstract:

An efficient parallel form in digital signal processor can improve the algorithm performance. The butterfly structure is an important role in fast Fourier transform (FFT), because its symmetry form is suitable for hardware implementation. Although it can perform a symmetric structure, the performance will be reduced under the data-dependent flow characteristic. Even though recent research which call as novel memory reference reduction methods (NMRRM) for FFT focus on reduce memory reference in twiddle factor, the data-dependent property still exists. In this paper, we propose a parallel-computing approach for FFT implementation on digital signal processor (DSP) which is based on data-independent property and still hold the property of low-memory reference. The proposed method combines final two steps in NMRRM FFT to perform a novel data-independent structure, besides it is very suitable for multi-operation-unit digital signal processor and dual-core system. We have applied the proposed method of radix-2 FFT algorithm in low memory reference on TI TMSC320C64x DSP. Experimental results show the method can reduce 33.8% clock cycles comparing with the NMRRM FFT implementation and keep the low-memory reference property.

Keywords: Parallel-computing, FFT, low-memory reference, TIDSP.

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Authors: Suzana Basaruddin, Haryani Haron, Siti Arpah Noodin

Abstract:

Managing knowledge of research is one way to ensure just in time information and knowledge to support research strategist and activities. Unfortunately researcher found the vital research knowledge in IHL (Institutions of Higher Learning) are scattered, unstructured and unorganized. Aiming on lay aside conceptual foundations for understanding and developing OMS (Organizational Memory System) to facilitate research in IHL, this research revealed ten factors contributed to the needs of research in the IHL and seven internal challenges of IHL in promoting research to their academic members. This study then suggested a comprehensive support of managing research knowledge using Organizational Memory System (OMS). Eight OMS characteristics to support research were identified. Finally the initial work in designing OMS was projected using knowledge taxonomy. All analysis is derived from pertinent research paper related to research in IHL and OMS. Further study can be conducted to validate and verify results presented.

Keywords: corporate memory, Institutions of Higher Learning, organizational memory system, research

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Authors: Thomas Canhao Xu, Bo Yang, Alexander Wei Yin, Pasi Liljeberg, Hannu Tenhunen

Abstract:

With the increasing number of on-chip components and the critical requirement for processing power, Chip Multiprocessor (CMP) has gained wide acceptance in both academia and industry during the last decade. However, the conventional bus-based onchip communication schemes suffer from very high communication delay and low scalability in large scale systems. Network-on-Chip (NoC) has been proposed to solve the bottleneck of parallel onchip communications by applying different network topologies which separate the communication phase from the computation phase. Observing that the memory bandwidth of the communication between on-chip components and off-chip memory has become a critical problem even in NoC based systems, in this paper, we propose a novel 3D NoC with on-chip Dynamic Random Access Memory (DRAM) in which different layers are dedicated to different functionalities such as processors, cache or memory. Results show that, by using our proposed architecture, average link utilization has reduced by 10.25% for SPLASH-2 workloads. Our proposed design costs 1.12% less execution cycles than the traditional design on average.

Keywords: 3D integration, network-on-chip, memory-on-chip, DRAM, chip multiprocessor.

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Authors: Mountassar Maamoun, Mehdi Neggazi, Abdelhamid Meraghni, Daoud Berkani

Abstract:

This paper presents a VLSI design approach of a highspeed and real-time 2-D Discrete Wavelet Transform computing. The proposed architecture, based on new and fast convolution approach, reduces the hardware complexity in addition to reduce the critical path to the multiplier delay. Furthermore, an advanced twodimensional (2-D) discrete wavelet transform (DWT) implementation, with an efficient memory area, is designed to produce one output in every clock cycle. As a result, a very highspeed is attained. The system is verified, using JPEG2000 coefficients filters, on Xilinx Virtex-II Field Programmable Gate Array (FPGA) device without accessing any external memory. The resulting computing rate is up to 270 M samples/s and the (9,7) 2-D wavelet filter uses only 18 kb of memory (16 kb of first-in-first-out memory) with 256×256 image size. In this way, the developed design requests reduced memory and provide very high-speed processing as well as high PSNR quality.

Keywords: Discrete Wavelet Transform (DWT), Fast Convolution, FPGA, VLSI.

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Authors: M. Goodarzi, P. Lashgari

Abstract:

A major part of the flow field involves no complicated turbulent behavior in many turbulent flows. In this research work, in order to reduce required memory and CPU time, the flow field was decomposed into several blocks, each block including its special turbulence. A two dimensional backward facing step was considered here. Four combinations of the Prandtl mixing length and standard k- E models were implemented as well. Computer memory and CPU time consumption in addition to numerical convergence and accuracy of the obtained results were mainly investigated. Observations showed that, a suitable combination of turbulence models in different blocks led to the results with the same accuracy as the high order turbulence model for all of the blocks, in addition to the reductions in memory and CPU time consumption.

Keywords: Computer memory, CPU time, Multi-block method, Turbulence modeling.

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Authors: Leila Maleki, Ezatollah Ahmadi

Abstract:

The aim of this study was to investigate the effectiveness of memory training exercise on cognitive flexibility. The method of this study was experimental. The statistical population selected 40 students 14 years old, samples were chosen by available sampling method and then they were replaced in experimental (training program) group and control group randomly and answered to Wisconsin Card Sorting Test; covariance test results indicated that there were a significant in post-test scores of experimental group (p<0.005).

Keywords: Cognitive flexibility, working memory exercises, problem solving, reaction time.

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Authors: N. Khon, A. Kim, T. Mukhitdinova

Abstract:

The aim of this research was to reveal the link between mental variables, such as spatial abilities, memory, intellect and professional experience of drivers. Participants were allocated to four groups: no experience, inexperienced, skilled and professionals (total 85 participants). The level of ability for spatial navigation and indicator of nonverbal memory grow along the process of accumulation of driving experience. At high levels of driving experience, this tendency is especially noticeable. The professionals having personal achievements in driving (racing) differ from skilled drivers in better feeling of direction, which is specific for them not just in a short-term situation of an experimental task, but also in life-size perspective. The level of ability of mental rotation does not grow with the growth of driving experience, which confirms the multiple intelligence theory according to which spatial abilities represent specific, other than logical intelligence type of intellect. The link between spatial abilities, memory, intellect and professional experience of drivers seems to be different relating spatial navigation or mental rotation as different kinds of spatial abilities.

Keywords: Memory, spatial abilities, intellect, drivers.

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Authors: Padmakumar S., Vivek Agarwal, Kallol Roy

Abstract:

A new observer based fault detection and diagnosis scheme for predicting induction motors- faults is proposed in this paper. Prediction of incipient faults, using different variants of Kalman filter and their relative performance are evaluated. Only soft faults are considered for this work. The data generation, filter convergence issues, hypothesis testing and residue estimates are addressed. Simulink model is used for data generation and various types of faults are considered. A comparative assessment of the estimates of different observers associated with these faults is included.

Keywords: Extended Kalman Filter, Fault detection and diagnosis, Induction motor model, Unscented Kalman Filter

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Authors: Sofien Chtourou, Mohamed Chtourou, Omar Hammami

Abstract:

Embedded systems need to respect stringent real time constraints. Various hardware components included in such systems such as cache memories exhibit variability and therefore affect execution time. Indeed, a cache memory access from an embedded microprocessor might result in a cache hit where the data is available or a cache miss and the data need to be fetched with an additional delay from an external memory. It is therefore highly desirable to predict future memory accesses during execution in order to appropriately prefetch data without incurring delays. In this paper, we evaluate the potential of several artificial neural networks for the prediction of instruction memory addresses. Neural network have the potential to tackle the nonlinear behavior observed in memory accesses during program execution and their demonstrated numerous hardware implementation emphasize this choice over traditional forecasting techniques for their inclusion in embedded systems. However, embedded applications execute millions of instructions and therefore millions of addresses to be predicted. This very challenging problem of neural network based prediction of large time series is approached in this paper by evaluating various neural network architectures based on the recurrent neural network paradigm with pre-processing based on the Self Organizing Map (SOM) classification technique.

Keywords: Address, data set, memory, prediction, recurrentneural network.

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Authors: Eleni Ioanna Levantinou

Abstract:

Gestures play a major role in comprehension and memory recall due to the fact that aid the efficient channel of the meaning and support listeners’ comprehension and memory. In the present study, the assistance of two kinds of gestures (iconic and beat gestures) is tested in regards to memory and recall. The hypothesis investigated here is whether or not iconic and beat gestures provide assistance in memory and recall in Greek and in Greek speakers’ second language. Two groups of participants were formed, one comprising Greeks that reside in Athens and one with Greeks that reside in Copenhagen. Three kinds of stimuli were used: A video with words accompanied with iconic gestures, a video with words accompanied with beat gestures and a video with words alone. The languages used are Greek and English. The words in the English videos were spoken by a native English speaker and by a Greek speaker talking English. The reason for this is that when it comes to beat gestures that serve a meta-cognitive function and are generated according to the intonation of a language, prosody plays a major role. Thus, participants that have different influences in prosody may generate different results from rhythmic gestures. Memory recall was assessed by asking the participants to try to remember as many words as they could after viewing each video. Results show that iconic gestures provide significant assistance in memory and recall in Greek and in English whether they are produced by a native or a second language speaker. In the case of beat gestures though, the findings indicate that beat gestures may not play such a significant role in Greek language. As far as intonation is concerned, a significant difference was not found in the case of beat gestures produced by a native English speaker and by a Greek speaker talking English.

Keywords: First language, gestures, memory, second language acquisition.

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Authors: Dalvinder Singh Dhaliwal, Parvinder S. Sandhu, S. N. Panda

Abstract:

This paper is on the general discussion of memory consistency model like Strict Consistency, Sequential Consistency, Processor Consistency, Weak Consistency etc. Then the techniques for implementing distributed shared memory Systems and Synchronization Primitives in Software Distributed Shared Memory Systems are discussed. The analysis involves the performance measurement of the protocol concerned that is Multiple Writer Protocol. Each protocol has pros and cons. So, the problems that are associated with each protocol is discussed and other related things are explored.

Keywords: Distributed System, Single owner protocol, Multiple owner protocol

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Authors: A. Zare Bazghaleh, M. R. Naghashan, H. Mahmoudimanesh, M. R. Meshkatoddini

Abstract:

Linear induction motors are used in various industries but they have some specific phenomena which are the causes for some problems. The most important phenomenon is called end effect. End effect decreases efficiency, power factor and output force and unbalances the phase currents. This phenomenon is more important in medium and high speeds machines. In this paper a factor, EEF , is obtained by an accurate equivalent circuit model, to determine the end effect intensity. In this way, all of effective design parameters on end effect is described. Accuracy of this equivalent circuit model is evaluated by two dimensional finite-element analysis using ANSYS. The results show the accuracy of the equivalent circuit model.

Keywords: Linear induction motor, end effect, equivalent circuitmodel, finite-element method.

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Authors: Samuel Kaspi, Sitalakshmi Venkatraman

Abstract:

In-memory database systems are becoming popular due to the availability and affordability of sufficiently large RAM and processors in modern high-end servers with the capacity to manage large in-memory database transactions. While fast and reliable inmemory systems are still being developed to overcome cache misses, CPU/IO bottlenecks and distributed transaction costs, disk-based data stores still serve as the primary persistence. In addition, with the recent growth in multi-tenancy cloud applications and associated security concerns, many organisations consider the trade-offs and continue to require fast and reliable transaction processing of diskbased database systems as an available choice. For these organizations, the only way of increasing throughput is by improving the performance of disk-based concurrency control. This warrants a hybrid database system with the ability to selectively apply an enhanced disk-based data management within the context of inmemory systems that would help improve overall throughput. The general view is that in-memory systems substantially outperform disk-based systems. We question this assumption and examine how a modified variation of access invariance that we call enhanced memory access, (EMA) can be used to allow very high levels of concurrency in the pre-fetching of data in disk-based systems. We demonstrate how this prefetching in disk-based systems can yield close to in-memory performance, which paves the way for improved hybrid database systems. This paper proposes a novel EMA technique and presents a comparative study between disk-based EMA systems and in-memory systems running on hardware configurations of equivalent power in terms of the number of processors and their speeds. The results of the experiments conducted clearly substantiate that when used in conjunction with all concurrency control mechanisms, EMA can increase the throughput of disk-based systems to levels quite close to those achieved by in-memory system. The promising results of this work show that enhanced disk-based systems facilitate in improving hybrid data management within the broader context of in-memory systems.

Keywords: Concurrency control, disk-based databases, inmemory systems, enhanced memory access (EMA).

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Authors: Bala Dhandayuthapani Veerasamy

Abstract:

Parallel programming models exist as an abstraction of hardware and memory architectures. There are several parallel programming models in commonly use; they are shared memory model, thread model, message passing model, data parallel model, hybrid model, Flynn-s models, embarrassingly parallel computations model, pipelined computations model. These models are not specific to a particular type of machine or memory architecture. This paper expresses the model program for concurrent approach to data parallel model through java programming.

Keywords: Concurrent, Data Parallel, JDK, Parallel, Thread

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Authors: Baghdasaryan Marinka, Ulikyan Azatuhi

Abstract:

The efficient usage of the compensation abilities of the electrical drive synchronous motors used in production processes can essentially improve the technical and economic indices of the process.  Reducing the flows of the reactive electrical energy due to the compensation of reactive power allows to significantly reduce the load losses of power in the electrical networks. As a result of analyzing the scientific works devoted to the issues of regulating the excitation of the synchronous motors, the need for comprehensive investigation and estimation of the excitation mode has been substantiated. By means of the obtained transmission functions, in the Simulink environment of the software package MATLAB, the transition processes of the excitation mode have been studied. As a result of obtaining and estimating the graph of the Nyquist plot and the transient process, the necessity of developing the Proportional-Integral-Derivative (PID) regulator has been justified. The transient processes of the system of the PID regulator have been investigated, and the amplitude–phase characteristics of the system have been estimated. The analysis of the obtained results has shown that the regulation indices of the developed system have been improved. The developed system can be successfully applied for regulating the excitation voltage of different-power synchronous motors, operating with a changing load, ensuring a value of the power coefficient close to 1.

Keywords: Transient process, synchronous motor, excitation mode, regulator, reactive power.

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Authors: Sun-Ki Hong, Ki-Seok Kim, Yong-Ho Cho

Abstract:

Lots of motors have been being used in industry. Therefore many researchers have studied about the failure diagnosis of motors. In this paper, the effect of measuring environment for diagnosis of gear fault connected to a motor shaft is studied. The fault diagnosis is executed through the comparison of normal gear and abnormal gear. The measured FFT data are compared with the normal data and analyzed for q-axis current, noise and vibration. For bad and good environment, the diagnosis results are compared. From these, it is shown that the bad measuring environment may not be able to detect exactly the motor gear fault. Therefore it is emphasized that the measuring environment should be carefully prepared.

Keywords: Motor fault, Diagnosis, FFT, Vibration, Noise, q-axis current, measuring environment.

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Authors: M. Ahmadi, M. Kafil, H. Ebrahimi

Abstract:

Nowadays, induction motors have a significant role in industries. Condition monitoring (CM) of this equipment has gained a remarkable importance during recent years due to huge production losses, substantial imposed costs and increases in vulnerability, risk, and uncertainty levels. Motor current signature analysis (MCSA) is one of the most important techniques in CM. This method can be used for rotor broken bars detection. Signal processing methods such as Fast Fourier transformation (FFT), Wavelet transformation and Empirical Mode Decomposition (EMD) are used for analyzing MCSA output data. In this study, these signal processing methods are used for broken bar problem detection of Mobarakeh steel company induction motors. Based on wavelet transformation method, an index for fault detection, CF, is introduced which is the variation of maximum to the mean of wavelet transformation coefficients. We find that, in the broken bar condition, the amount of CF factor is greater than the healthy condition. Based on EMD method, the energy of intrinsic mode functions (IMF) is calculated and finds that when motor bars become broken the energy of IMFs increases.

Keywords: Broken bar, condition monitoring, diagnostics, empirical mode decomposition, Fourier transform, wavelet transform.

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Authors: Alejandro Paz Parra, Jose Luis Oslinger Gutierrez, Javier Olaya Ochoa

Abstract:

In the present paper, five electric current based methods to analyze electric faults on the stator of induction motors (IM) are used and compared. The analysis tries to extend the application of the multiple reference frames diagnosis technique. An eccentricity indicator is presented to improve the application of the Park’s Vector Approach technique. Most of the fault indicators are validated and some others revised, agree with the technical literatures and published results. A tri-phase 3hp squirrel cage IM, especially modified to establish different fault levels, is used for validation purposes.

Keywords: Motor fault diagnosis, induction motor, MCSA, ESA, Extended Park´s vector approach, multiparameter analysis.

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Authors: Ho Phu TRAN, Frédéric PLOURDE

Abstract:

The ongoing effort to develop an in-house compressible solver with multi-disciplinary physics is presented in this paper. Basic compressible solver combined with IBM technique provides us an effective numerical tool able to tackle the physics phenomena and especially physic phenomena involved in Solid Rocket Motors (SRMs). Main principles are introduced step by step describing its implementation. This paper sheds light on the whole potentiality of our proposed numerical model and we strongly believe a way to introduce multi-physics mechanisms strongly coupled is opened to ablation in nozzle, fluid/structure interaction and burning propellant surface with time.

Keywords: Compressible Flow, Immersed Boundary Method, Multi-disciplinary physics, Solid Rocket Motors.

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Authors: T. Ahmed, Z. Butt, M. Ali, S. Attiq, M. Ali

Abstract:

A series of Ti based shape memory alloys with composition of Ti50Ni49Cr1, Ti50Ni47Cr3 and Ti50Ni45Cr5 were developed by vacuum arc-melting under a purified argon atmosphere. The histometric and corrosion evaluation of Ti-Ni-Cr shape memory alloys have been considered in this research work. The alloys were developed by vacuum arc melting and implanted subcutaneously in rabbits for 4, 8 and 12 weeks. Metallic implants were embedded in order to determine the outcome of implantation on histometric and corrosion evaluation of Ti-Ni-Cr metallic strips. Encapsulating membrane formation around the alloys was minimal in the case of all materials. After histomorphometric analyses it was possible to demonstrate that there were no statistically significant differences between the materials. Corrosion rate was also determined in this study which is within acceptable range. The results showed the Ti- Ni-Cr alloy was neither cytotoxic, nor have any systemic reaction on living system in any of the test performed. Implantation shows good compatibility and a potential of being used directly in vivo system.

Keywords: Shape memory alloy, Ti-Ni-Fe, histomorphometric, corrosion.

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Authors: R. Chalal, A. R. Ghomari

Abstract:

Preparation and negotiation of innovative and future projects can be characterized as a strategic-type decision situation, involving many uncertainties and an unpredictable environment. We will focus in this paper on the bidding process. It includes cooperative and strategic decisions. Our approach for bidding process knowledge capitalization is aimed at information management in project-oriented organizations, based on the MUSIC (Management and Use of Co-operative Information Systems) model. We will show how to capitalize the company strategic knowledge and also how to organize the corporate memory. The result of the adopted approach is improvement of corporate memory quality.

Keywords: Bidding process, corporate memory, Knowledge capitalization, knowledge acquisition, strategic decisions.

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Authors: B. Moaveni, S. Morovati

Abstract:

In recent years, increasing the usage of railway transportations especially in developing countries caused more attention to control systems railway vehicles. Consequently, designing and implementing the modern control systems to improve the operating performance of trains and locomotives become one of the main concerns of researches. Dynamic braking systems is an important safety system which controls the amount of braking torque generated by traction motors, to keep the adhesion coefficient between the wheel-sets and rail road in optimum bound. Adhesion force has an important role to control the braking distance and prevent the wheels from slipping during the braking process. Cascade control structure is one of the best control methods for the wide range of industrial plants in the presence of disturbances and errors. This paper presents cascade control structure based on two forward simple controllers with two feedback loops to control the slip ratio and braking torque. In this structure, the inner loop controls the angular velocity and the outer loop control the longitudinal velocity of the locomotive that its dynamic is slower than the dynamic of angular velocity. This control structure by controlling the torque of DC traction motors, tries to track the desired velocity profile to access the predefined braking distance and to control the slip ratio. Simulation results are employed to show the effectiveness of the introduced methodology in dynamic braking system.

Keywords: Cascade control, dynamic braking system, DC traction motors, slip control.

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Authors: Nawang Chhunid, Gagnesh Kumar

Abstract:

On-chip memories consume a significant portion of the overall die space and power in modern microprocessors. On-chip caches depend on Static Random-Access Memory (SRAM) cells and scaling of technology occurring as per Moore’s law. Unfortunately, the scaling is affecting stability, performance, and leakage power which will become major problems for future SRAMs in aggressive nanoscale technologies due to increasing device mismatch and variations. 3T1D Dynamic Random-Access Memory (DRAM) cell is a non-destructive read DRAM cell with three transistors and a gated diode. In 3T1D DRAM cell gated diode (D1) acts as a storage device and also as an amplifier, which leads to fast read access. Due to its high tolerance to process variation, high density, and low cost of memory as compared to 6T SRAM cell, it is universally used by the advanced microprocessor for on chip data and program memory. In the present paper, it has been shown that 3T1D DRAM cell can perform better in terms of fast read access as compared to 6T, 4T, 3T SRAM cells, respectively.

Keywords: DRAM cell, read access time, tanner EDA tool write access time and retention time, average power dissipation.

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